914
Chapter 13
Small-Signal Modeling and Linear Amplification
In Fig. 13.29, the NMOS and PMOS transistors are each biased by the dc voltage source
VGG , establishing the Q-point current I D . In each case, a signal voltage vgg is added in series with
VGG so that a positive value of vgg causes the gate-to-source voltage of each transistor to increase.
For the NMOS transistor, the total gate-to-source voltage and drain current are
vG S = VGG + vgg
and
i DS = I D + i d
(13.87)
and an increase in vgg causes an increase in current into the drain terminal. For the PMOS transistor,
v SG = VGG − vgg
and
i D = I D − id
(13.88)
A positive signal voltage vgg reduces the source-to-gate voltage of the PMOS transistor and causes
a decrease in the total current exiting the drain terminal. This reduction in total current is equivalent
to an increase in the signal current entering the drain.
Thus, for both the NMOS and PMOS transistors, an increase in the value of vG S causes an
increase in current into the drain, and the polarities of the voltage-controlled current source in the
small-signal model are identical, as depicted in Fig. 13.30.
id
ig
+
vgs
–
id
+
vds
–
ig
+
vgs
–
D
G
+
vgs gmvgs
vds
ro
–
S
(b)
(a)
Figure 13.30 (a) NMOS and PMOS transistors. (b) The small-signal models are identical.
13.7.6 Small-Signal Model for the Junction
Field-Effect Transistor
id
ig
+
vgs
–
Figure 13.31 The
JFET as a two-port
network.
+
vds
–
The drain-current expressions for the JFET and MOSFET can be written in essentially identical
form (see Prob. 13.82), so we should not be surprised that the small-signal models also have the
same form. For small-signal analysis, we represent the JFET as the two-port network in Fig. 13.31.
The small-signal parameters can be determined from the large-signal model given in Chapter 4
for the drain current of the JFET operating in the pinch-off region:
vG S 2
i D = I DSS 1 −
[1 + λv DS ]
VP
for v DS ≥ vG S − V P
(13.89)
The total gate current i G represents the current of the gate-to-channel diode, which we express in
terms of the gate-to-source voltage vG S and saturation current I SG :
vG S
i G = I SG exp
−1
VT
(13.90)
13.7
Small-Signal Models for Field-Effect Transistors
915
Once again using the derivative formulation from Eq. (13.65):
1
∂i G IG + I SG
= y11 =
=
rg
∂vG S Q-point
VT
∂i G y12 =
=0
∂v DS Q-point
VG S
∂i D I DSS
ID
gm = y21 =
1−
[1 + λVDS ] =
=2
V
G S − VP
∂vG S Q-point
−V P
VP
2
Alternatively,
gm =
2 2 I DSS
I DSS I D (1 + λVDS ) ∼
I DSS I D ∼
=
= 2 2 [VG S − V P ]
|V P |
|V P |
VP
(13.91)
1
VG S 2
∂i D λI D
ID
= y22 =
= λI DSS 1 −
=
=
1
ro
∂v DS Q-point
VP
1 + λVDS
+ VDS
λ
Because the JFET is normally operated with the gate junction reverse-biased,
IG = −I SG
and
rg = ∞
(13.92)
Thus, the small-signal model for the JFET in Fig. 13.32 is identical to that of the MOSFET,
including the formulas used to express gm and ro when VT N is replaced by V P .
G
vgs
ig
id
gmvgs
ro
D
vds
S
Figure 13.32 Small-signal model for the JFET.
As a result, the definition of a small signal and the expression for the amplification factor µ F
are also similar to those of the MOSFET:
vgs ≤ 0.2(VG S − V P )
and
1
+ VDS
I DSS
2
∼
µ f = gm ro = 2 λ
=
VG S − V P
λ|V P |
ID
(13.93)
916
Chapter 13
Small-Signal Modeling and Linear Amplification
Exercises: Calculate the values of gm, r o, and µ f for a JFET with I DSS = 5 mA, VP = −2 V,
and λ = 0.02 V−1 if it is operating at a Q-point of (2 mA, 5 V). What is the largest value of
vgs that can be considered to be a small signal?
Answers: 3.32 × 10−3 S, 27.5 k, 91; 0.24 V
13.8 SUMMARY AND COMPARISON OF THE
SMALL-SIGNAL MODELS OF THE BJT AND FET
Table 13.4 is a side-by-side comparison of the small-signal models of the bipolar junction transistor
and the field-effect transistor; the table has been constructed to highlight the similarities and
differences between the two types of devices.
The transconductance of the BJT is directly proportional to operating current, whereas that
of the FET increases only with the square root of current. Both can be represented as the drain
current divided by a characteristic voltage: VT for the BJT, (VG S − VT N )/2 for the MOSFET, and
(VG S − V P )/2 for the JFET.
TABLE 13.4
Small-Signal Parameter Comparison
PARAMETER
BIPOLAR
TRANSISTOR
MOSFET
JFET
IC
VT
2I D
VG S − VT N
2I D
VG S − V P
Transconductance gm
K n (VG S − VT N )(1 + λVDS )
√
2K n I D (1 + λVDS )
∼
=
βo
βo VT
=
gm
IC
2K n I D
I DSS
(VG S − V P )(1 + λVDS )
V P2
2 I DSS I D (1 + λVDS )
|V P |
2 ∼
I DSS I D
=
|V P |
∞
∞
Output resistance ro
V A + VC E ∼ V A
=
IC
IC
1
+ VDS
λ
∼ 1
=
ID
λI D
1
+ VDS
λ
∼ 1
=
ID
λI D
Amplification factor µ f
V A + VC E ∼ V A
=
VT
VT
1
+ VDS
λ
VG S − VT N
2
1
+ VDS
λ
VG S − V P
2
Input resistance
rπ =
√
2
1
∼
=
λ
Small-signal
requirement
vbe ≤ 0.005 V
2
2K n
=
ID
λ(VG S − VT N )
vgs ≤ 0.2(VG S − VT N )
∼
=
2
λ|V P |
I DSS
ID
vgs ≤ 0.2(VG S − V P )
13.9
The Common-Source Amplifier
dc i-v active region expressions for use with Table 13.4
VB E
VC E
−1 1+
BJT:
IC = I S exp
VT
VA
MOSFET:
JFET:
Kn
(VG S − VT N )2 (1 + λVDS )
2
VG S 2
I D = I DSS 1 −
(1 + λVDS )
VP
ID =
VT =
917
kT
q
K n = µn Cox
W
L
The input resistance of the bipolar transistor is set by the value of rπ , which is inversely
proportional to the Q-point current and can be quite small at even moderate currents (1 to 10 mA).
On the other hand, the input resistance of the FETs is extremely high, approaching infinity.
The expressions for the output resistances of the transistors are almost identical, with the
parameter 1/λ in the FET taking the place of the Early voltage V A of the BJT. The value of 1/λ
is similar to V A , so the output resistances can be expected to be similar in value for comparable
operating currents.
The amplification factor of the BJT is essentially independent of operating current and has
a typical value of several thousand at room temperature. In contrast, µ f of the FET is inversely
proportional to the square root of operating current and decreases as the Q-point current is raised.
At very low currents, µ f of the FET can be similar to that of the BJT, but in normal operation it
is often much smaller and can even fall below 1 for high currents (see Prob. 13.74).
Small-signal operation is dependent on the size of the base-emitter voltage of the BJT or
gate-source voltage of the field-effect transistor. The magnitude of voltage that corresponds to
small-signal operation can be significantly different for these two devices. For the BJT, vbe must
be less than 5 mV. This value is indeed small, and it is independent of Q-point. In contrast, the
FET requirement is vgs ≤ 0.2(VG S − VT N ) or 0.2(VG S − V P ), which is dependent on bias point
and can be designed to be as much as a volt or more.
This discussion highlighted the similarities and differences between the bipolar and fieldeffect transistors. An understanding of Table 13.4 is extremely important to the design of analog
circuits. As we study single and multistage amplifier design in the coming sections and chapters,
we will note the effect of these differences and relate them to our circuit designs.
13.9 THE COMMON-SOURCE AMPLIFIER
Now we are in a position to analyze the small-signal characteristics of the common-source
(C-S) amplifier shown in Fig. 13.33(a), which uses an enhancement-mode n-channel MOSFET
(VT N > 0) in a four-resistor bias network. The ac equivalent circuit of Fig. 13.33(b) is constructed
by assuming that the capacitors all have zero impedance at the signal frequency and that the dc
voltage sources represent ac grounds. Bias resistors R1 and R2 appear in parallel and are combined
into gate resistor RG . For simplicity at this point, we assume that we have found the Q-point and
know the values of I D and VDS .
13.9.1 Voltage Gain of the Common-Source Amplifier
In Fig. 13.33(c), the transistor has been replaced by its small-signal model. A final simplification
appears in Fig. 13.33(d), in which resistor R L represents the total equivalent load resistance on