Emiter bias
In the emitter bias, or self – bias , or voltage divider bias, the base voltage rather than the base
current is determined by the bias circuit. The circuit is shown below.
The required positive voltage for the base circuit is obtained from the potential divider circuit
R1R2 . If the current flowing in the potential divider resistors is much greater than the base
current (this is usually fulfilled) then the expression for the voltage across R2 is simply:
U B ≅ ECC
R2
R1 + R2
(we neglect IB)
Thanks to this voltage the transistor conducts and
U B = U BE + I E R E
In this equation UB is assumed to be constant and the current through the transistor is
governed by the value of UBE .
If there is any tendency for IE to increase( for example as a result of an increase in
temperature ), then the voltage IE RE increases which produces a reduction in UBE has the
effect of reducing IE. This balancing action is an example of negative feedback which acts to
stabilize the emitter current.
As we will see later on, RE also introduces negative feedback for the signal to be amplified.
To eliminate this effect, RE is often bypassed with a capacitor CE of sufficiently large
capacitance (chosen according to the frequency band of the signal).
To perform a more precise analysis, we transform the potential divider into the Thevenin
equivalent.
E BB = E CC
R2
R1 + R2
RB =
R1 R2
R1 + R2
Applying KVL to the base circuit gives:
EBB = IBRB + UBE + IERE
IE = (ß+1)IB
And the base current is:
IB =
Finally:
I C = βI B =
E BB − U BE
RB + ( β + 1) RE
β
(E BB − U BE )
RB + ( β + 1) RE
Now the collector current is much less dependent on ß as long as ß>>1.
To obtain good Q-point stability the condition RB <<( ß+1)RE
Should be fulfilled as far as possible. On the other hand, low values of R1 and R2 supply and
decrease the input resistance as seen by the signal source.
For engineering purposes a factor of 10 is often adequate
RB < 0,10(ß+1)RE
and a factor of 100 is usually more then adequate.
Design hints
The Q-point stability improves as RE is increased. However, for given IC the increase in RE
reduces the voltage available for the transistor.
RE is practically chosen in such a way that the voltage drop across RE is
URE = (10% - 20%)ECC
The remaining voltage (i.e. (90% - 80%)Ecc) is usually equally divided into URC and UCE, so
Then UB=URE +UBE
and we set the current flowing through R2 to be at least 10 times larger then IB max
I B max =
IC
β min
Finally, we can find R1 I R2 from the following equations:
R2 =
R1 =
UB
I R2
IR2>>10IBmax
ECC − U B
I R 2 + I B max
Emitter bias load line
With the addition of the emitter resistor the equation for the load line is slightly modified:
ECC = ICRC + UCE+IERE ≈ UCE + IC(RC+RE)
1≅
U CE
+
ECC
IC
ECC
RC + RE
We will see soon that the slope of the Ac load line may be often different then that of the DC
load line.
Collector bias
The collector bias offers an alternative biasing arrangement. The circuit is shown in the figure
below.
This arrangement also provides negative feedback. If there is an increase in the collector
current, the collector voltage (and the voltage drop across RB )will reduce the voltage drop
across RC increases, and cause a reduction in the base current, which then modifies IC.
PNP transistor biasing
Any of the previously shown bias circuits can be used for pnp transistors but the supply
voltage must be changed to negative. However in many cases pnp transistors are used together
with npn transistors and the supply voltage is positive.
An example of an emitter bias circuit for a pnp transistor, when the supply voltage is positive,
is shown below.
The analysis of this circuit is similar to that shown previously.
In a simplified approach, if ID>>IB then
ECC
IC ≈ I E =
R1
− U EB
R1 + R2
RE
Small – signal equivalent circuits of bipolar transistors
The amplification of analogue signals is an important application for bipolar transistors. The
DC bias circuits are used to establish the DC operating point so that the Q-point is, preferably,
mid-way along the load line.
As it was shown previously, the relationship
between the input and output voltages of a
transistor amplifier is nonlinear , which makes
the analysis of such circuits difficult for large –
signal operation.
The distortion of the signal, resulting from the nonlinearity of the transfer characteristic, is
known as nonlinear distortion. For aperiodic excitation the nonlinear distotrtion manifests by
harmonics that appear in the output signal and are not present in the input signal.
The measure of nonlinear distortion for a sinewave input signal is known as harmonic
distortion factor or simply harmonic distortion:
D=
U 22 + U 32 + U 42 + ...
or
D=
U 22 + U 32 + U 42 + ...
U1
U 12 + U 22 + U 32 + ...
where U1 is the magnitude ( or RMS value) of the fundamental, of first harmonic, of the
output signal and U2, U3 … are the magnitudes (or RMS values) of the second and higher
harmonics.
Many transistor circuits process signals so small that the transistor behaves linearly insofar as
these signals are concerned. In other words, the variations of the signal around the Q-point are
sufficiently small in comparison with DC currents and voltages so that the nonlinear
parameters associated with the transistor are assumed to be constant. This assumption forms
the basis of small – signal analysis. With this approach a linear model of a transistor is needed
in order that the powerful tools of linear circuit theory can be utilized.
There are a large number of possible small – signal equivalent circuits for the bipolar
transistor. Many of them were developed from the “black box” concept with input and output
terminals as shown in the figure below.
The operation of this two-port network is then described in terms of the terminal currents and
voltages. Thus for y parameters (admittance parameters) the equations for the network are:
i1 = y11u1 + y12u2
where
y11 (or y i ) =
i2 = y21u1 + y22u2
i1
u1
(short-circuit) input admittance
u2=0
y12 (or y i ) =
i1
u2
(short-circuit) reverse-transfer admittance
u1=0
y 21 (or y i ) =
i2
u1
(short-circuit) forward-transfer admittance
u2=0
y 22 (or y i ) =
i2
u2
(short-circuit) output admittance
u1=0
The above current – voltage relationships can also be represented as an electrical circuit, as
shown in the following figure.
For a set of h parameters (hybrid parameters), which are probably the most commonly used,
the equations for the network are:
u1 = h11i1 + h12u2
i2 = h21i1 + h22 u2
where
h11 (or hi ) =
u1
i1
(short-circuit) input impedance
u2=0
h12 (or hi ) =
u1
i2
(short-circuit) reverse voltage feedback
i1=0
h21 (or hi ) =
i2
i1
(short-circuit) forward current gain
u2=0
h22 (or hi ) =
i2
u2
(short-circuit) output admittance
i1=0
The circuit shown in the figure below is an accurate representation of the above equations.
The models described above are valid for any two-port network. As for bipolar transistors,
their static characteristics can be described mathematically in terms of two current variables
and two voltage variables. Depending on the choice of independent and dependent variables,
various models of a bipolar transistor can be obtained.
If we express uBE and iC as functions of iB and uCE , as indicated by relations
uBE = f(iB,uCE) iC = f(iB,uCE)
we can define the h model of the transistor for the common-emitter configuration.
CE
ube = h11eib + h12euce
ic = h21eib + h22euce
where
δu BE
δi B
δi
h21 = C ≈ β
δi B
h11e =
h12 e =
h22 e =
δu BE
δu CE
δiC
δu CE
Similar models can be defined for the common-base and the common-collector configuration.
CB
ucb = h11ie + h12bucb
ic = h21bie + h22ucb
where
h11b =
δu EB
δi E
h12b =
δu EB
δu CB
h21b =
δ iC
≈ −α
δi E
h22b =
δiC
δu CB
Admittance parameters can be defined in a similar way.
Valued for the h or y parameters may be obtained from measurements of the small-signal
currents and voltages performed on the transistors with the appropriate DC bias applied. They
are often quoted in manufacturers’ and so the subscript “e” is often omitted.
In practical devices the reverse voltage feedback h12e is very small so that this parameter can
be ignored.
The output admittance can also be ignored for most practical transistor circuits, because the
resulting resistance (more than 50kΩ, typically) is usually greater than typically collector
resistors. Thus the equivalent circuit for the CE shown in the figure below.
Small-signal parameters of the bipolar transistor are dependent on the DC operating points.
Their values for different Q-points can be found by measurement of form data sheets.
The h and y parameters are derived from a network representation of the transistor and can be
used for any two-port network. There are also small-signal models that are specific for bipolar
transistors.
One of such models is based on the following description of the bipolar transistor for the
active region:
IC ≅ I C0e
U BE
UT
(from Ebnes-Moll equations for active regions)
I C ≅ βI B
Let us linearize both equations around some DC operation point by differentiation:
U BE
I
1
∆I C ≈
I C 0 e U T ⋅ ∆U BE = C ⋅ ∆U BE
UT
UT
∆I C = iC
∆U BE = u be
∆I C
i
I
= C = C = qm
∆U BE u be U T
∆I C = β∆I B
ic = βib
∆U BE u be u be
U
β
=
=
=
= β T = rbe
ic
∆I B
ib
qm
IC
β
qm is called transfer conductance , and rbe is the input resistance of the transistor.
With the addition of another parameter, output resistance rce (which is often neglected), these
small-signal parameters describe the small-signal operation of the bipolar transistor in the
following way:
ib =
1
u be
rbe
ic = q m ⋅ u be +
1
u ce
rce
This model is similar to the y model, but feedback is ignored.
Note that
1
qm =y21e
rbe = h11 =
y11e
The equivalent circuit is shown in the figure below.
The advantage of this model is that the small-signal parameters are directly associated with
the DC operating point:
IC
U
rbe = β T
UT
IC
for example, if IC = 1mA ß=100
qm =
kT
≈ 26mV at 300K then qm = 40mS rbe = 4kΩ
q
The simple small-signal models discussed up to now are adequate for hand-based calculations
for low-frequency analysis ( up to tens or hundreds of kHZ, typically). However , capacitive
effects are associated with the p-n junctions. These capacitance effects have a considerable
influence on the high-frequency performance of a transistor amplifier
An equivalent circuit which is suitable for use with hand-based calculations for high
frequencies is the hybrid Π model, as shown in the figure below.
and U T =
In this circuit there is an internal base contact, B’ for the ideal transistor, and an external base
contact B, which represents the actual contact to the base.
rbb’ represents the resistance between the ideal transistor and the actual base connection of two
capacitors which represent the junction capacitance of the base-emitter and base-collector.