Adaptive Power Extraction from Micro Generators with Implicit Voltage Up-Conversion D. Maurath, M. Ortmanns and Y. Manoli Chair of Microelectronics, Department of Microsystems Engineering (IMTEK), University of Freiburg, Germany Abstract: This paper presents a novel approach of a generator interface and voltage up-converter for energy scavenging micro generators. The converter will implicitly adapt to the generator impedance and convert the generator ac-voltage to a much higher buffered dc-voltage. The applied technique uses integrated and adaptively configured switch-capacitor arrays in order to achieve maximum efficiency regarding the power transfer from the generator to an application load. As simulations express, this fully integrated converter is able to up-convert ac-voltages greater than 0.3 V. Thereby, high power transfer efficiency of 82 - 94.5 % is achieved within the entire operational range. Key Words: generator interface, impedance matching, maximum power extraction, harvesting efficiency, voltage converter, conversion efficiency 1. INTRODUCTION Energy harvesting micro-generator based applications emerge more and more. One reason certainly is the opportunity of long-term, batteryfree and wireless operation. However, the power delivered by those generators is commonly very rare, fluctuant and low in voltage amplitude. In addition to this, applications often have very specific and repetitive operation sequences with repeating power supply requirements. Consequently, this asynchronous generatorapplication interaction requires an energy buffer, which stores the energy difference between the present generator output and the desired application energy consumption. In order to harvest continuously the maximum possible energy, permanent optimal generator loading for maximum generator output power as well as efficient rectification, voltage conversion and energy storage is required [1]. In order to obtain this, the power electronic is separated in two stages (see Fig. 1). The first stage is a generator interface and has to be optimized for adaptive impedance matching so as to load the generator as ideal as possible. Thus, maximum energy could be extracted permanently out of the micro-generator. In addition to that, the first stage also has to transfer the harvested energy most efficiently into a buffer. Thereby, the output voltage of the first stage is neither fixed nor regulated by the converter. For efficient energy transfer, the output voltage is rather adapted to the buffer voltage Vb(t). Whereas the buffer voltage is rms a result of the mean generator output power Pgen versus the mean application electronic power rms consumption Papp as well as of the external buffer capacitance Cb. With appropriate dimensioning of the components, the buffer voltage will vary only little and slowly compared to the generator acvoltage. Thus, the second stage is realized as a dcdc converter. This converter boosts the dc-voltage of the buffer into a regulated output voltage for supplying an application. Vgen Vout Cb RL Vb generator rectifier interface buffer dc/dc application Figure 1: energy-harvesting system with twostage power electronic. In this paper a novel generator interface is presented. This interface works basically as a voltage converter with adaptive input impedance adaptation, efficient energy transfer and implicit voltage up-conversion. By applying power saving circuit techniques, the power consumption of the control circuitry and switch driving is less then Ptotal d 50 PW . The generator interface was especially designed to incorporate with inductive micro-generators [1, 2]. The internal source 351 t C2,1 C2,j C2,max array 2 c Cb start-up bypass c C1,1 C1,i C1,max array 1 t Figure 2: Overview of the generator interface with impedance adapting switched capacitor arrays and passive start-up bypass. resistance of these inductive generators is between Ri 1 5k : . The generated open-circuit output voltage has 2.8 Vpp at most and frequencies are not higher then f gen d 500 Hz [3, 4]. As simulations express, this fully integrated converter is able to boost ac-voltages greater than |0.3 V| to an output dc-voltage of 2.0 V - 2.5 V. Thereby, high harvesting efficiencies above 90 % are possible within the entire operational range. 2. ADAPTIVE CONVERSION PRINCIPLE The proposed adaptive switching converter, as shown in Fig. 2, is based on two capacitor arrays, which toggle complementary-phased with frequency fconv between a charging and a transfer state, Sc and St respectively. Whereas, a conversion-cycle is the single succession of Sc and St. In the considered converter both arrays consist of kmax = 6 capacitors, whereas kmax directly corresponds to the maximum required voltage conversion ratio. However, the number of arraycapacitors ni, which are applied within a single conversion-cycle, is dynamically adapted according to the current required conversion ratio ki Vb / Vgen (t ) . Hence, while one array is in charging state Sc, ni array capacitors out of the kmax available array capacitors are connected to the generator in parallel. At this state, the capacitors are charged until the capacitor voltages Varray reach a certain voltage limit Vstop, as shown in Fig. 3. Afterwards, the array transitions to transfer state St. Therefore, the array capacitors have to be re-configured so as to obtain a stacked voltage Vstack, which is higher than the buffer voltage Vb of an external buffer. In order to obtain the dynamic adaptation of the optimal conversion 352 Vstop 2.5 Vb Varray 2.0 voltage [V] rectifier 1.5 1.0 0.5 46.5 46.8 47.1 47.4 time 47.7 [µs] Figure 3: This graph show one conversion cycle, whereas Varray is the current highest voltage within an array. ratio ki, the converter works in an oversampling manner. Thus, if f gen f conv is given, the conversion ratio can be adapted quite continuously within a generator voltage period 1/ f gen . Thereby, oversampling means that the acvoltage of the generator is divided into short time slots (conversion cycles) whereas ki is adapted for each time slot. 2.1 Adaptive Impedance Matching Ideal generator loading and impedance matching is especially important, because of commonly high internal generator resistance Ri. This high resistance requires a particular converter design since an exceeding current load would cause a dramatic voltage breakdown, which would cause reduced generator output power. Due to the low output currents of energy harvesting generators (50 – 500 P A ) capacitive voltage conversion is preferred rather than inductive conversion. However, charging a capacitor allows generally only at topt | W ln 2 maximum power transfer from the generator into the capacitor. The generator-interface matching situation at topt is equivalent to the impedance matching situation where Pgen(Ri = Rload) = Pmax is achieved. Therefore, the converter’s capacitors must not be fully charged or discharged. Instead, the capacitors charging level should stay around a optimal voltage of Vch ,opt | 0.5 Vgen (t ) , which corresponds to topt. This means, within Sc the generator charges the capacitors up to Vstop Vch,opt 'Vch . Then the capacitors are toggled to St and discharged onto an output buffer Cb until the capacitor voltage reaches Vch ,opt 'Vdisch . Whereas, the smaller the overdrive connected in parallel (Fig. 4). Thus, the maximum capacitance for a certain conversion ratio is used, which reduces the conversion frequency fconv. voltages 'Vch and 'Vdisch are, the higher is the conversion frequency fconv. However, impedance matching is improved and generator output power is increased. The consequence of keeping the caps only in a small charging range of 0.5 Vgen (t ) r 'V requires an increased number of capacitors. Thus, twice as many capacitors are implemented to boost the generator voltage up to a certain voltage. All simulations were obtained with Spectre Cadence circuit simulator with a standard 0.35 P m n-well double-poly CMOS process. The generator was included as a sine wave source with an ohmic serial resistance. Because energy harvesting applications are considered, there are two important efficiencies: 2.2 Charge Transfer and Array Configuration As is generally known, charge transfer from one capacitor to another one causes intrinsic losses due to series resistances [2]. But by minimizing the initial voltage gap between Vstack and Vb the charge transfer losses are minimized. Hence, the optimal conversion ratio ki is obtained by Vb Vb ki o Vch ,opt 'Vch Vstop (1) The strategy for stacking is that a maximum quantity ni o kmax of capacitors is used, whereas within each stack-stage ni / ki capacitors are 3 SIMULATION RESULTS Kin Pgen Pmax Kconv Pout Pin ³ t2 Vgen I gen dt 1 4 Ri Vˆgen t1 ³ VI ³ V I Papp t2 t1 Pgen t2 b app gen dt gen dt (2) (3) Where (2) defines the input efficiency Kin , which compares the theoretical maximum generator power to the actual converter input power. The higher Kin is, the better achieved is impedance matching. In addition to this, the efficiency Kconv in (3) gives a measure of the conversion efficiency as usually applied for voltage converters. Therefore, this efficiency is calculated by comparison of Pin versus Pout of the interface. Here, the conversion efficiency is mainly affected by internal converter losses and capacitor charge transfer losses. As Fig. 5 illustrates, high efficiencies are achieved over the entire input voltage range. Moreover, Fig. 6 exhibits that the interface input power almost equals the maximum possible output power. Thereby, the power and current Imax changes quadratically with the currently supplied generator voltage Vgen(t): I max (t ) Figure 4: Schematic and state diagram of a conversion cycle. By the transition to state St all capacitors are stacked in ki = 2stages with ni/ ki = 3 parallel capacitors at each stage. 1 t2 t1 t1 Vgen (t ) 2 4 RV i b (t ) (4) Both graphs prove that this novel interface approach and conversion method operates as required. Generally, in order to characterize the efficiency by interfacing a generator, not only 353 Kconv can be considered, but also Kin is of importance. Therefore, Fig. 7 shows the total efficiency over the generator voltage range. 1.0 PN Pmax Pin 0.8 0.6 Pout 0.4 0.2 0.0 0.3 0.5 0.7 0.9 1.1 Vgen [V] harvesting efficiency [%] Figure 5: This graph illustrates high input and conversion efficiency due to adaptive impedance matching within the first 90° of a sinusoid. 93 2µA Iopt Imax 92 ACKNOWLEDGMENT This work is supported by the German Research Foundation (Deutsche Forschungsgemeinschaft DFG) under Grant Number GR1322. REFERENCES 90 [1] Xu Shengwen, K.D.T. Ngo, T. Nishida, Ch. Gyo-Bum, A. Sharma, Converter and controller for micro-power energy harvesting, 20th Annual Applied Power Electronics Conference and Exposition, vol. 1, pp. 226230, March 2005. [2] L. Gobbi, A. Cabrini, and G. Torelli, Impact of Parasitic Elements on CMOS Charge Pumps: a Numerical Analysis, IEEE International Symposium on Circuits and Systems (ISCAS), May 2006 [3] D. Spreemann, B. Folkmer, D. Maurath and Y. Manoli, Tuneable transducer for low frequency vibrational energy harvesting, EuroSensors 2006, vol. , September 2006 [4] S. Kulkarni, E. Koukharenko, J. Tudor, S. Beeby, T. O’Donnell, S. Roy, Fabrication and Test of Integrated Micro-Scale Vibration Based Electromagnetic Generator, International Solid-State Sensors Actuators and Microsystems Conference, 2007 89 88 87 Vgen 0.6 0.8 1.0 1.2 1.4 1.6 [V] Figure 6: The interface input power almost equals the maximum possible output power. total efficiency [%] It was shown, that high efficient power extraction and voltage up-conversion is feasible in light-load energy harvesting environments. Especially the realization of adaptive impedance matching and almost continuous maximum generator power enhances the usage of microgenerators further. These advantages give the opportunity of using smaller generators to supply autonomous applications with un-changed performance. One drawback might be the relatively large quantity of capacitances, which need to be integrated. Thus, a lot of chip area is necessary and parasitic effects could decrease the overall efficiency. 91 0.4 2 µA Imax 95 85 Vgen 75 0.5 0.8 1.1 1.4 1.7 2.0 [V] Figure 7: This graphs show the total efficiency Kin uKconv for standby-load and full load. 354 4 CONCLUSIONS