Data Sheet
Evaluation Board for Zero-Drift, Digitally
Programmable Sensor Signal Amplifier
AD8556-EVALZ
FEATURES
GENERAL DESCRIPTION
Single- or dual-supply operation
AC and DC signal evaluation
Built-in, 100 Ω bridge with unbalancing capability
Provision to create low-pass filter
Readback feature of programmed values
External clamp voltage setting
Interface for PC USB port
Microsoft® Windows® XP, Windows Vista, Windows 7
compatible software
SOIC socket for easy part replacement
Supports AD8555, AD8556 and AD8557 IC’s
This document describes the evaluation board hardware and
software used to evaluate the AD8555, AD8556, and AD8557 in
a SOIC package. The evaluation board allows the quick
demonstration and evaluation of the AD8555/AD8556/AD8557
zero-drift, digitally programmable sensor signal amplifiers.
The AD8555/AD8556/AD8557 are auto-zero instrumentation
amplifiers with programmable gain and output offset
adjustment features. The evaluation board enables a PC to
communicate with the AD8555/AD8556/AD8557. Users can
send commands to the evaluation board and read back the
programmed values for the device that is being evaluated.
The information in this document is meant to supplement the
information in the AD8555, AD8556, and AD8557 data sheets.
To evaluate the device thoroughly, users are encouraged to read
this document and the AD8555/AD8556/AD8557 data sheets.
11886-001
FUNCTIONAL BLOCK DIAGRAM
Figure 1.Image of SDP-S board Connected to the AD8556-EVALZ Board (SDP-B Board Is Shown for Reference)
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2013 Analog Devices, Inc. All rights reserved.
AD8556-EVALZ
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Quick Initial Hardware Setup and Output Verification ...........4
General Description ......................................................................... 1
Software ..............................................................................................5
Functional Block Diagram .............................................................. 1
Installation......................................................................................5
Revision History ............................................................................... 2
Removing the Evaluation Software .............................................5
Hardware Description ...................................................................... 3
Running the Software ...................................................................5
System Requirements ................................................................... 3
Typical AC Setup and Response ..................................................6
Communicating with the Evaluation Board ............................. 3
Output Clamp Feature ..................................................................7
Hardware Requirements .............................................................. 3
Evaluation Board Schematic ............................................................8
Adjusting for 0 V Differential Input .......................................... 3
Ordering Guide .............................................................................8
REVISION HISTORY
10/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Data Sheet
AD8556-EVALZ
HARDWARE DESCRIPTION
The AD8556-EVALZ evaluation board is designed for maximum
configuration flexibility. An ac signal can be applied to +VIN ac,
and the output can be monitored from VOUT ac. DC signals can
be differentially applied between +VIN dc and −VIN dc, and the
results can be monitored using a voltmeter at VOUT. Users can
view the filter output signal at the FILT/DIGOUT pin. The
board also allows swapping of the polarity of the inputs using
switches VNEG P1 and VPOS P1.
Four resistors (R1A, R1B, R2A, R2B) simulate a 100 Ω bridge
configuration. The bridge can be unbalanced using the provided
trim potentiometers (P1 and P2). The top and bottom of the
bridge are connected to VDD and VSS, respectively.
Pulse shaping is performed on this board before applying the data
to the AD8556-EVALZ data input pin. The pulse widths are set
for 5 µs, representing the low level (0 V); and 80 µs,
representing the high level (>2.4 V). This adjustment is made
using Resistor RT0 and Resistor RT1. The trim potentiometers
are glued to their fixed positions.
Supply current can be monitored by using a resistor in place of
R7. Clamp voltage can be applied externally to a level or can be
set easily to VDD by placing a jumper from VCLAMP to VDD.
The SOIC socket is soldered for easy programming and removal
of the part. Pin 1 is the pin located in the upper left-hand
corner of the socket close to R7. Please make sure that the part
is placed in the socket properly. See Figure 11 for the evaluation
board schematic.
SYSTEM REQUIREMENTS
•
•
•
•
The evaluation kit has the following system requirements:
ADI SDP-B or SDP-S board. Available for purchase
separately.
http://www.analog.com/sdp
PC with available USB 2.0 port.
Microsoft® Windows® operating system with administrator
access.
COMMUNICATING WITH THE EVALUATION
BOARD
The evaluation board connects to the ADI SDP-B or SDP-S
board, which connects to the USB port of a PC.
Ensure that the evaluation software provided on the CD
installed before connecting SDP board and evaluation board.
HARDWARE REQUIREMENTS
•
Power supplies
•
Voltage source
•
Voltmeter
•
BNCs and power cables
•
SDP board with USB mini-B cable
ADJUSTING FOR 0 V DIFFERENTIAL INPUT
Prior to initial hardware setup and output verification, complete
the following to adjust for differential input offset:
1.
2.
3.
4.
5.
6.
7.
8.
Rev. 0 | Page 3 of 8
Connect +input (high) of a voltmeter to −VIN dc.
Connect −input (low) of the voltmeter to GND of the
power supply.
Monitor the output (VOUT dc) voltmeter.
Adjust trim Potentiometer P1 to get close to 0 V
(−0.1 mV).
Connect +input (high) of a voltmeter to +VIN dc.
Connect −input (low) of the voltmeter to GND of the
power supply.
Monitor the output (VOUT dc) voltmeter.
Adjust trim Potentiometer P2 to get close to 0 V (0.1 mV).
AD8556-EVALZ
Data Sheet
QUICK INITIAL HARDWARE SETUP AND OUTPUT
VERIFICATION
4.
For an initial hardware setup and output verification, follow
these steps:
5.
2.
3.
Connect the AD8556-EVALZ evaluation board to the SDP
board, which is connected to the USB port of your PC
system using USB mini-B cable.
Position manual switches to VPOS P2 and VNEG P1.
Jumper the VCLAMP connector pin to the VDD
connector pin.
When you complete this procedure, the output should be 70 mV,
with the board in this configuration consuming roughly 4 mA.
STEP 5
APPLY
+2.5V
APPLY
GND
APPLY
–2.5V
VDD
GND
VSS
VOUT
AD855x
SOIC
STEP 1
CONNECT SDP
VCLAMP
STEP 4
MONITOR VOUT
STEP 3
CONNECT VCLAMP TO VDD
AD8556 EVALUATION BOARD
–VIN DC
+VIN DC
STEP 4
CONNECT VIN
VNEG
VPOS
FILT OUT
STEP 2
THESE SWITCHES SET INPUT
POLARITY AS NEEDED
Figure 2.
Rev. 0 | Page 4 of 8
11886-011
1.
Apply 1 mV dc signal between the +VIN dc and −VIN dc
connectors, and monitor the VOUT dc output using a
voltmeter.
Place an AD8556-EVALZ part in the SOIC socket, connect
the VCLAMP pin to the VDD pin, and apply dc power to
the board using an external power supply (±2.5 V).
Data Sheet
AD8556-EVALZ
SOFTWARE
INSTALLATION
RUNNING THE SOFTWARE
To install the evaluation software on the PC
To run the AD8556-EVALZ software application:
1.
2.
3.
Insert the CD-ROM into the CD drive on your
computer. After a few moments, a message for the
installation appears.
Double-click setup.exe. (Right click and select Install
as administrator for Windows® 7 onwards )
Follow the instructions until the software installation
is complete.
The evaluation software is developed in LabVIEW®. The
software requires a LabVIEW® runtime engine and USB drivers
for the SDP (both included in install). Install the software with
administrator access, before plugging in the SDP board. The
install will detect if the SDP board has been installed previously.
1.
2.
3.
4.
C:\Program Files (x86)\Analog Devices\AD855x
The output is input × gain and responds to the specified
configuration.
For future reference or for the most current data sheet, visit
www.analog.com/AD8556 or www.analog.com/AD8557.
5.
REMOVING THE EVALUATION SOFTWARE
To remove the AD8556-EVALZ evaluation software modules:
After the AD8556-EVALZ has been simulated to the final
values, click Program to permanently blow the internal
fuses to the values in the GUI.
Click Start > Settings > Control Panel.
Double-click Add/Remove Programs and select
AD855x Evaluation Software.
11886-002
1.
2.
With the SDP board plugged into PC via USB, and into
AD8556-EVALZ evaluation board via P1 socket, run the
AD8556-EVALZ software by clicking Start > AD855x Eval
> AD855xEVAL. The Graphical User Interface (GUI) will
load.
Select the product for which you have samples and the
connector used, and then click Start on the left.
Set the appropriate gain and offset values, and then click
Simulate. Monitor the output as the offset is changed to
verify communication.
Program the gain between 70 and 1280 and the offset
between 0 V and 5 V. Click Simulate to load these values
into the AD8556-EVALZ and monitor the output.
Figure 3. No Programming Dialog Box
Rev. 0 | Page 5 of 8
AD8556-EVALZ
Data Sheet
Table 1. AD8556-EVALZ Dialog Box Button Functions
Button
Start
Connector
Product
Simulate
Program
Blow Parity Fuse
Blow Master Fuse
Read Fuse Values
Function
Select the connector and the product and then click Start to begin evaluation
Selects the physical connector on the SDP-B board that is used to connect to the AD8556-EVALZ evaluation board.
The connectors are labeled on the top silkscreen of the SDP boards.
Selects the IC part number under evaluation.
Configures the part according to the specified pattern. This button does not blow any fuses.
Blows fuses according to the specified pattern. Blown fuses cannot be reprogrammed.
Blows the parity fuse. The parity fuse keeps track of the state of the blown fuses. If, for any reason, the state of this fuse
is changed either intentionally or unintentionally, the parity flag is set and the alarm is set.
Permanently sets the part to the programmed gain and offset and prevents future programming. Click this button
only after selecting and programming the gain and the offset. Prior to blowing the master fuse, make sure that, if
prompted, you first blow the parity fuse.
Reads back the state of the programmed fuses after they have been blown. The options are:
Low Sense Current option, when dropped across a blown fuse (high impedance), creates a voltage that can trigger an
internal comparator and provide the right level in the output.
High Sense Current option reads back the fuse states to make sure that the fuses are blown. A code for blown fuses
appears in a pop-up box.
Refer to the AD8555, AD8556, or AD8557 data sheets for more
information on its theory of operation, simulation/programming/
read modes, and parity error detection. The AD8555/AD8556/
AD8557 data sheets also contain more information on
programming procedures for the part.
shows the output on Channel 2 under these conditions and
configuration.
[
]
T
T
1
TYPICAL AC SETUP AND RESPONSE
AC Input Example
Setup requirements are as follows:
Power supplies
Function generator
Scope
BNCs and cables
2
Ch1 50.0mV
Results
BW
Ch2
2.00V
BW
M 400ms A Ch1
2.00mV
T 9.600%
When the part is powered with ±2.5 V, and 50 mV of input is
applied, the default conditions are
11886-003
•
•
•
•
Figure 4.
Figure 5 shows the results of the previous conditions with
VOFF = 2.5 V or Code 128.
VCC = 2.5 V
VSS = −2.5 V
Gain 1 = 4
Gain 2 = 17.5
Offset = VSS
[
]
T
T
The overall gain is 70.
1
When you place the switches in VNEG P1 and VPOS P2, there is
one set of outputs. When you change to VNEG P2 and VPOS P1,
you get the exact voltage, but with the opposite polarity.
RT0 and RT1 are the trim potentiometers used for pulse width
shaping. Do not change their settings. RT0 is adjusted to create
a 5 µs pulse; RT1 is adjusted to create an 80 µs pulse. Figure 4
Rev. 0 | Page 6 of 8
2
Ch1 50.0mV
BW
Ch2
2.00V
BW
M 400ms A Ch1
T 9.600%
Figure 5.
2.00mV
11886-004
When both switches are on one side (for example, VNEG P1 and
VPOS P1), the inputs are shorted together.
Data Sheet
AD8556-EVALZ
In Figure 6, overall gain = 100 (G1 = default = 4, G2 = Code 1 = 25,
offset = 2.5 V or Code 128).
[
[
]
T
T
]
T
T
1
1
2
Ch1 20.0mV
BW
Ch2
2.00V
BW M
T
BW
Ch2
2.00V
BW
M 400ms A Ch1
2.00mV
T 9.600%
Figure 9 shows the output after VCLAMP is set to 0.8 V.
Figure 6.
[
1
]
T
]
T
T
In Figure 7, VIN = 2 mV p-p and G1 = 6.4, G2 = 35, offset = 2.5
V or Code 128.
[
2.00mV
0.00000s
Figure 8. Normal Response
11886-005
Ch1 50.0mV
100ms A Ch1
11886-007
2
T
1
2
Ch1 20.0mV
BW Ch2
2.00V
BW M
T
100ms A Ch1
2.00mV
0.00000s
11886-008
2
Figure 9. Response with VCLAMP Set
Ch2
2.00V
BW M
400ms A Ch1
T 9.600%
–1.20mV
Figure 7.
[
OUTPUT CLAMP FEATURE
]
T
T
The output of the part can be clamped to the desired level. The
output clamp feature is provided to protect the circuitry that
follows the AD8556-EVALZ, in case the input to AD8556EVALZ is accidentally larger than anticipated.
1
In normal situations (VSUPPLIES = ±2.5 V, Gain = 70, VOFFSET =
2.5 V, Input = 40 mV p-p), the response to an input is as shown
in Figure 8.
2
Ch1 20.0mV
BW
Ch2
2.00V
BW M
400ms A Ch1
T 9.600%
–1.20mV
11886-009
BW
11886-006
Ch1 20.0mV
Applying a large gain to an input yields saturation, as shown in
Figure 10. The conditions are VIN = 20 mV p-p, G1 = 6.4,
G2 = 200, Offset = 2.5 V.
Figure 10. Results with Saturation
Note that Resistor RT1 and Resistor RT2 are used for pulse
stretching; do not adjust them. They are factory-adjusted for
optimal results.
Rev. 0 | Page 7 of 8
AD8556-EVALZ
Data Sheet
EVALUATION BOARD SCHEMATIC
EEPROM ID
VSS
C4
0.1UF
R5
100K
R3
100K
U4
8
VCC
VSS
AGND
1
E0
2
E1
5
SDA_0
SDA
3
E2
6
SCL
7
WC_N
VSS
4
M24C02-WMN6TP
EEPROM_A0
C10
0.1UF
SCL_0
AGND
AGND
3.3V/20MA
0
DNI
VSS
BLK
C2
10UF
AGND
0.1UF
GND
8 SN74LV123AD
R6
AGND
GND
7 SN74LV132AD
AGND VSS
0
DNI
GND
C18
VIO_+3.3V
VDD
U1
16
VCC
C9
0.1UF
R2
2
U2
14
VCC
100K
C7
0.1UF
R4
VDD
VDD
C3
0.1UF
C8
1
C1
10UF
0.1UF
VDD
BLK
GND
BLK
FIT IN 2.75X4.25 2 LAYER BOARD
DELETE NC PIN CONNECTIONS
FX8-120S-SV(21)
2K
R10
VDD
Q_N
4
DUT VCLAMP
3
VSS
DUT DIN
AGND
Y2 12
4 A3
Y3 11
0.1UF
C21
0
FILT OUT
8
1UF
13
10
SN74LV132AD
2
S2
VPOS
AMP227161-1
P2
C22
1
3
200
R16
3
2
+VINDC
BLK
0.1UF
2
2K
R17
2K
P1
200
9
11
P2
R13
2
EONE
12
C17
R21
S1
VNEG
P1
CHWT123M1D9AV2Q
3 A2
GPIO2
U2
CW
1
GPIO1
EZERO
U2
3
Y1 13
TP6
BLK
AGND
R14
2
CW
1
2 A1
J1
1
1
R12
VDD
VSS
SN74LV132AD
EN
Y4 10
GND
7
2K
8
R18
5 A4
2K
TP7
BLK
12
CLR_N
11
R15
TP3
BLK
VSS
-VINDC
BLK
OTS-8-16-1.27-03
1
3
U3
1
14
VCCAVCCY
GPIO0
AMP227161-1
AGND
5
USB_VBUS
TP1
BLK
TP2
BLK
C
J2
8
7 DUT OUT
6 DUT VCLAMP
DUT IN+
5
VDD
SN74LV123AD
VIO_+3.3V
AGND
SDA_0
SCL_0
GPIO1
Q_N
6
VSS
Q
R/C
1
2
3
4
R19
7
1
1UF
FILT OUT
DUT DIN
DUT IN-
SN74LV132AD
CHWT123M1D9AV2Q
5K
C13
AGND
X1
FILTER_OUT
BLK
2
U1
1000PF
R7
EONE
SIG_ONE
VOUT
BLK
10K
C19
VDD
VSS
ADG3304BRUZ
AGND
U2
TP5
BLK
4
SIG_ZERO
5
SIG_ONE
6
FX8-120S-SV(21)
SN74LV132AD
AGND
Figure 11. Evaluation Board Schematic
ORDERING GUIDE
Model
AD8556-EVALZ
VDD
R20
U2
SIG_ZERO 1
SN74LV123AD
9
A
10
B
VCLAMP
BLK
CLR_N
3
C20
C
VDD
0.1UF
14
VSS
13
JP1
Q
R/C
0.1UF
1000PF
R8
30K
C15
15
Description
Evaluation Board
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11886-0-10/13(0)
Rev. 0 | Page 8 of 8
11886-012
EEPROM_A0
1UF
D1
1N5817
GPIO0
GPIO2
5K
C14
0.1UF
C73
0.1UF
U1
1
A
2
B
C12
R1
EZERO
R11
C6
10UF
VIO_+3.3V
49.9K
C5
10UF
VIO_+3.3V
C72
0.1UF
VDD
TP10
BLK
C16
USB_VBUS
P1
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
R9
30K
USB_VBUS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
C11
0.1UF
P1
TP4
BLK