XII.
PROCESS ANALYSIS AND SYNTHESIS
Dr. M. V. Cerillo
Prof. H. J. Zimmermann
A.
J. S. MacDonald
Rita K. Toebes
G. N. Humphrey
RECTANGULAR WAVE GENERATOR
In the course of our present research, a need arose for a device capable of gener-
ating a rectangular wave of finite duration in which the interval and the amplitude of each
segment are adjustable.
The basic building block
Such a device has been developed.
for the system is an adjustable delay circuit from which an adjustable level is brought
EMITTER- FOLLOWER OR - GATE
1
V1
lb
V2
2b
y
V3
3a
3
y
b
2
(N - )b
(N -1),
VN-1
1
--
(N - )b
VN
Na
V2
f
V3e
OUTPUT
.
v
VN
-. N
N -1
TIME -
(b)
Fig. XII-1.
System operation.
*This work was supported in part by the National Science Foundation (Grant G-16526),
the National Institutes of Health (Grant MH-04737-03), and the National Aeronautics and
Space Administration (Grant NsG-496).
QPR No. 73
135
(XII.
PROCESS ANALYSIS AND SYNTHESIS)
out.
The delay circuit, which is housed on a standard printed circuit plug-in card may
be generally useful, and since it is inexpensive and easy to build, it is reported here in
some detail.
A block diagram of the rectangular-wave generator appears in Fig. XII-la. Waveforms pertinent to Fig. XII-la appear in Fig. XII-lb. The delay circuits fire in sequence
after a trigger fires delay 1. Their level outputs pass through the emitter-follower
or-gate shown in Fig. XII-la which selects the most positive of its inputs which, of
course, comes from the particular delay circuit that is on at any given time. A typical
output waveform is shown in Fig. XII-2.
E
IFig.
XII-2.
Typical output waveform.
4 msec /cm
The detailed circuit diagram of the delay unit is shown in Fig. XII-3, in which Q1
and Q2 form a conventional monostable multivibrator. The range of time delay available
with the values shown is from ~0. 2 msec to ~8 msec. The circuit requires a trigger
current of approximately 0. 2 ma flowing out of the base of Q1 in order to turn this transistor on.
This means that with R 1 2 = 15 K as shown, the minimum trigger pulse is
approximately 3 volts negative. Lowering R 1 2 lowers the required trigger voltage. The
recovery time of the monostable circuit is approximately 5R 1 C 1 or 0. 75 msec for the
values shown. The duty cycle is thus limited on short delays. CR 3 serves to decouple
the collector of Q2 from C 2 and C 5 during the turnoff of Q2. This hastens the fall time
of the collector waveform
of Q2
In order to trigger an identical circuit from the trailing edge of the monostable waveform, an inversion of the differentiated trigger pulse is required. This is provided
by Q3'
Q5 acts as the contribution of this particular delay unit to the emitter-follower
or-gate referred to in Fig. XII-1. Note that full advantage is taken here of the unusually
high reverse base-emitter voltage rating of the 2N1306.
QPR No. 73
136
zf
R8
RR
R6
18OK
-R6
15 K
CR
R 12
ZO
IN
15 K
I001pf I
N2N307
O
BOARN67A
2NI307
C4
R
0.1.f
>
C
R5
390
pf
47 K
Tc
1
B,Y
Tc
4
R2
CR3
27K
2.2 K
IN67A
360 pf -C
3
2
J,U
C
RI
I.5K
R3
lOOK
R4
5.6 K
i
> R5
510
5.6 K
1-12
T
K - KEY
NOTE: PRINTED CIRCUIT BOARD
CONTAINS 2 IDENTICAL UNITS.
Fig. XII-3.
Circuit diagram.
(XII.
PROCESS ANALYSIS AND SYNTHESIS)
TURN-OFF
DELAY
OUTPUT OF
DELAY CIRCUIT
-
Vl
V2
OUTPUT OF
SUCCEEDING
DELAY CIRCUIT
V2
RECTANGULAR
WAVE
V1
V2
OUTPUT
VWITH DELAY
UNWANTED SPIKE
WITHOUT DELAY
Fig. XII-4.
WITH DELAY
Effect of delaying turnoff.
In order to ensure clean transitions of the output rectangular wave,
it is necessary
to delay the turnoff of one delay circuit until the succeeding one has
come full on. This
is illustrated in Fig. XII-4. In the circuit shown in Fig. XII-3, the
delay of the turnoff
is ~4 sec, and is accomplished by
C 3 in conjunction with R
1 4 and CR 2 .
R 13
5/cm
-*- COLLECTOR 03
I0 v/cm t
5v/cm
COLLECTOR Q2
I-
OUTPUT
20/ sec/cm
Fig. XII-5.
Circuit waveforms.
determines the amplitude of that segment of the rectangular wave controlled
by this delay
unit. R 3 clearly controls its time duration. Actual waveforms from the circuit
appear
in Fig. XII-5. Rise and fall times are ~1 isec.
The physical layout of the delay unit is shown in Fig. XII-6. The printed circuit
card
QPR No. 73
138
(XII.
Fig. XII-6.
PROCESS ANALYSIS AND SYNTHESIS)
Printed circuit card.
measures 4. 2 inches X 4. 375 inches, and each card houses 2 delay circuits.
It mates
with a standard 22-pin connector.
Power requirements for each card (2 delays) are as follows:
+12 volts,
2. 5 ma
+6 volts,
32
ma
-6 volts,
17
ma
volts,
17
ma
-12
needs; minor modificaThe circuit shown in Fig. XII-3 was designed to fulfill our
in which a similar wavetions, however, would make it suitable for other applications
form is needed.
J.
QPR No. 73
139
S. MacDonald