Microscale Thermal Engineering of
Electronic Systems
Ken Goodson
Thermosciences Division
Mechanical Engineering Department
Stanford University
Key Points
1. Self Heating of Transistors
and Interconnects
IBM
2. Nanothermal Devices for
Information Technology
silicon
15 µm
IBM Zurich / Stanford
3. Microscale Technologies for
Heat and Power Management
Solidstate EO
pump
Microprocessor Thermal Challenges
ESD
Metal Heating
Texas Instruments
Metal 1 (AlCu)
W-plug
Silicon Dioxide
Thermal
damage
TiN
Siemens
Novel Materials
0.2 µm
1 µm
n+ Silicon Diffusion Region
Novel Geometries
IBM
Strained Silicon / Si Ge
UC Berkeley/AMD
Nanotransistors
Gate
Gate
Source
Source
Drain
Strained-Si
channel
Drain
Source
Relaxed SiGe
SiO2
Si substrate
Si substrate
Strained-Si FET
Thin Body SOI
Tbody
Gate
Source
Drain
Graded SiGe
Lch
Classic Bulk FET
Tbody
Gate
Drain
Gate
Drain
Gate
Source
Double-Gate SOI
FinFET
(Purdue, IBM)
(UC Berkeley, AMD, IBM)
Transistor Electrothermal Physics
HighImpact
Electric of Device
Approximate
Field
Scaling on Peak Phonon
Temperatures
Hot Electrons
(Energy E)
lattice wave
λ
electron
field
Λ
intense
electron-phonon
scattering
phonon
E = hω
dopant
atom
E < 50 meV
τ ~ 0.5ps
E > 50 meV
τ ~ 0.1ps
Optical
OpticalPhonons
Phonons
τ ~ 10 ps
Acoustic
AcousticPhonons
Phonons
d
Heat Transfer
to Package
Channel
Length L (nm)
phonon
Material boundary with roughness η
Pop, Banerjee, Dutton, Goodson,
Proc. IEDM 2001
Power Q’ (µW/µm)
IBM
∆T Increase (K)
225 nm
Transistor Simulation Regime Map
Atomistic
Nanotransistor Regime
phonons
~5 nm
~100 nm
~5 nm
~1 nm
Research
needs for
the future
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Moments
BTE or
Monte Carlo
Drift Diffusion
Lattice
BTE with
Wave models
Electron Drift
& Phonon
Generation
at 40kV/cm
Thesis work of
Eric Pop, 2003
Phonon Emission
•
•
•
Monte Carlo, 300 electrons at 300 K
Electric Field starts at 0.5 ps
Eavg jumps from 39 meV to 290 meV
Interconnect Thermal Management
d ILD
2
1 .7
~
j
d
ρ
η
N
MET MET
Peak ∆T
k ILD
Student: Sungjun Im. Sponsor – MARCO
o
Temperature [ oC]
Temperature Rise ( C)
220
100
50 nm
200
209 °C
Global Wires
35 nm
180
50
160
70 nm
100 nm
130 nm
140
180 nm
1200
0
2
4
6
8
10
Distance from Substrate [µm]
Temperature Contour Plot
(50 nm technology node)
The temperature rise in interconnects is small now, but compounding trends in
the ITRS roadmap lead to a tremendous increase at the 70 nm node beyond
low-k dielectric materials
increasing current densities and aspect ratios
increasing number of interconnect layers
Nanoscale Thermal Data Storage
IBM Zurich: Vettiger, Binnig
Stanford: King, Kenny, Goodson.
See King et al., Applied Physics Letters 78, 1300 (2001)
Data Writing
Ibias
Data Reading
Ibias
∆T ~ 300 K
“0”
∆T ~ 5 K
100 nm
Stanford University
Ibias
“1”
∆T reduced
Cantilever Array
Micro- and NanoMechanics
Zurich Research Laboratory
Microrocessor Thermal
Management
Heat Sinks,
Heat Pipes,
Vapor Chambers
~ 102 cm3
ASICs
~1 cm3
RAM
~10-1 cm3
Power Delivery
~1 cm3
~10 -1
cm 3
Video
~10-1 cm3
HOTSPOTS
Microprocessor heat sinks are 3000
times larger and heavier than the chip
They crowd away power delivery
components, ASICs, RAM, and Video
Interdisciplinary Grand Challenge:
Integrated Power Delivery & Heat Removal
Groups of Goodson, Kenny, Santiago, Saraswat, Stanford Mechanical Engineering
Groups of Thompson & Troxel, MIT Materials and Electrical Engineering
Thermofluidic Mixed-Signal Power Module (Sponsors: SRC/MARCO & DARPA)
Photonic I/O
Electrical
Connections
RF
Integrated MEMS
Sensing
Fluidic I/O
Mixed Signal Chip
Fluidic
Cooling
Thermofluidic Module with Solid-State Pump (Sponsors: Intel & DARPA)
Free I/O Integrated EO
targeted, on-demand
Fluid
Surface Pump/controller
Electrical
microchannel cooling
Connections
Mixed Signal Chip
ElectroOsmotic Microchannel Cooler
Sponsors: DARPA, Intel, AMD, Apple. Trans CPMT (2002). Best Paper SemiTherm 2001
PIs: Goodson, Santiago, Kenny, Stanford ME
2001: 30 W Demo, 1 cm2 (Intel)
2002: 100 W Demo, 1 cm2 (Intel)
2002: 150 W Demo, 4 cm2 (Intel)
2002: Laptop Demo
2002: Apple Dual Processor Demo
2003: AMD Demo
ElectroOsmotic Pump
Heat Rejector
+
Silicon
dioxide
wall
High-Pressure
Liquid Pumping
~ 50 nm
Charge
double-layer
+
+
+
+ +
+
Charge Double
Layer
Microchannel Heat Sink
Micro Heat Sink
Channels
In silicon
EO Pump
Stanford/Intel 100 W Demo
EO Pump Flowrate ~ 20 ml/min
Thermal
attach
Si chip
Pyrex seal
-
ElectroOsmotic Pumps
With groups of Santiago and Kenny, Stanford Mechanical Engineering
Sponsor: SRC/MARCO, DARPA
Idealized pore channel:
Glass or fused-silica capillary wall
EOF
+
Charge
double-layer
Freestanding
pump
-
1 cm
+ +
+
+ + ++ + +
+ ++ + ++ +
Deprotonated silanol
groups
εζE dp (a 2 − r 2 )
u (r ) =
−
µ
dx
µ
Qmax
εζ VA
32εζ
=
∆pmax = 2 V
µ l
d
•Very high volume to flowrate ratio
•Stanford pump performance (Feb 2002)
Pmax ~ 2 atm, Qmax ~ 40 ml/min, Vol. ~ 2 cm3
2370 Charleston
Mountain View, CA 94043
www.cooligy.com
Cooligy develops thermal
management components based on
electro-osmotic pumps and novel
microscale heat exchangers
Heat Rejector
• Founded in 2001 by Stanford Profs.
Ken Goodson, Tom Kenny, Juan
Santiago, Mechanical Engineering
• 24 employees (Feb 2003) with
engineering expertise including
chemical, mechanical, packaging,
thermal, & fluidic specialties
• Experienced management and
directors drawn from Intel, Dell,
Corning, Silicon Light Machines.
Micro Heat Sink
EO Pump
• Focussing on reliability
demonstration, product
implementation, collaboration with
computer manufacturers
Concluding Remarks
•
The next decade of IC research & development will bring
solutions to “secondary” challenges associated with Moore’s
Law, such as power delivery, heat removal, and package
integration.
•
IC thermal management problems will have lengthscales
spanning six orders of magnitude, from 10 nm in
nanotransistors to more than 10 cm at the package level.
•
Novel materials and geometries are increasing
micro/nanoscale on-chip thermal resistances, leading to
hotspots in metallization and interconnects.
•
Circuit design focuses computation on the chip, yielding
mm-scale hotspots that dramatically increase the thermal
resistance from the chip to the package.
Goodson Microscale Heat Transfer Group
Thermosciences Division, Mechanical Engineering Department, Stanford
Current Students and Post-Docs (AY 2002/2003)
Dachen Chu (Physics)
Xuejiao Hu (ME)
Sungjun Im (Materials Science)
Kevin Ness (ME)
Jae-Mo Koo (ME)
Yue Liang (ME)
Angie McConnell (ME)
Eric Pop (Electrical Engineering)
Monikka Mann (ME)
Sanjiv Sinha (ME)
Evelyn Wang (ME)
Ankur Jain (ME)
Dr. Linan Jiang
Dr. Abdullahel Bari
Dr. Samuel Graham (Visitor from SNL)
Alumni (1999-2002)
Prof. Mehdi Asheghi
Prof. Dan Fletcher
Prof. Bill King
Prof. Katsuo Kurabayashi
Prof. Sungtaek Ju
Prof. Kaustav Banerjee
Dr. Uma Srinivasan
Dr. Per Sverdrup
Dr. Peng Zhou
Dr. Maxat Touzelbaev
Carnegie Mellon University (ME)
UC Berkeley (Bioengineering)
Georgia Tech (ME)
University of Michigan (ME)
UCLA (ME) – with IBM until Fall 2003
UC Santa Barbara (EE)
Xerox
Intel
Cooligy
AMD