PERFORMANCE LIMITATIONS AND DESIGN CONSIDERATIONS
FOR
FILTERS
FDNR IMPLEMENTED
by
JAMES BURKE
UTCHISON
Submitted in Partial Fulfillment
of the Requirements for the
Degree of Bachelor of Science
at the
Massachusetts Institute of Technology
May,
1978
Signature redacted ......
Signature of Author.
Departmentlof Electrical Engineering,
Certified by
Accepted by.....
May 25, 1978
Signature redacted
Thesis
Signature redacted
.................
Chairman, Departmental Committee
A
JU~IN
VES
7T.
JUN 8 1978
Supervisor
on Theses
2
PERFORMANCE LIMITATIONS AND DESIGN CONSIDERATIONS
FOR
FDNR IMPLEMENTED FILTERS
by
JAMES BURKE HUTCHISON
Submitted to the Department of Electrical Engineering on May 26,
1978 in partial fulfillment of the requirements for the Degree
of Bachelor of Science.
ABSTRACT
Four implementations of a 12 kHz, 5th order elliptic filter which
use FDNRs are studied.
Characterization
of and design considerations
pertaining to useable dynamic range of the filters
is
presented.
Computer simulation and empirical measurements are made on at least
two
of the filters to verify results. It is found that filter dynamic range
can be increased by 3 dB without a significant degradation of filter
accuracy.
An attempt is made to characterize the stability of FDNRs
in the presence of stray impedances.
Also, a design procedure
obtaining an FDNR implementation of an elliptic
filter
inherent DC response is presented.
Thesis Supervisor: Francis F. Lee
Title: Professor of Electrical Engineering
for
which posesses
3
ACKNOWLEDGEMENTS
I would like to express my thanks to:
Prof. Lee for his excellent advice and enthusiasm
Douglas White for his patience in the face of my
developing ideas
George Yundt for a 24 hr. components hotline
and my special thanks to
Prof. Paul Penfield, who used his own time to get
me started on MARTHA, and helped
thereafter.
4
CONTENTS
Abstract
2
Acknowledgements
3
List of Figures
5
List of Tables
6
Introduction
7
Section I
Section II
Section III
Limitations on Maximum Signal Magnitude
Stability
Design Optimization
7
18
21
Conclusion
27
Suggestions for Further Research
27
Personal Communications
28
References
29
Appendix A : An FDNR Cookbook Design Procedure
30
Appendix B : Obtaining an FDNR Implementation
with DC Response
32
Appendix C : Design of the Filter Examples
35
Appendix D : Derivation of Peaking Magnitudes
Inside the FDNR
40
Appendix E : Programs
41
5
FIGURES
1.
A doubly-loaded 5th order 12 kHz elliptic filter, normalized
8
2.
A singly-loaded 5th order 12 kHz elliptic filter, normalized
8
3.
Implementations of the FDNRs used in the 12 kHz filters
9
4.
A model to achieve the transfer function V
5.
A model to achieve the transfer function V
6.
Component Location Cases affecting V2 /Vd and V /V
14
7.
Peaking frequency shift due to increasing V2V d and V /V
14
8.
The classical feedback model
18
9.
V /V.
10.
Frequency response of a 5th order elliptic filter; general
11.
A normalized,
12.
Figure 11 reversed left-to-right
33
13.
The singly-loaded prototype,
33
14.
Converting the filter transfer function to V /V.
34
15.
1/s impedance transformation of Figure 14
34
16.
Normalized RLC 5th order filters studied
35
17.
Frequency scaled,
18.
The FDNR topology used in the 12 kHz filters
37
19.
A typical output buffer used with actual implementations
38
20.
The FDNR topology, general case
40
21.
Circuit implementing a computer model of V 2/V
42
22.
Circuit implementing a computer model of V /Vd
42
23.
Computer modelling of a real FDNR
46
o
in
frequency response of the 12 kHz,
dl
d2
/V.
11
/V.
11
in
in
singly-loaded filter
singly-loaded RLC prototype filter
after action by reciprocity
o
FDNR implementations
in
of Figure 16.
1
26
30
33
36
6
TABLES
1.
Computer simulation of peaking, V /V
2.
Computer simulation of peaking,
3.
Empirically-measured peaking of the 12 kHz,
d
in
V /V
2
in
results
and
10
V 4/V
4in
singly-loaded
filter
4.
Components to implement exact minimum peaking FDNRs
5.
Components to implement
6.
results
(practical) approximate minimum
peaking FDNRs
Verification of peaking performance of the 12 kHz filter
with minimum peaking FDNRs
16
17
24
24
25
7.
Components
implementing the 12 kHz filters
studied
37
8.
Components implementing the 12 kHz filters
studied
37
9.
Relevant performance parameters of the XR-4212C
39
7
INTRODUCTION
The Frequency Dependent Negative Resistor (FDNR) is an active circuit
which permits the implementation of RLC filters without using inductors.
Low-pass elliptic filter circuits using the FDNR have been seen in several
commercial applications. The frequency response accuracy of these circuits
has been studied in the literature,
however, other qualities of the cir-
cuitry also affect performance. This research is an attempt to characterize several performance aspects of FDNR implemented filters,
and present
tradeoffs which will be useful in a practical design environment.
readers not totally
A,
The
familiar with FDNR usage are referred to Appencices
B and C.
SECTION I : LIMITATIONS ON MAXIMUM SIGNAL MAGNITUDE
Due to the high Qs that exist in the elliptic filter configuration,
a significant amount of signal "peaking" occurs at the outputs of the
operational amplifiers near w=w , the cutoff frequency of the filter.
The operational amplifiers used in the FDNRs have a finite maximum output
swing which must not be exceeded to prevent clipping and resultant disThus peaking of the signal inside the filter
tortion.
limits the maximum
input signal to a value somewhat less than the maximum swing of the operational amplifiers,
and this
value defines the upper limit of the filter's
dynamic range.
FDNR implementations of doubly-loaded elliptic filters do not
inherently posess response at DC,
of the prototype
implementation
procedure
(RLC)
filter
because the resistive
input impedance
is transformed into a capacitor in the FDNR
(Figure 1). Professor Francis Lee has developed a design
(as yet unpublished,
see Appendix B) which derives an equiv-
8
L
1
L 3L5
1.2752
1.7522
L2
V.
.64
0
--
FDNR#1
V
FDNR
Figure 1
V
#2
.785891
1.0584
A doubly-loaded, 5th order 12 kHz elliptic
filter, normalized to w =1.
L
L3
1.1435
L5
1.2671
L
2
.5286
.5384
L
4+
.2314
1 --
+
_
FDNR
#1 1.0089
V
dl
-
FDNR
#2 -
1.0934
V
V 0
o
d2
-
V.
in
L
-
in
.22878
.9789
Figure 2 : A singly-loaded, 5th order 12 kHz elliptic
is identical
V /V.
filter, normalized to w =1.
0
0
in
to the doubly-loaded version. Derivation of
these filters is presented in Appendix C.
alent FDNR implementation of the filter that does posess DC response
(Figure 2).
It was proposed to study peaking performance of both the
singly- and doubly-loaded implementations of this filter, to determine
if dynamic range has been sacrificed for response at DC.
9
yini. vdl' Vd2
Y. ,125
in
C
1
FDNR
D = RA
singly-
#1
1.0089
loaded
#2
1.0934
doubly-
#1
1.10584
loaded
#2
.78589
Filter
V
A
+
R
-
= Ds
R
2
.5655
2
2
V
3
R
R3
B
.5655
B
4
R4
Figure 3 : Normalized implementations
of the FDNRs used in the 12 kHz
V5
C Il_
filters. C 1 , R 2 , R 3
the same for all
of D is
and C5 are
FDNRs; the value
determined by R 4.
See
Appendix C.
As can be seen from Figures 1-3, because output swing of the
operational amplifiers limits the maximum input signal, we are interested
in the voltage gain from the filter input to the output of each operational amplifier. However,
considering that the FDNRs used in both
filters are very similar, whereas the filters themselves are not, it
was decided to study peaking in two phases: determining first the
voltage gain from the filter input to the FDNRs
(V. /V
in
dl
and V
in /V d2 ),
and then finding voltage gain from the input of the FDNRs to the
output
10
of the operational amplifiers (V2/V
and V 4/V
etc.).
In this way
properties inherent to the FDNR can be separated from properties of
the filter.
1)
Voltage Gain from the filter
input to the FDNRs.
It will be noted that this voltage gain is independent of the
FDNR implementation used,
and is solely a function of the filter:
the FDNRs were represented by ideal components having the relation
Y.
in
= Ds
2
. The voltage gain was computer simulated with the aid of
the MARTHA APL-based circuit
( Penfield,
design package
compute voltage gain of a network using MARTHA,
1971).
To
the network must be
presented as a two-port. Thus we transform each of the filters shown
in Figures 1 and 2 into two circuits, rearranged such that the output
appears across FDNR#1 or FDNR#2
(see Figures 4 and 5).
Magnitude of
the voltage gain for these networks is then computed. Because MARTHA
Filter
singly-
loaded
computed
transfer
function
peak
magnitude,
dB
dl
7.87
V.
at w
1.019
in
Vd 2
3.43
V.
.973
in
Vdl
doubly-
loaded
V dl3.0
in
Vd 2
d V.
V.
1.043
3.22
.996
in
Table
1
: Computer simulation of peaking,
V /V
d
in
results
11
L
L1
L3
L
V.
in
L
4
FDNR
#1
5
_
dl
-T
FDNR
___
#2
Figure 4 :
d2
A model to achieve the transfer
function V
L
/Vin*
L
L
L2
+
L5
++FDNR
FDNR -_
-
V
V
#1
Figure 5
A model to achieve the transfer
function Vd2 /Vin
function
These models are implemented by
programs EVALNETl and EVALNET2
(Appendix E) . Figures
4 and 5 represent the singly-loaded
the doubly-loaded filter,
in series with V.
in
filter:
a unit capacitance
to model
is
added
d2
12
computes the transfer function at a number of discrete frequencies,
care must be taken to insure that our resolution
"catch" the actual peak value. This is
is high enough to
verified from the results
by
increasing resolution until the slope of the transfer function is seen
to approach zero on either side of the peak.
Results are presented in
Table 1. We see, assuming similar peaking behavior of the FDNRs
(this
will be verified later), that the largest peak signal value Vd inside
the singly-loaded filter
is
4.6 dB greater than for the doubly-loaded
one.
The doubly-loaded filter has a 6 dB,
frequency independent in-
sertion loss due to matched source and load impedances.
frequency,
V
Thus at any
of the doubly-loaded filter will be 6 dB down from V
of the singly-loaded one. This 6 dB loss appears in our peaking results
If we were to measure peaking at Vd
with reference to the filter output
(i.e. measure V
dl /V o and V d2 /V o
)
for the doubly-loaded filter.
we find that the maximum output amplitude of the singly-loaded filter
is
(4.6 -
6) =
(-1.4) db less, that is, 1.4 db greater than that of the
doubly-loaded filter.
The distinction being made depends on which voltage inside the
filter constrains the maximum input amplitude.
was V d
then V.
d
in
If the only constraint
for the doubly-loaded filter could be nominally twice
that of the singly-loaded one, yielding a signal amplitude, after the
source impedance, roughly equal to V.
in
ever,
of the singly-loaded case. How-
in most applications the insertion loss of the doubly-loaded
filter is recovered by a gain-of-two amplifier at the output of the
filter.
Assuming that this amplifier has the same maximum output swing
as those used in the FDNRs, then V.
in
cannot be twice that of the singly-
13
loaded filter, because the output amplifier would clip. Therefore,
under the assumption that the output of the doubly-loaded filter is
amplified to achieve 0 dB insertion loss,
the filter at peaking, and V /V
d
in
Vd is the largest signal in
reflects actual circuit constraints
on the maximum signal magnitude.
2)
Voltage gain from Vd to the operational amplifier outputs.
First, we must characterize V2 and V 4,
puts of the operational amplifiers,
the voltage at the out-
as functions of Vd and Ds2
(see
Figure 3).
V4
Vd
(1
-
DZ s
2
)
2-- =
Vd
d
Z4 + Z5
Z5
Derivation of these relations is given in Appendix D. Referring to
Figure 20, the FDNR can be implemented with two capacitors
in any two of positions Z1 , Z3 or Z
located
To preserve the generality of
our results, three Component Location Cases
(CLCs) which represent
the possible combinations must be considered. They are shown in
Figure 6. For the 12 kHz filters studied,
result
R2
=
R3 and C
= C5 as a
of the way components were chosen to implement the FDNRs.
function
The transfer
frequency,
but all
with frequency.
everywhere,
transfer
V 4/V
of CLC C is independent of
the other transfer functions
The magnitude of the
has a bona-fide peak.
the filter
for
filter,
increase linearly
transfer
function V /V.
Adding a monotonically-increasing
d
in
function to
function has the effect of increasing its
slope
thus shifting the frequency of the peak to a higher value
14
CLC A
CLC C
CLC B
Z1 is a resistor
Z1 is a capacitor
Z1 is a capacitor
Z5 is a capacitor
Z5 is a capacitor
Z5 is a resistor
Y in =Ds
Y i Ds
v
2
Yi =Ds
V4 j
4
5
5
vd
in
vd in
V5
5
R
R4
v Jd
V5
i 55
VTC1
in
V5
vi't5
V2
2
V2
2
lflV4
+
(1- DR1 w
IV
4
5
V
(
V
(RCw)2 +1
=[
R +R5
4
45
Vd
RC 5 w)2 +1
Figure 6 : Component Location Cases affecting the transfer
functions IV 2 /V d
and
jV4 /V d.
sum
Figure
V /V
1 d
v /V
d
frequency
in
7 : Peaking
frequency shift due
to increasing V2
/Vd
and V4 /V
.
it
a)
15
(see Figure 7).
peak V2
Therefore, it
is necessary to find the frequency of
or V 4 before the contribution of the FDNR, IV 2
/V d or V 4/Vd
can be found.
Twelve cases are considered:
there are two filter topologies,
each filter has two FDNRs, and each FDNR has three Component Location
Cases.
Results are presented in Table 2.
3) Interpretation of Results
It is seen that V2 /Vd and V /Vd are much weaker functions of
frequency than V /V
d
in
, because at our frequency resolution the freq-
uency of overall peaking
uency of V /V.
d
in
(V2 /V. , etc.) was different from the freq-
peaking for only a few cases.
It is noted that for each FDNR, the magnitude of V2 /Vd is equal
to the magnitude of V 4/Vd for CLC B.
This is not a general result;
it is due to the method of choosing components inside the FDNR, i.e.
5= 1, thus from Figure 6
2
V
=
d
D
C
w 2
1
+1
=
R C w 2
4 5
+1
4
-
R 4=D and C4
V
Vd
For the particular component values studied, notice that CLC C
(corresponding to capacitors located in Z
in Z 5) has a much higher peak contribution
CLCs, and thus this
arrangement
and Z 3 , and a resistor
V 4/Vd
of the components
than the other
should be avoided.
The actual 12 kHz filters studied correspond to CLC B, which has the
lowest FDNR contribution at peak for the component values used.
Assuming all operational amplifiers in the filter have the same
maximum output swing, the maximum input signal amplitude is constrained
by the highest peak magnitude in the circuit.
For CLC B,
in both the
#
filter type
and FDNR
filter
peaking
transfer
function
component type
and value
FDNR#l
D=R
ZI
z5
R .5655
B
C 1.0
C
C 1.0
A
R .5655
1.0089
d2
FDNR#1
doublyloaded
FDNR#2
V
4
frequency of
largest peak
w=-
4
Vd
V.i
in
Vd
V.
in
C 1.0
7.87
4.04
11.91
3.13
11.0
1.019
C 1.0
7.87
3.13
11.0
3.13
11.0
1.019
R .5655
7.87
3.13
11.0
8.89
16.76
1.019
C 1.0
3.40
4.15
7.56
3.40
6.80
.996
I
C 1.0
3.40
3.40
6.80
3.40
6.80
.996
C 1.0
R .5655
3.43
3.40
6.83
9.35
12.78
.973
A
R .5655
C 1.0
3.0
4.51
7.51
3.67
6.68
B
C 1.0
C 1.0
3.0
3.67
6.68
3.67
6.68
3.0
3.67
6.68
9.41
12.42
1.043
3.09
3.30
6.39
2.07
5.29
1.019
3.22
2.07
5.29
2.07
5.29
.996
3.22
2.07
5.29
7.57
10.78
.996
B
C 1.0
C
1.0934
V.
in
doublyloaded
V
2
V.
in
_
singlyFDNR#2
V
V.
in
loaded
2
III
_II
dl
V
Vd
CLC
A
singlyloaded
peak magnitude, dB
I~I
I
dl
V.__
in
d2
1.1058
_
C
C 1.0
R .5655
A
R .5655
C 1.0
B
C 1.0
C
C 1.0
.78589
_
__
C 1.0
_
1.043
1.043
_
_
_
_
_
_
V.
in
R .5655
Figure 2: Computer Simulation of Peaking
Vin
V2
and 14
Vin
results.
ION
17
singly- and doubly-loaded
filters,
occurs at V dl.
this
For the singly-
loaded filter, peak Vdl is 4.3 dB higher than for the doubly-loaded
filter. Thus we have confirmed the earlier result that the contributions
of the FDNRs to peaking are all similar, and that 4.3 db of dynamic
range has been traded off for DC response in the singly-loaded filter.
The discussion, presented earlier, on the 6 dB insertion loss of the
doubly-loaded filter, also applies to the above results.
To verify the computer models, empirical measurements were made
on the singly-loaded,
in Table
12 kHz filter
(Figure 17).
These results,
3, correspond closely with the values obtained from the
simulation. The 12 kHz filter represents CLC B.
peaking
transfer
function
V2
V.
FDNR
--
pa
dB
10.37
in
11.0
.-
---
V
4
expected
values
from
Table 2
-
-
_-.-
-_ --
1.014
--
-
12153
1.013
6.19
6.80
11379
.948
--------
- - --..-.
6.19
6.80
Vi
in
Table 3
12165
equivalent
normalized
11.0
V.
in
V4
measured
10.37
V.
in
FDNR
#2
peak frequency
---
----..---11500
.958
Empirically measured peaking of the 12 kHz
singly-loaded filter.
shown
18
SECTION II
: STABILITY
For the topology we are using to implement the FDNR, and assuming
dominant-pole operational
has shown that
amplifier behavior,
the FDNR is
Leonard Bruton
absolutely stable.
His results,
(1970)
however,
do not extend to the case where a stray impedance to ground is connected to nodes 2,
3, or 4 in the FDNR (refer to Figure 3).
It has been found empirically that at least two FDNR implementations
having capacitors located in Z
and Z5
(CLC B) will oscillate
when a 1OX oscilloscope probe is connected to node 3.
V.
as
0
The singly-loaded
Figure 8
The Classical
Feedback Model
loop transmission =
12 kHz filter
ically
displays this
phenomenon.
It
(-a(s)f(s))
has also been found empir-
(personal communication, Dave Dunetz,
1977)
that implementing
lead compensation by placing a 10 pf capacitor in parallel
R2 and R
in this
filter
will prevent oscillation.
probe exerts a loading of 1OMohm in parallel
tance of the probe is
tances encountered
The oscilloscope
with 14 pf.
The capaci-
of the same order of magnitude as stray
due to circuit construction
desired to characterize the stability
stray impedance.
with each of
To this
techniques.
It
capaciwas
of the FDNR in the presence of
end the development of a general stability
model was attempted.
The first attempt was to model the FDNR as a classical feedback
system
(see Figure 8), having a forward path and feedback path.
19
Examination of the loop transmission of this model permits evaluation
of relative stability.
The model is very complex,
however, and in
addition a new model must be created each time the circuit topology
is altered by the inclusion of a different stray impedance. This
approach is
valid,
and results are general in nature;
but it
was aban-
doned due to complexity.
A second approach attemped was to examine an arbitrary loop
product inside the FDNR. Conceptually, a circuit may be broken at any
point and a test source inserted. If the signal appearing on the other
side of the break due to the test source is found to have greater than
unity gain at zero phase,
it can be assumed that the circuit will oscil-
late. Referring to the FDNR model shown in Figure 23,
it can be seen
that there is no point in the circuit which, if broken, will interrupt all
feedback at once.
Therefore this
type of analysis will not
necessarily indicate the presence of instability;
however,
if
instab-
ility is indicated, it is a sufficient condition for oscillation. It
was chosen to break the circuit at the output of operational amplifier
A,
both for modelling convenience and because empirically the oscillation
appears at the outputs of both operational amplifiers in the FDNR.
Unfortunately,
the model did not indicate
instability
for any of
the tested cases, even those known to oscillate. There are two probable
reasons for this failure. First, the model does not necessarily indicate oscillation. Second, the empirically measured oscillation occurs
at a frequency
(1.37 MHz or higher)
at which higher order poles may be
expected to exist in the open-loop gain of the operational amplifiers.
These poles were not specified for the operational amplifiers used in
20
the empirically measured circuit, and thus it was not felt to be valid to
incorporate them into the operational amplifier models used for computer
simulation. Assuming the existance of an additional pole in the openloop gain of each operational amplifier at the frequency of oscillation,
900 of additional negative-feedback loop phase would be obtained at this
frequency, and the model would have predicted instability.
Although unsucessful in characterizing stability, we are able to
examine the effect
of lead compensation
on the input admittance of the
FDNR implementation, and thus its effect on overall filter accuracy.
Examining the input admittance relation
2
= Ds
Y
in
2
=
1 3 5
=
1 5R2R4s
Y2Y
R3
and noting that the lead compensation capacitors appear in parallel
with R2 and R 3,
other out,
thus having no effect on input admittance.
found to be true.
filter,
it would be expected that they should cancel each
The normalized version of the singly-loaded 12 kHz
with appropriately normalized lead capacitors,
using MARTHA.
This has been
Deviation in filter
response
was modelled
in comparison to the filter
without lead compensation was negligible. The same filter was empirically tested with and without lead compensation. Finite errors were
expected in the transfer function due to tolerance of the lead capacitors.
There was error, but very little: disparity between the two
filters was less than .1 dB across the passband, with greatest error
occurring near w=l.
to the fact that Y.
Error with lead compensation is also undoubtedly due
in
is an approximation, and thus the two capacitors
don't exactly cancel each other
out in the input admittance.
21
SECTION III
: DESIGN OPTIMIZATION
In the 12 kHz filter studied in Sections I and II, components
implementing the FDNRs were picked on the basis of design convenience
and minimization of part types. Now we address the question: can specific aspects of filter performance be optimized by the design of the FDNR?
1) Filter Accuracy
The FDNR input admittance
Y3 Y5
Y. Y.=Y1
=
in
Y2 4
is an approximation. It is a well-known result
(Bruton, 1970) that
the input admittance becomes exact in the limit, assuming dominant
pole behavior:
1
1 a1T1s+l
2
1
a2T2s+l
However, this relation A =A2 is never exact in a practical environment.
Martin and Sedra
(1977)
have shown that for minimum deviation from
ideal filter performance,in the case where A 1
itors,
A 2'
Z
and Z5 are capac-
and w'+w , the desired relations are
0
R 2=R
w'C5 R 4=1
where w'
is the frequency at which maximum group delay occurs. These
conditions minimize the effect of non-ideal operational amplifier
performance,
resulting in
Q-.ooat w=w'.
The peaking performance of the FDNR designed with the above constraints can be evaluated in the general case.
For a second order system
22
(as is
L
2
corresponding series resistor,
formed by each FDNR and its
or L );
4
in the limit Q-+#oowe obtain w-)w',
p
where w is
p
the freq-
Referring to the magnitudes of CLC B
uency of maximum peaking.
(Fig. 6)
2
Y.
in
= Ds
2
1S5R24
=
R3
substitute R2=R
D
C1C5R
D
=
V
1
W
2+
=
R C5
(RC5w') 2+1
=F
(R C 5 w') 2+1
=2=
3 dB
=
3 dB
Therefore the maximum peaking contribution of the FDNR designed with
these constraints will always be 3 dB.
2)
Dynamic Range
It may be valid in some applications to trade-off filter accur-
acy for increased dynamic range. Again examining the magnitude
relations for CLC B, we note the following limits on minimum peaking:
V2
0 dB in the limit C
2
Vd1
-+
-
O0
dB in the limit R40 or
Vd
C5+n
In practice, real properties of the circuit and components constrain
23
the maximum and minimum values which may be used.
and minimum values for the
Conservative maximum
resistors and capacitors used in the FDNRs
are based on the current output capability of the operational amplifiers, typical values of stray capacitance due to circuit construction,
and the limits of thick-film resistor technology
cation,
Paul Penfield).
For the minimum peaking case,
reasons.
(Personal Communi-
First,
satisfying this
it was chosen that R 2=R3 for two
condition
from Martin and Sedra's
formulation makes the filter as close as possible to ideal, while still
in peaking.
Second,
the maximum input magnitude
to the filter is constrained by the larger of
it makes sense to set them equal.
V 2/VinI
or
V 4/V.
,
achieving a reduction
From the formulas on the previous
page, it is seen that when
R 2=R3
D
-C
.
= R C
4 5
2
V
V4
V
The minimum peaking FDNR was tested using the 12 kHz,
loaded filter. A desired FDNR peaking contribution of
chosen, and given
R2 = R 3
1V 4/VdI
.25 dB was
C1 ' C 5 and R 4 were solved for. The values
obtained are shown in Table 4. Note from the equations
and
singly-
for
V2 /VdI
that under our constraints, C 1 is a function of D, while
R4 and C5 are not. The values of C
obtained to realize the desired D
are not practical. For this reason, and because it is desireable to have
R4 trimmable to compensate for component tolerances, it was decided to
24
FDNR#l
normalized D=1.0089
FDNR#2
normalized D=1.0934
p
component
actual
C
3.109 nf
R2=R3
10K
normalized
4.145 f
.56548
R
3 22*K
C5
1 nf
V2 /Vd
component
.1825
4.145 f
.56548
3.228K
.1825
1 nf
1.3333 f
1.3333 f
dB.
V 4/Vdl= .25
FDNR#2
normalized D=1.0934
actual
normalized
actual
3 nf
4 f
3 nf
10K
R4
3.345K
C5
1 nf
Table 5
3.369 nf
10K'-
FDNR#1
normalized D=1.0089
R 2=R
normalized
Components to implement FDNRs with
Table 4
C1
actual
.56548
.1892
4 f
10K
.56548
3.625K
.2050
1.3333 f
1 nf
1.3333 f
normalized
: Practical components used to implement
FDNRs with
set C =3 nf and solve R
IV2 /Vdt-
[4/VdP 6.25
to achieve the desired value of D. It was
expected that the slight changes in C
on peak contribution of
dB.
V2
/Vdl
and
and R
M4/Vd
would have minimal effect
. These component values,
which were used for modelling, are shown in Table 5. In the actual
filter, R4 was trimmed to precisely set D.
25
To verify the validity of the derived minimum-peaking FDNRs,
both computer simulation and empirical measurements were performed.
Peaking results are shown in Table 6. The simulated and empirical
results
correspond fairly
the original 12 kHz,
well,
and comparing them to results
singly loaded filter
(Tables 2 and 3)
from
it is
seen that we have achieved the desired reduction of the FDNR's
contribution
dynamic
It
to peaking, obtaining a greater than 3 dB increase in
range.
was anticipated that the good gain-bandwidth matching of the
operational amplifiers used to implement the empirical
in the filter
minimize inaccuracies
filter
would
transfer function generated as a
result of ignoring one of Martin and Sedra's conditions, that is,
choosing the components for minimum peaking rather than for minimum
computer simulated
peak
magnitude,
dB
at w=
transfer
function
V /V
.278
2
d
_______
V 2/V.
#1
2in
8.15
V /V
________
.973
8.15
in
__ _ _ _
2 d
V4 /V d
.297
#2
V 2/V .
3.72
3.72
V4 /V.in
Table
6
: Verification
.951
7.22
.945
3.15
.917
3.17
.904
.297
FDNR
2 in
7.20
1.019
______
V /V.
4
1. 019
.278
d
4
FDNR
empirical
peak
magnitude,
dB
at w=
.973
3.72
of peaking performance of
filter with minimum-peaking FDNRs
the 12
(CLC B).
kHz
26
0
C
-1
V
0
in
.
V
B
-2
.B
C
dB
.
-3 .
.2
.1
Figure 9
.3
.4
.5
normalized frequency
.6
.7
.8
.9
1
frequency response of the 12 kHz, singly-loaded filter.
V /V.
0
in
A: Computer simulated minimum-peaking case. Operational amplifiers modelled with a=300K, T=.l sec.(before'normalizing),
and 3% gain-bandwidth mismatch.
B: Empirical results from the original filter
(see Appendix C).
C: Empirical results from the minimum-peaking filter design.
deviation
from ideal response.
The filter
ated using MARTHA for four cases:
ideal,
transfer
function was simul-
the minimum deviation from
ideal version, the minimum FDNR peaking version, and the original
version of the filter. The model of the FDNR which was used for computer
simulation is shown in Appendix E. The computer simulation showed that
over the frequency
range
.
01( w < 1. 0 (normalized rad/sec) , the original
filter and the minimum deviation from ideal version deviated less than
.01 dB from ideal. The minimum peaking version deviated less than
.02 dB
from ideal. Maximum deviation occurred near w=l.
Empirical measurements of the filter
the original filter
transfer
function for both
and the minimum peaking version were taken
(see
27
Figure 9). The deviation between the two filters' frequency response
was greater when empirically measured, but did not exceed .5 dB in the
passband. The empirical performance of the two filters was poor compared to the computer simulated case, deviating from ideal by a
maximum of 2 db in the passband near w=w . Disparity between the
empirical and computer simulated results is felt to be due either to
finite component tolerances in the empirical filters, or due to
an excessively optimistic computer model of the operational amplifiers.
Examination of the empirical performance of a filter embodying
Martin and Sedra's minimum deviation
from ideal
constraints may in-
dicate to what extent non-ideal performance is due to gain-bandwidth
mismatch of the operational amplifiers.This research was not performed.
CONCLUSION
It is hoped that this work will facilitate the design of FDNR
implemented filters which best fit the constraints seen in real
applications. It is felt that the minimum peaking, maximum dynamic
range FDNR design presented in Section III represents a design tradeoff worthy of consideration, by virtue of its increased dynamic range,
and small loss of accuracy as compared to similar filter implementations.
SUGGESTIONS FOR FURTHER
RESEARCH
The problem of FDNR stability and performance in the presence of
stray impedance has yet to be adequately addressed. Characterization
of performance in this case, and the development of simple, stable
compensation for stray impedances is a worthwhile topic.
28
Several commercial applications of FDNR implemented elliptic
filters
have been seen which incorporate provision
discrete
cutoff frequencies
(to accomodate
for a number of
a sampling system which may
run at more than one sampling rate). These filters use switches or
reed relays to change components in the FDNR to achieve different
values of w . An elegant solution would be the development of either
a continuously voltage-variable
cutoff frequency implementation,
or
a discretely-variable implementation using MOS switches.
Without question the small-signal end of dynamic range is
limited
by operational amplifier-generated noise. The effect of this noise,
referred to the filter
input, can be found using the techniques pre-
sented in Section I. The maximum allowable input signal magnitude as
studied in Sections I and III
range if
all
it
is
the filter
can only be generalized to dynamic
assumed that noise referred to the input is
versions
studied.
The dynamic range of these
identical for
filters
can be improved at the low signal end by reducing amplifier noise referred to the filter input,
thus this is a worthwhile area of research.
PERSONAL COMMUNICATIONS
Dunetz,Dave; Lexicon, Inc., 1977. Stability.
Lee, Francis F.;Department of Electrical Engineering, MIT, 1977-78.
Penfield,
Paul;
Department of Electrical Engineering,
MIT,
1978.
MARTHA.
29
REFERENCES
Bruton, L.T.,"Network transfer functions using the concept of frequency-dependent negative resistance,"IEEE Trans. Circuit Theory,
vol. CT-16, August, 1969, pp. 406-408.
Bruton, L.T.,"Non-ideal performance of a class of positive immitance
converters,"IEEE Trans. Circuit Theory (Correspondence), vol CT-16,
November, 1969, pp. 572-574.
Bruton, L.T.,"Non-ideal performance of two-amplifier positive-impedance
converters,"IEEE Trans. Circuit Theory, vol. CT-17, November, 1970,
pp. 541-549.
Bruton, L.T. and Ramakrishna, K.,"On the high-frequency limitations of
active ladder networks," IEEE Trans. Circuits and Systems, August,
1975, pp. 704-708.
Desoer, C.A. and Kuh, E.S.,Basic Circuit Theory. New York: McGraw-Hill,
1969, pp. 681-697.
Lee, Francis F.,"Low-pass elliptical filter using FDNR design procedure,"
(unpublished material).
Martin, Ken and Sedra, Adel S.,"Optimum design of active filters
using
the generalized immitance converter,"IEEE Trans. Circuits and Systems,
vol. CAS-24, September 1977, pp. 495-502.
National;Linear Integrated Circuits (databook):National Semiconductor,
Santa Clara, 1975.
Patkay, Jean-Pierre, Chu,R.F. and Wiggers, Hans A.M.,"Front-end design
for digital
signal analysis,"Hewlett-Packard Journal, 1977.
Penfield, Paul,Martha User's Manual (including 1973 addendum). Cambridge:
The MIT Press, 1971.
Roberge, James K.,Operational Amplifiers: Theory and Practice.New York:
Wiley and Sons, 1975.
XR-4212 Quad Operational Amplifier
Inc., Sunnyvale, 1976.
(datasheet):Exar Integrated Systems,
Zverev, Anatol I.,Handbook of Filter Sysnthesis.New York:Wiley and ons,
1967 pp. 114,220,221.
30
ILR~
A
max
DESIGN PROCEDURE
min
.
A
: AN FDNR COOKBOOK
APPENDIX A
(This procedure was developed by
w
w
Prof. Francis Lee,
been published). A simple method of
Figure 10 : Frequency response
obtaining an FDNR implementation of
of a 5th order elliptic filter,
general case.
Zverev,
and has not yet
(reproduced from
an elliptic filter is presented.
This
page 220)
method relies on the use of a filter
(Zverev)
.
design handbook
Step 1)
Choose values of w
and w as shown in Figure 10.
91
e=
sin
-1
Compute
(w /w)
0 1
Choose an acceptable passband ripple A
.
Step 2)
max
Look up PO from Table 5.2
(page 143, Zverev).
Step 3)
Choose a satisfactory A min . Look up,
smallest n
(order of filter) for your
in the filter tables, the
P
and
9 that achieves A .i.
mmn
Step 4)
If n is too large, compromise A
max
or
(w /w ) and repeat steps 1-3.
0
1
Step 5)
Obtain,
from the tables, the series RLC prototype network
(Fig. 11).
Step 6)
Convert to the FDNR implementation by scaling all components
by 1/s
(example, Figure 15).
scaling
31
Perform impedance and frequency scaling to achieve the actual w
R -"
.
Step 7)
RK
C -4 C/w0K
-+
) 2K
D/(w
Select a convenient capacitance for the unit load impedance,
Cx
.
D
Because C /w K = 1
x 0
1/(w C
o x
K =
Compute all filter component values.
Step 8)
Calculate component values for the FDNRs
To minimize part types,
select
R2=R
(refer to Figure 18).
and C=C =C.
Because after step 7 D is replaced by D/(w 0)2 K,
D/(w0)2 K =
R4 C
R
4
=
D/(w
substituting
2
o
C 2K)
x
K = l/w0 C
R4 = DK
We have solved for R4 to achieve the desired value of D. Thus in
a filter which has more than one FDNR,
C 1 , C5, R2 and R3 are the
same for all. In addition, R 4 may be made trimmable to compensate
for component tolerances.
32
APPENDIX B : OBTAINING AN FDNR IMPLEMENTATION WITH DC RESPONSE
(This procedure was developed by Prof. Francis Lee, and has not yet
been published).
As can be seen from the design procedure given in Appendix A, when
the 1/s impedance transformation is performed on the RLC prototype filter,
the input impedance
(a resistor) becomes a capacitor, preventing DC re-
sponse. The following is an elegant procedure which circumvents the
existence of a capacitor in the series signal path.
Rather than starting with the doubly-loaded
RLC prototype, begin
with the singly-loaded filter as shown in Figure 11. Figure 12 is
identical,
but reversed left-to-right
for purposes of illustration.
Because this circuit is linear, it obeys reciprocity.
Considering the
network inside the dotted line, we can exchange input and output of this
network and still
retain the same I
in Figure 13. Now, because R
out
out
/V
in
transfer
function,
as shown
=1, we find that the voltage across R
V =(Iout
x Rout
out
out
Thus the circuit as shown in Figure 14 has a voltage transfer function
V
out
/V.
equal to I
in
out
/V.
in
of the prototype filter. When this filter
in Figure 14 is subjected to the 1/s impedance transformation, no
capacitor
appears in series with the signal, as shown in Figure 15.
As discussed in Section I of the text,
this
resultant singly-
loaded filter has roughly 4 dB less dynamic range,
source,
referred to the
than an equivalent doubly-loaded version. Another method of obtain-
ing DC response has been described in the literature
(Patkay, Chu and
Wiggers, 1977): it
involves modifying the doubly-loaded filter.
Properties of this
circuit
were not studied.
33
R =
1
L
L3
L2
L5
L4
V.
Vin
out
C2
Figure 11
A normalized, singly-loaded
L5
RLC prototype filter.
L1
L3
L
C4
R=
1
L
out
in
C4
Figure 12
C2
C
Figure 11, reversed.
L5
L1
L3
L4
R =1
L2
out
V.
Figure 13
The singly-loaded prototype, after being acted upon by
reciprocity.
34
Io
L5
L3
L2
L1
L4+
Vi
R =1
Figure 14
2
Converting the filter transfer function to V
Vino
C =
out /V.in
.
C4 - -
Vou
1
Vout
V
-
C 4C
Figure 15 : 1/s impedance transformation to obtain the FDNR implementation. Note that component labels in this figure do not
follow the usual type convention.
35
APPENDIX C : DESIGN OF THE FILTER EXAMPLES
A singly-loaded and a doubly-loaded,
are
used
:as
examples
in
5th order 12 kHz filters
the text. The RLC normalized versions of
They are converted to the FDNR
these filters are shown in Figure 16.
= 12 kHz in a straigntforward manner as
implementation and scaled to w
described in Appendix A, and the scaled versions are shown in Figure 17.
.5384
1.2671
1.1435
.5286
singly-loaded
.2314
V0
i n1 .0089
1 .0934
__T
T__
1.7522
1.2752
1
22878
+
V.
in
.9789
.6786
14
4
6
1.0584
.78589
Normalized RLC 5th order filters studied.
Design parameters
:0
Scaling parameters:
w
= 25
E = 49
%
Figure 16
(has already
been acted upon
by reciprocity)
K = 17684
= 2Tr x 12 kHz
0
V
doubly-loaded
0
36
20K
22.1K
9.53K
9.53K
4.12K
singly-loaded
-
V
in
9. 844E-15
1
--
22.5K
4.
05K
-
31K
0
750 pf
.08E-14
17.3K
12K
doubly-loaded
Vin
Vo
1. 053E-14 -_--
_
750 pf
7.817E-15
Figure 17 : Frequency scaled, FDNR implementations of Figure 16.
It remains to select the components inside the FDNR to achieve the
desired input admittance. The choices shown in Table 7 were made on the
basis of design
convenience and minimized part types.
Once C1 , C 5, R2
and R3 have been chosen, R4 is solved to yield the desired value of D
as shown in Table 8.
As a byproduct of selecting Cl=C5 and R 2=R3 for all the FDNRs, it
became much easier to compare the two filters in Section I. It must be
remembered that
these filters
were designed using the procedure in
Appendix A, and do not intentionally represent any optimum case presented in the text.
37
Y.
in
=
r1
Ds
2
actual
C
component
C ,C 5
C
R2 ,
normalized
value I value
750 pf
3
10K
1 f
.56548
Table 7 : Components chosen to
be common to all FDNRs.
/
R2
A
+
-
R3
B
filter
normalized actual R
and FDNR#
D = R
4
4
singly-
1
1.0089
17.5K
-loaded
2
1.0934
19.21K
doubly-
1
1.0584
18.72K
loaded
2
.78589
13.9K
R4
Table 8 : Values of R4 which
achieve the desired values of
D in the 12 kHz filters.
C
2
Yin
=
Ds
C C5R2R4s
2
=
3
D = C1C 5R
4
R4 =D/(C
1 C5
Figure 18 : The FDNR topology
used in the 12 kHz filters.
38
Computer simulation in this work was performed using the normalized (w =1) FDNR implementation of the filter. Because the components
which implement the FDNRwere chosen after
to obtain a "normalized" FDNR it
scaling the filters
to f =12 kHz;
was necessary to subject them to the
inverse of the frequency and impedance scaling procedure presented in
Appendix A.
This is the source of the normalized component values given
in Tables 7 and 8. Also, the gain-bandwidth product of the operational
amplifiers was scaled down by 1/w . The component value design criteria
presented in Section III are valid for the normalized case.
Empirical results were presented in the text for the singlyloaded,
12 kHz version of the filter
incorporated trim adjustments in R
as shown in Figure 17.
This filter
to compensate for component tol-
erances. Note the output buffer amplifier shown in Figure 19. Although
not shown in other figures, it was used with the empirical circuit. It is
important to follow the filter with a high input-impedance stage,
such
that the output of the filter "sees" a load impedance which is purely
capacitive.
The operational amplifiers used
30 pf
in the FDNRs were EXAR XR-4212C.
Some
specifications of these devices which
0a
>
LM301 A
are relevant to filter performance,
or to certain aspects of the computer
modelling, are given in Table,9. The
Figure 19 : A typical output
buffer amplifier used with
actual filter implementations.
4212 is a quad-on-a-chip,
internally-
compensated device, which has good
thermal gain-bandwidth tracking and
39
inherently well-matched gain bandwidth products.
specifications,
Due to lack of complete
for purposes of computer simulation of these amplifiers
it was assumed that their dominant open-loop pole is located at 10 Hz.
Ti 5
This corresponds to an open-loop DCigain of 3x10
parameter
typical
maximum
1 dB
1
%
gain-bandwidth
mis-matching
gain-bandwidth
product
3 MHz
output voltage
2K)
swing (R
+ 12v
L
Table 9 : Relevant performance parameters
of the XR-4212C
40
Y.
Ds
=
in
2
APPENDIX D
:
MAGNITUDES
INSIDE THE FDNR
DERIVATION OF PEAKING
Iin
Vd
Z
assume ideal op-amps,
V
A
Z
a
2
2
0
I.
=
V
=V
we will characterize
V3
Z
O
=
in
i.e.
3
3
--
=
+
---
B
f(Z
Vd
1
f(Z
,I.
in
,Z
V4
d
Z4
I.
z5
in
Vd
V2
Figure 20 : The FDNR topology
2
Vd
B=V and VA+
V
5
V4
A-
V
Z4+Z 5
Z5
5
4 Z4+Z5V .
V
inZ
Z5
=
2
V Ds
Z1
2
d
2
(1- Ds Z)
4
Vd
Z +Z5
4
2
d
it follows that Vd=V3
V
5
2
Vd
V Ds
d
V
derivation of
=
2
d
general case
because V
V2
derivation of
V5
5
2
d~sZ
41
APPENDIX E
: PROGRAMS
1) Programs used to model peaking performance.
COMPl-COMP4 establish the components L 1 -L 5 , C 2 and C4 which
implement the normalized filter,
external to the FDNRs.
COMPl: singly-loaded filter, RLC version
COMP2: doubly-loaded filter, RLC version
COMP3: singly-loaded filter, FDNR implementation
COMP4:
doubly-loaded filter, FDNR implementation
The programs EVALNETl and EVALNET2 establish circuit
definitions of
the networks shown in Figures 4 and 5, respectively. These model V
and V
d2
/V
in
dl /V.in
for the singly-loaded filter. To model the doubly-loaded
filter, a unit capacitance must be added in series with V.
.
in
The programs EVALSWLD1 and EVALSWLD2 implement the FDNR peaking
equations as given in Appendix D.
circuit
form,
Because these equations are not in
to take advantage of the features on MARTHA dummy circuits
were established to yield two-port voltage gain relations which equal
the peaking equations.
See Figures 21 and 22.
42
+
VCVS
Iin
Ds 2
V d-(V 2-Vd
CCCS
_0
d
I
2
a
+
i
-It
Figure 21 : Circuit implementing a computer model
of V2 /Vd
Program is EVALSWLDl.
-z 4
z
V
a
Vd (Z
+d
4+Z5
z
z
Figure 22
4
-
Vd
;
5
5
: Circuit implementing a computer model of V 4/Vd*
Program is EVALSWLD2.
d
2
d
43
[0JV
VCOMP
v COMP
L.- 1,1435
S1
L2 L 0 .5236
L.3+L-' 1.2671
L4+-L 0.2314
[2J
13)
[4)
[53
[63
[7)
'5+L 0 .5384
C2+.0 1.0089
C4,.C 1.0934
103
DEFINED'
o:EHTE
Com
j.j*-'SC,F:.,
V
103'v
vCOMP2
V CC)MP2
1.27524
i11 1.1fL
[23
L2L
L3
[3)
[4)
L4f.L.
0.22078
L 1.7522
.676
L5--- 0,9738
[5
[6)
C2+C
E7)
[3a]
04C
1.10504
0.70509
'U.'.F
COMPONSENTSEEFSIHEE'
,
v COMP3 r.L 1:
4L 5J
0.52I6
.'2-:
L3t F:
1.2671
L4-.;: 0.2314
1- 54..F: 0.5 3 4
C2+2PDE ~2 0.9911735
2 0 . 9145)04
C4+.:DE
:53
[6)
-7i
1:3
y001P4
v C 0iP 4
[1-)
1i:MF ... EMENTATION
j / I
+'
CF:,
OF
~
C)PiNENT
D :F::i?
'
[2)
L:3)
14)
)
v
r: r : v
11
'1+F: 1.27524
.E
2 3.
*..
X..
Wd
OF%
32 0:10. 225
1.23
'30
.7522
1-5]
171
'
1
/ S
Q.97(i
42 1 . 27244
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2) Programs to model filter
performance.
The program EVALMODEL implements the ideal,
normalized filter
(using ideal FDNRs).
The program EVALFDNR1 implements the real,
normalized filter.
singly-loaded
singly-loaded
The FDNRs are modelled using "floating analysis"
in MARTHA because they cannot be specified as a construction of valid
two-ports. The operational amplifier models used have single-pole
rolloff located at the normalized equivalent of 10 Hz,
and an equiv-
alent output resistance of 100 ohms. The model of the FDNRs is shown
in Figure 23.
3)
Programs to model stability.
The program STABMODEL implements the broken-loop analysis of
stability
as discussed in Section II.
It
uses the same FDNR topology
and operational amplifier models as EVALFDNRl, with the exception that
different floating node numbers are assigned. Note that the FDNR's
input is
"terminated" by the rest of the filter;
impedance the other FDNR is
in this
represented by an ideal one.
terminating
46
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STABMODEL
as used by EVALFDNRl and
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