Sacrificial High-Temperature Phosphorus Diffusion Gettering
for Lifetime Improvement of Multicrystalline Silicon Wafers
by
MASSACHUSETTS INSTITUTE
OF TEC-NOLOGY
Stephanie Morgan Scott
AUG 15 2014
B.S. in Mechanical Engineering
University of California, Berkeley (2012)
LIBRARIES
ARCHN ES
Submitted to the Department of Mechanical Engineering
in partial fulfillment of the requirements for the degree of
Master of Science in Mechanical Engineering
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
June 2014
2014 Massachusetts Institute of Technology. All rights reserved.
Author.......................................
Signature redacted
Department of Mechanical Engineering
May 9, 2014
Signature redacted
.......................
Tonio Buonassisi
Assistant Professor of Mechanical Engineering
Thesis Supervisor
C ertified by ........................................
,................
Signature redacted
Accepted by................... .....................
..
David E. Hardt
Professor of Mechanical Engineering
Chairman, Department Committee on Graduate Theses
Sacrificial High-Temperature Phosphorus Diffusion Gettering for Lifetime Improvement of
Multicrystalline Silicon Wafers
by
Stephanie Morgan Scott
Submitted to the Department of Mechanical Engineering
on May 9, 2014 in Partial Fulfillment of the
Requirements for the Degree of Master of Science in
Mechanical Engineering
ABSTRACT
Iron is among the most deleterious lifetime-limiting impurities in crystalline silicon solar cells. In
as-grown material, iron is present in precipitates and in point defects. To achieve conversion
efficiencies in excess of 20%, bulk minority-carrier lifetimes in excess of 300 Rs (p-type) are
required [1]. For cost-effective multicrystalline silicon wafers, achieving this lifetime often
requires gettering. Gettering at higher temperatures for longer times is often necessary to fully
dissolve and remove precipitated impurities. However, such time temperature profiles can result
in unacceptably deep emitters, affecting the blue response of the finished device. Here, we
explore a "sacrificial" gettering step, in which gettering and emitter-formation steps are
decoupled and optimized independently. The optimization of the sacrificial gettering step is
guided by the Impurity-to-Efficiency simulation tool [2] and explores higher temperatures (up to
1100*C) than standard industrial processes (typically 820-850*C). The models indicate that iron
concentration should be reduced by higher-temperature gettering, which is confirmed by
experiment. However, uniform lifetime degradation occurs at higher temperatures, suggesting
another homogeneously distributed defect is generated as a result of the high-temperature
gettering process. A list of candidate defects is presented.
Thesis Supervisor: Tonio Buonassisi
Title: Professor of Mechanical Engineering
3
4
ACKNOWLEDGEMENTS
Thank you to the numerous people and groups that have supported me throughout my
research at MIT. Thank you to Professor Buonassisi for the opportunity to research in the MIT
PV Lab. Your contagious enthusiasm research and future of energy sparked my curiosity.
Thank you to all my colleagues in the PV Lab. Special thanks to Jasmin Hofstetter for
providing invaluable support including teaching me experimental techniques and sharing
knowledge from your tremendous background in photovoltaics. Thank you to David Fenning for
your instrumental introduction to gettering. Also, thank you to my fellow team silicon members
David Berney Needleman, Ashley Morishige, Doug Powell, Sergio Castellanos and Mallory
Jensen. Thank you to Tim Kirkpatrick and Jungwoo Lee my "solar boot camp" drill sergeants
who trained me to fabricate a solar cell.
Thank you to all the students that I have been privileged to work with while at MIT.
Everyone's commitment to his or her work is a constant source of inspiration. A special thanks
is due to the students in my office, 35-135, for their constant liveliness, ingenuity, and support.
Thank you to friends and family for endless encouragement.
My research was financially supported by the MIT Department of Mechanical Engineering's
Rohsenow Fellowship and the Quantum Energy and Sustainable Solar Technologies (QESST) an
Engineering Research Center (ERC) sponsored by the National Science Foundation (NSF) and
the U.S. Department of Energy (DOE).
5
6
CONTENTS
A bstract..........................................................................................................................................
3
A cknow ledgem ents .......................................................................................................................
5
Contents .........................................................................................................................................
7
Figures............................................................................................................................................
9
1 Photovoltaic Energy...............................................................................................................
13
1.1
Introduction......................................................................................................................
13
1.2
Photovoltaic Basics.......................................................................................................
13
2 Iron in Silicon ...........................................................................................................................
17
2.1
Silicon PV M aterial.......................................................................................................
17
2.2
Silicon Material Purity ..................................................................................................
17
2.3
Silicon Manufacturing Process.....................................................................................
18
2.4
Iron States in Silicon....................................................................................................
19
2.5
G ettering ..........................................................................................................................
19
2.6
D esigning a Gettering Profile .....................................................................................
22
3 Simulated Iron Response to Gettering Time-Temperature Profile .................................
23
3.1
M otivation for Sim ulation...........................................................................................
23
3.2
M odel of Iron in Silicon................................................................................................
23
3.3
M inority Carrier Lifetim e ............................................................................................
26
3.4
Sim ulation of H igh-Tem perature Gettering..................................................................
27
3.5
Transient Response ......................................................................................................
28
3.6
Other Im purities in Silicon...........................................................................................
31
4 Experimental Methods for High-Temperature Phosphorus Diffusion Gettering .......... 33
4.1
Introduction......................................................................................................................
33
4.2
M ulticrystalline Silicon Sam ples ................................................................................
33
7
4.3
Sample Preparation - Saw Damage Etch.....................................................................
34
4.4
M inority Carrier Lifetime M easurem ent ....................................................................
35
4.5
Interstitial Iron Quantification by FeB Dissociation...................................................
36
4.6
Phosphorus Diffusion .................................................................................................
37
4.7
M icrowave Photoconductance Decay.........................................................................
39
4.8
Photolum inescence Im aging ........................................................................................
39
5 Experim ental Results............................................................................................................
41
5.1
Introduction......................................................................................................................
41
5.2
Sample M ass and Thickness........................................................................................
41
5.3
Phosphorus Diffusion Tim e-Temperature Profiles.....................................................
42
5.4
Measured Minority Carrier Lifetime and Interstitial Iron Concentration.................... 44
5.5
M icrowave Photoconductance Decay Results .............................................................
46
5.6
Photolum inescence Imaging ........................................................................................
51
6 Discussion .................................................................................................................................
6.1
Introduction......................................................................................................................
55
6.2
High-Temperature PDG Effectively Removes Interstitial Iron....................................
55
6.3
Lifetim e Decreases with Higher PDG Temperature...................................................
57
6.4
Spatially Resolved Lifetim e - g-PCD .........................................................................
59
6.5
Spatially Resolved Lifetim e - PL Imaging..................................................................
63
6.6
Candidate Sources of High-Temperature Degradation................................................
65
6.7
Furnace Cool Rate Verification ...................................................................................
66
6.8
Baseline Gettering at 845 'C .......................................................................................
67
6.9
Conclusion .......................................................................................................................
69
References....................................................................................................................................
8
55
71
FIGURES
Figure 1.1: Schematic of Photovoltaic Device ........................................................................
14
Figure 1.2: Schematic of Photovoltaic Device Layers.............................................................
14
Figure 2.1: Simulated Efficiency vs. Metal Impurity Concentration.......................................
18
Figure 2.2: High-Temperature PV Processing Steps ...............................................................
20
Figure 2.3: Typical Phosphorus Diffusion Gettering Time-Temperature Profile.....................
20
Figure 2.4: Schematic of Iron during Phosphorus Diffusion Gettering....................................
21
Figure 2.5: Solubility, Segregation and Diffusivity of Iron as a Function of Temperature.......... 22
Figure 3.1: Impurity-to-Efficiency Simulation Structure .......................................................
24
Figure 3.2: Transient Response of Interstitial Iron by Plateau Time.......................................
29
Figure 3.3: Transient Response of Precipitated Iron by Plateau Time ....................................
29
Figure 3.4: Transient Response of Interstitial Iron by Plateau Temperature............................
30
Figure 3.5: Transient Response of Precipitated Iron by Plateau Temperature .........................
30
Figure 4.1: Silicon Sample Selection Schematic ......................................................................
34
Figure 4.2: Typical Phosphorus Diffusion Profile....................................................................
38
Figure 4.3: Loading the Tystar Furnace for Phosphorus Diffusion.........................................
38
Figure 5.1: Experimental Time-Temperature Profile for 950 *C Diffusion .............................
42
Figure 5.2: Experimental Time-Temperature Profile for 1100 *C Diffusion..........................
43
Figure 5.3: Samples Gettered at 900 *C and 1100 *C ..............................................................
44
Figure 5.4: i-PCD Maps for 92% Ingot Height ......................................................................
47
Figure 5.5: p-PCD Maps for 95% Ingot Height ......................................................................
48
Figure 5.6: Lifetime Histograms for 92% Ingot Height Samples............................................
49
Figure 5.7: Lifetime Histograms for 95% Ingot Height Samples..............................................
50
Figure 5.8: PL Image for 92% Ingot Height Samples ..............................................................
52
Figure 5.9: PL Image for 95% Ingot Height Samples ..............................................................
53
Figure 6.1: Reduction in Interstitial Iron Concentration..........................................................
56
Figure 6.2: Percent Reduction in Interstitial Iron Concentration..............................................
57
Figure 6.3: Percent Reduction in Interstitial Iron Concentration..............................................
58
9
Figure 6.4: Post-Gettered Lifetime by Gettering Temperature.................................................
59
Figure 6.5: Sub-Region Selection for Lifetime Comparison 95%............................................
61
Figure 6.6: Sub-region selection for Lifetime Comparison 92%..............................................
61
Figure 6.7: Post-Gettered Lifetime Degradation by Temperature ...........................................
62
Figure 6.8: PL Image of Sister Samples by Gettering Temperature.........................................
64
Figure 6.9: Derivative of Mean Furnace Temperature during 950 *C PDG.............................
66
Figure 6.10: Derivative of Mean Furnace Temperature during 1100 *C PDG.........................
66
Figure 6.11: Average Lifetime Post-PDG by Temperature (92% Ingot Height)......................
68
Figure 6.12: Average Lifetime Post-PDG by Temperature (95% Ingot Height)......................
68
10
TABLES
Table 3.1: Depth of Phosphorus Diffused Layer by PDG Temperature (25 min Plateau)..... 25
Table 3.2: Final Iron Concentrations by Plateau Time ............................................................
27
Table 5.1: Sam ple M ass and Thickness..................................................................................
41
Table 5.2: Mean As-Grown Lifetime and Interstitial Iron........................................................
45
Table 5.3: Distribution of Samples by Ingot Height and Gettering Temperature ...................
45
Table 5.4: Mean Phosphorus-Diffused Minority Carrier Lifetime, r Fe-B, (ps)..................... 45
Table 5.5: Mean Phosphorus-Diffused Interstitial Iron Concentration [Fei] (cm- 3 ) ................. 45
Table 6.1: Slope of Lifetime Degradation by Temperature.....................................................
63
Table 6.2: Candidate High-Temperature Contaminants ..........................................................
65
11
12
CHAPTER
1
PHOTOVOLTAIC ENERGY
1.1 Introduction
Global energy consumption is increasing [3], [4]. As a result, reducing the carbon intensity of
energy produced is critical [5]. Energy is essential to quality of life [6], yet meeting growing
energy demand is in increasingly challenging. Engineers will need to provide sustainable energy
solutions and minimize the imprint of non-renewable energy.
Photovoltaic energy offers a low carbon alternative to conventional energy sources [7], [8].
Solar energy is an immense energy resource. Each year over 40 Zeta Joules
(1021
joules) of solar
energy are incident on the U.S. [9]. Photovoltaic technology is one promising alternative to
provide economic, sustainable energy for the future [10].
1.2 Photovoltaic Basics
A photovoltaic device converts light energy directly to electric energy. Light from the sun or
other source is absorbed by the semiconductor device. The light energy in the form of photons
excites free carriers enabling the carriers to move within in the semiconductor material. A basic
schematic in Figure 1.1 shows light absorption by a typical solar cell device.
13
Figure 1.1: Schematic of Photovoltaic Device
Light absorbed by the device is converted to eclectic current. Front and rear contacts interface
with the semiconductor and direct the electric current through a load.
Simple solar cell architecture consists of multiple layers designed to move generated current
across a load. A cross-section of a typical simple solar cell device is illustrated in Figure 1.2.
The semiconductor material consists of positively and negatively charged regions or the bulk and
the emitter. The bulk is p-type silicon doped with boron (B-). The emitter is n-type silicon doped
with phosphorus (P+). The two sections are joined forming a p-n junction and creating an
electric field to move free carriers. Front and rear contacts interface with the semiconductor
material and carry charge from the cell to an external load.
Front Contact
Emitter
Bulk
Back Contact
Figure 1.2: Schematic of Photovoltaic Device Layers
Simple PV device architecture consists of semiconductor material doped to form a p-n junction.
The bulk is p-type doped with boron (B-). The emitter is n-type doped with phosphorus (P+).
14
When designing and manufacturing photovoltaic devices, the goal is for as many electrons
generated by absorbed photons to flow towards and reach the terminals of the solar cell [11].
High quality semiconductor materials are essential for efficient devices as explained in Chapter
2. Manufacturing processes must be optimized to maintain material quality and ultimate device
efficiency at a competitive cost.
This thesis explores one step of the manufacturing process, phosphorus diffusion gettering,
typically used for the dual purpose of improving material quality and doping the n-type emitter
layer. Specifically, performing phosphorus diffusion at high-temperature which is promising for
removal of interstitial iron impurities was simulated (Chapter 3) and tested experimentally
(Chapter 4-6).
15
16
CHAPTER
2
IRON IN SILICON
2.1 Silicon PV Material
Silicon is the majority semiconductor material for PV production today. In 2008, silicon
comprised of 83% of manufactured PV (35% is mono-crystalline and 48% is multicrystalline
silicon material) [12]; in 2013, preliminary numbers suggest silicon comprised 91% of
manufactured PV. While silicon technology dominates, the energy market drives innovation
toward increasing cell efficiency and reducing cost to reach grid parity. Manufacturing costs
must be controlled to reach the SunShot goal of $0.06/kWh by 2020 [13]. To achieve this goal, a
key strategy is to increase efficiency, as efficiency is the principal parameter influencing ultimate
energy cost [14].
2.2 Silicon Material Purity
From the integrated circuit industry to photovoltaic applications, maintaining material quality
in silicon is critical [15].
Even low concentrations of metal impurities can degrade the
performance of semiconductors [16]. Impurity concentrations as low as 1 x 1012 atoms/cm 3
diminish device performance [17]. Electronic grade silicon is maintained at nine nines purity
(99.9999999%) and silicon grade silicon is maintained at six nines purity (99.99999%).
For photovoltaic devices, dissolved or precipitated metal impurities hinder device
performance by creating recombination centers [17]. Experimentally, the Westinghouse study
showed that metals reduce device efficiency by reducing diffusion length [18]. Metals including
Fe, Cr, Co, Ni, and Cu have been shown in simulation to reduce cell efficiency after exceeding a
certain concentration illustrated in Figure 2.1 [19]. Iron is particularly detrimental to p-type
silicon photovoltaic device performance [20], [21].
17
21
CU
20
19
Cr
118
'WE17
16
15
14
(a) p-Sl bae
100
"
a'A
1011
1012
1013
1014
101
i
101
Metal impurity concentration [cm-]
Figure 2.1: Simulated Efficiency vs. Metal Impurity Concentration
Simulated PERC device shows decrease in efficiency with increasing metal impurity
concentration. Each metal impurity impacts efficiency at a different concentration.
(Reprinted from [19] with permission 2011 IEEE)
Beyond the concentration of metal in the silicon, the distribution of metal within the sample is
critical to consider [22], [23]. Iron is present in multiple forms including point defects and
precipitates [23]. Iron precipitates reduce minority carrier diffusion length due to large capture
cross section [24]. Iron point defects are more detrimental than precipitates by concentration
because for the same concentration, point defects are distributed throughout the bulk [23].
In addition, increased iron concentration has been shown to increase the crystal defect
concentration in the ends of contaminated ingots [25].
Iron is also industrially relevant, as
concentration of iron in typical commercial solar materials is sufficient to degrade performance
significantly [26].
2.3 Silicon Manufacturing Process
Impurities are introduced to the material throughout the manufacturing process. Green
summarizes the manufacturing process in 5 steps:
1. Reduction of silicon-bearing feedstock to metallurgical-grade silicon.
18
2. Purification of metallurgical-grade silicon to semiconductor grade silicon.
3. Conversion of semiconductor grade silicon to single crystal silicon wafers.
4. Processing of single-crystal silicon wafers.
5. Solar cell encapsulation into weatherproof solar cell modules [27], [28].
The manufacturing process for multicrystalline silicon is analogous. For multicrystalline
samples, introduction of impurities begins in the feedstock material, crucible and liner [29].
During subsequent high-temperature steps, the total and local concentrations of iron are
manipulated.
2.4 Iron States in Silicon
Iron is found in silicon in predominantly two forms: as interstitial iron, Fei, point defects
distributed throughout the lattice or as metallic precipitates, Fep, an agglomerated form. Total
iron concentration in most industry-relevant samples is approximately the sum of both the
interstitial and precipitated iron concentration.
Typically, the majority of iron is present in
precipitated form [30].
Iron in both precipitated and interstitial states impacts material lifetime. Interstitial iron is
usually the lifetime limiting defect as the recombination activity of precipitated iron is much
lower [22].
In reality, the effect of iron on lifetime is dependent on both interstitial and iron
precipitated concentration [31].
Furthermore, the distribution of iron within multicrystalline
silicon must be considered.
2.5 Gettering
Gettering is a thermal and chemical processing step used to remove metal impurities from a
semiconductor. Gettering techniques are used throughout the semiconductor industry to move
metal impurities away from the active device region. In the integrated circuit industry, gettering
is used to remove defects from the active surface. In the photovoltaic industry, gettering is used
to remove metals from the bulk of the material to the surface.
Phosphorus diffusion gettering (PDG) is a well-established step in the solar industry for
removing impurities [32]. Gettering is one in a series of high-temperature steps performed when
manufacturing a solar module.
Thermal process steps summarized in Figure 2.2 are:
crystallization growth, phosphorus diffusion gettering, anti-reflection coating (ARC), and
19
metallization firing. While gettering is optimized to dope the sample and increase material
quality, subsequent thermal steps must also be considered to maintain final material quality.
Cell Processing Schematic: High-temperature Steps
1414
850
a)
E
400
Growth
(20 hrs)
PDG
(1.5 hrs)
ARC
(10 min)
Metallization
(10 min)
Figure 2.2: High-Temperature PV Processing Steps
Summary of temperature and duration of each high-temperature step performed during
manufacturing of a PV module. (Adapted from [33]).
The typical phosphorus diffusion gettering process is broken down further into a series of
three steps illustrated in Figure 2.3. First, the furnace temperature is increased from loading
temperature.
Second, the phosphorus diffusion step is performed isothermally. Third, the
furnace temperature is lowered at a controlled rate.
P-Diffusion
2
o
E
2
1
3
Time
Figure 2.3: Typical Phosphorus Diffusion Gettering Time-Temperature Profile
Typical profile is constituted of three steps: temperature ramp, isothermal phosphorus diffusion
step, and cool down. (Reproduced from [34]).
20
The phosphorus diffusion step serves a dual purpose during manufacturing of typical p-type
semiconductor material. The phosphorus in-diffusion into the silicon dopes the outermost layer
of the silicon n-type. In addition, the phosphorus diffusion step getters metal defects to the
phosphorus layer improving the bulk material quality.
Within the bulk, the phosphorus diffusion step has a direct impact on the distribution of iron
and phosphorus concentration. As the temperature and phosphorus concentration change the
solubility and diffusivity of iron in silicon are impacted. The effect of gettering on iron particles
is illustrated by the schematic in Figure 2.4.
1. Fe precipitates dissolve
2. P diffuses in,
Fe moves to P layer
3. P diffuses further,
Fe moves to P layer
Figure 2.4: Schematic of Iron during Phosphorus Diffusion Gettering
Progression of iron concentration during the three steps of phosphorus diffusion gettering.
(reproduced from [34])
First, as the temperature of the furnace increases, the solid solubility of iron in silicon
increases. As a result, iron precipitates begin to dissolve and interstitial iron concentration
increases.
Second, phosphorus is in-diffused into the sample forming an emitter layer (typically at
constant temperature). The solid-solubility of iron in the phosphorus layer is higher than in the
bulk of the material. Gettering occurs as interstitial iron diffuses from the bulk of the material
into the phosphorus-diffused region. Further, as iron is drawn out of the bulk, iron precipitates
continue to dissolve to meet the solid solubility concentration for interstitial iron.
Third, the temperature of the furnace is lowered. As the temperature decreases, the solid
solubility of iron in the bulk decreases. The solid solubility of iron in the phosphorus diffused
emitter also decreases, but at a slightly lower rate resulting in a strong gettering iron. After a
given point, the solid solubility and diffusivity decrease to a point below which gettering is no
longer effective.
21
7-1
X10 6
1x101 ,
F
E
x
4
1.6
51.2
0_
I.-.
0 0.8
_0
-~20
700
750 800 850
?0
Temp. (*C)
750 800
Temp. (*C)
850
700
750 800
850
Temp. (*C)
Figure 2.5: Solubility, Segregation and Diffusivity of Iron as a Function of Temperature
Solubility and diffusivity of ion in silicon increase as a function of temperature. Simultaneously,
the segregation coefficient decreases a function of temperature. (Reproduced from [34]).
2.6
Designing a Gettering Profile
A gettering profile must be designed taking into account the non-linear behavior of iron in
silicon as a function of temperature. The complex parameter space of iron in silicon is further
influenced by initial material quality and constrained by processing time, manufacturing
constraints and furnace limits.
Many strategies have been employed to attempt to find the ideal gettering profile. Multiple
authors have optimized the gettering profile to reduce processing time [34], [35], [36]. Others
have considered the initial material properties [31], [37].
While yet others have attempted to
concentrate iron in precipitates during thermal steps a process called precipitate ripening [38],
[39]. Most recently, computation methods including a genetic algorithm have been used to probe
the complex iron-silicon parameter space [40].
Mathematical model, simulation tool and gettering optimization are discussed further in
Chapter 3.
22
CHAPTER
3
SIMULATED IRON RESPONSE
TO GETTERING TIME-TEMPERATURE
PROFILE
3.1 Motivation for Simulation
Simulations provide invaluable insight into the complex problem of reducing defect
concentration in silicon. The distribution of iron in silicon changes as a function of the thermal
profile the material is subjected to.
While experiments are useful for characterizing and
understanding material quality, simulations provide other advantages and unique information.
Simulations are much faster and cheaper than the equivalent experiment, allowing researchers to
test ideas before devoting hours and materials. More effective experiments are designed after
using simulations to iterating through parameters space.
From theory and interpolation,
simulations can even provide information and insight that is not available experimentally.
3.2 Model of Iron in Silicon
The Impurities-to-Efficiency Simulator (12E) developed by Hofstetter et al. [2] is a model
used to predict the impact of initial contaminate concentration and processing conditions on the
final material lifetime and cell efficiency.
12E currently runs in MATLAB.
Designed for
optimizing the phosphorus diffusion gettering process, the simulator takes material, process and
cell structure inputs and outputs iron profiles, lifetime, and efficiency.
23
Impurity-to-Efficiency Simulator
Fe content &
distribution
N
F Profe
segrigusion, R,/R,
F-dffn,
Proc.It
Figure 3.1: Impurity-to-Efficiency Simulation Structure
Summary of I2E inputs, outputs, and model. (Reprinted from [41]).
The program is structured in three steps. First, partial differential equations (PDE) governing
the behavior of iron are solved for a given set of inputs conditions and time-temperature profile
to determine the post-gettered iron distribution. Second, the program calculates minority carrier
lifetime for the iron distribution using Shockley-Reed-Hall statistics. Third, the program uses
PCID [42] to calculated device efficiency for the iron distribution.
In I2E, the partial differential equations governing the behavior of iron in silicon are solved
using a ID finite element method. The domain for the simulation is taken as the thickness of the
wafer and divided using a logarithmically spaced meshed in x. The logarithmic spacing provides
higher resolution near the surface of the wafer so that phosphorus diffusion and resulting
segregation can be more accurately captured. Mesh spacing can be adjusted. For all simulations,
time step size is scaled with mesh spacing.
At each step, the distribution of iron in the system is described by two variables: interstitial
iron concentration, C,, and iron precipitate radius, r. The diffusion of phosphorus into the wafer
is described by the concentration of phosphorus, P. All three variables are calculated for each
time step at every mesh point.
The concentration of phosphorus in silicon is calculated using Fick's Law, (3.1,
developed by Bentzen et al. [43].
D is the diffusivity of phosphorus is silicon and an
exponential function of temperature [2].
24
a[P]
at
_
a
ax
(
a[P]
D([P])
(3.1)
The law describes the diffusion of phosphorus atoms due to local phosphorus concentration
and temperature. Phosphorus diffusivity depends exponentially on temperature. With increasing
temperature, the depth of the phosphorus doped emitter layer increases as reported for a 25
minute simulated PDG plateau time in Table 3.1. The increased depth of the emitter layer
defined as the p-n junction is important for the gettering, processing, and device performance
(blue response, sheet resistance, and contact resistance). If the emitter needs to be removed after
gettering (such as for lifetime measurements), the depth of the emitter is notably deeper.
Table 3.1: Depth of Phosphorus Diffused Layer by PDG Temperature (25 min Plateau)
Temperature
(*C)
Phosphorus
Depth (pm)
850
900
950
1000
1050
1100
0.5
0.75
1.0
1.5
2.3
3.5
The dynamics of iron are modeled for both the interstitial and precipitate states. Total iron
concentration is the sum of the concentration of interstitial iron and concentration of precipitated
iron. Each form of iron can be modeled as a function of temperature and distribution.
Interstitial iron diffuses though the silicon lattice. The diffusion of interstitial iron in silicon is
modeled using kinetics and model described by Tan et al. [44]. The diffusion coefficient of iron
in silicon, DFe, is a function of temperature. The segregation coefficient is a.
ac_ -xa
(ac
- DFa
C1aau
(3.2)
25
Segregation of iron in the phosphorus layer is described by the model developed by
Haarahiltunen et al. [45] where Vsi are vacancies, K are constants, and n is the electron
concentration.
cxx)=n(x)
O() = 1 + VsiKeq,i
ni
(1 + Keq, 2 [P(X)])
(3.3)
Iron precipitates are modeled as spheres. With changing iron solubility, the precipitate will
dissolve or the precipitate radius, r, will decrease. The change in precipitate radius is described
[2], [46] with equation (3.4).
Or
(Ci
-t = VFeDFe
Ot
-
Ceq,Fe)
(34)
(34
r
With increasing temperature, solid-solubility of iron in silicon increases and precipitated iron
dissolves increasing the concentration of interstitial iron.
The increase in interstitial iron
concentration is accounted for with equation (3.5) [2].
aC, = 41rNrDFe(Ceq,Fe - C)
(3.5)
3.3 Minority CarrierLifetime
Minority carrier lifetime is the metric used to predict device performance. Lifetime can be
expressed as a function of iron concentration for both interstitial and precipitated iron.
For interstitial iron, lifetime is limited by free carriers recombining at interstitial point defects
as described by Shockley-Read-Hall Statistics [47], [48].
Minority carrier lifetime is inversely
proportional to interstitial iron concentration (a is the minority carrier cross section and Vth is the
thermal velocity of minority carriers) [2].
1 =
T- CiOth
26
(3.6)
For iron precipitates, lifetime can be expressed as a function of precipitate radius as
described by equation (3.7) [46].
1
TP
= 41rr2 N
sD/r
s + D/r
(3 7)
In the impurities-to-efficiency simulator, lifetime and efficiency are calculated. Lifetime
measurements can also be averaged using multiple different means as described by Wagner et al.
[49]. Lifetime measurements are added harmonically.
1
1
1
(3.8)
3.4 Simulation of High-Temperature Gettering
To determine the effect of high-temperature gettering on iron distribution in silicon, hightemperature gettering processes were simulated. To understand the marginal effect of increasing
temperature on iron distribution, simulations were run at incrementally higher temperatures.
Since in experimental setup higher temperature gettering profiles typically require a longer total
time (for ramp up and down), gettering with incrementally longer plateau lengths was also
simulated.
For both sets of simulations, all other parameters were held constant between the simulations
including: load temperature, unload temperature, temperature ramp-rate, temperature cool-rate.
Initial iron concentration was held constant at with a total iron concentration of 1
x 1015
cm-3 and
initial precipitate radius of 25 x 10-7 cm.
From the simulations, the final concentration and distribution of are compared in Table 3.2.
Table 3.2: Final Iron Concentrations by Plateau Time
Plateau time
7
4.1
101
5.8
Interstitial Iron Concentration
4.3
x 10
Precipitated Iron Concentration
6.5
x
60min
40min
25min
7
x 10
3.6
x 107
101
5.0
x
x
101
27
3.5 Transient Response
To better understand the impact of gettering parameters on iron during gettering, the transient
response of iron to the gettering time-temperature profile was plotted. While final values are
useful for determining ultimate impact on a solar cell, the transient response offers insight for
gettering plateau optimization.
The effect of each section of the time temperature profile is
clearly illustrated by transient response plots.
To create transient plots, iron concentration in the bulk for each time step was calculated and
saved. (Calculation is preformed using Function transFE.m, written in Matlab and included in the
appendix).
Transient response of interstitial and precipitated iron to gettering profiles of varying plateau
duration are compared in Figure 3.2 and Figure 3.3. Immediately apparent, longer plateau times
result in reduced precipitated radius, as the precipitates are held at high-temperature longer with
more time to dissolve and getter.
To test temperature dependence of gettering, profiles were shifted upward. Ramp and cool
rates and plateau time are held constant. Transient iron response to increasing plateau
temperature is compared in Figure 3.4 and Figure 3.5. As the gettering temperature increases,
the precipitate rate of dissolution is much faster. Higher gettering temperature increases solid
solubility of iron resulting in increased precipitate dissolution and iron gettering.
With increased plateau temperature, the final concentration of both interstitial and precipitated
iron is lower. The solid solubility of iron in silicon increases with increasing temperature,
allowing more precipitated iron to dissolve into the bulk. While the peak interstitial iron
concentration is higher, the final interstitial iron concentration is lower provided sufficient cooldown time to getter iron from the bulk.
28
Transient Response
x 101,
of Interstitial Iron
-25
-
-40
-60
1 2-
1 0-
8-
it
6-4
2-
0
20
40
60
80
Time [min]
100
120
140
160
Figure 3.2: Transient Response of Interstitial Iron by Plateau Time
As the plateau time increases, the interstitial iron has a longer time to getter for a lower final
concentration.
Transient Response of Iron Precipitates
x 1"
V
--
8.5k
-25
40
60
8
7.5
7
6.5
6
5.5-
0
20
40
60
80
100
120
140
160
Time [min]
Figure 3.3: Transient Response of Precipitated Iron by Plateau Time
As the plateau time increases, the final precipitated iron concentration decreases. More
precipitated iron is gettered during longer plateaus.
29
Transient Response of Interstitial Iron
x 1011
4 F--
-800
.-- - 850
-900
3.5
3
2.5
2
-
U-
1.5
1
0
20
40
60
80
100
120
140
Time [min]
Figure 3.4: Transient Response of Interstitial Iron by Plateau Temperature
With increased plateau temperature, more interstitial iron is dissolved into the bulk and gettered.
Transient Response of Iron Precipitates
X 102
800
850
9001
8.5
8
7.5
7
6.5
6
5.5'
0
20
40
80
60
100
120
140
Time [min]
Figure 3.5: Transient Response of Precipitated Iron by Plateau Temperature
With increased gettering temperature, solid solubility of iron increases. Precipitates dissolve
faster at higher temperature.
30
3.6 Other Impurities in Silicon
Other metals have been shown to degrade the material quality of silicon[19]. Impurities can
be modeled similarly by changing the model parameters for diffusivity and solubility as a
function of temperature.
31
32
CHAPTER
EXPERIMENTAL METHODS
FOR HIGH-TEMPERATURE
PHOSPHORUS DIFFUSION GETTERING
4.1 Introduction
High-temperature phosphorus diffusion gettering (PDG) experiments were performed to
determine the effect of high-temperature PDG on iron concentration and minority carrier
lifetime. Three experiments were performed at varying gettering temperature on multicrystalline
silicon samples of two iron concentrations.
4.2 Multicrystalline Silicon Samples
For the high-temperature PDG experiments, multicrystalline silicon samples were chosen as
illustrated in Figure 4.1. The samples are from two sets of three sister wafers, i.e. from vertically
adjacent ingot heights. Three sister wafers from two different ingot heights (92% and 95%) were
used to maintain similar grain structure and iron concentrations within the sample sets. From
ICPMS data fitted with the Scheil equation, the 92% ingot height wafers have an estimated total
iron concentration of 7.4x1013 cm3, and those at 95% ingot height have a concentration of
1.4x10" cm.
33
1
1
Ingot
Saw
sister wafers
cut
3
3
5
5
Brother wafers
Figure 4.1: Silicon Sample Selection Schematic
Sister wafers, or adjacent wafers, are selected from are cut from two ingot heights. Brother
samples, from the same wafer, are cut from each sister wafers.
Each sister wafer was cut into smaller pieces or samples using a laser cutter and laser scribed
with wafer and sample number.
Three brother samples were chosen from each of six sister
wafers for a total of 18 samples.
4.3 Sample Preparation - Saw Damage Etch
Before performing PDG experiments on the samples, as-grown minority carrier lifetime and
interstitial iron concentration were measured. The as-grown measurements serve as a baseline
for comparison with the post-gettered measurements.
Samples were first cleaned and passivated in preparation for minority carrier lifetime
measurement (procedures in Appendix 1). Multicrystalline wafers are sliced from an ingot using
a sawing process that damages the surface of the wafers. The damaged surface is contaminated
with high concentrations of impurities from the sawing slurry. The impurities must be removed
to avoid contaminating the bulk of the material during subsequent high-temperature processing
steps.
The 10 gm damaged layer of silicon is removed using a CP4 etch chemical process
outlined (full procedure in Appendix 1):
34
1. Dip in Hydrofluoric Acid (HF) for one minute to remove native oxide.
2.
CP4 chemical bath to remove saw damage. Bath consists of a 15:5:2 ratio of 70% nitric
acid, 100% acetic acid, and 49% HF.
3. Dip in HF to remove oxide formed during CP4.
4.
Alkaline quench to remove porous silicon. Quench consists of 30% KOH by weight.
5. Dip in HF to remove oxide formed during KOH dip.
The depth of the CP4 etch is controlled by the time duration that the samples are submersed
in the bath. Longer bath durations remove more material. The time to depth removed is nonlinear as the reaction is exothermic. The etch rate increases as the temperature of the bath
increases. The temperature of a bath will increase faster with more samples than a bath with
fewer samples.
To verify that the bath time was sufficient to remove all the saw-damaged silicon, the mass,
m, of a sample is measured before and after CP4. The final thickness is estimated by assuming
that the sample surface area is known and remains constant. The sample cross sectional area, A,
is estimated from the dimensions of the sample. The density of silicon, p, is estimated as 2.329
g/cm 3. Thickness for a given sample mass is calculated using equation (4.1).
(4.1)
-
t= m
pA
4.4 Minority CarrierLifetime Measurement
Minority carrier lifetime is measured to determine the quality of the material before and after
phosphorus diffusion gettering. From the minority carrier lifetime measurements, the interstitial
iron concentration can be calculated (section 4.5). In preparation for the measurement, the
samples are cleaned.
In addition, the sample surface is passivated with aluminum oxide to
reduce recombination at the wafer surface [50].
RCA Surface Clean and ALD Deposition
procedures included in the Appendix.
Sample minority-carrier lifetime is measured using the Sinton WCT-120 Photoconductance
Lifetime Tester using the quasi-steady-state photoconductance technique (QSSPC).
The tool
illuminates the sample with a flash bulb, resulting in photogeneration or an injection of minority
35
carriers. The tool measures the conductance and corresponding incident light intensity. The
lifetime is calculated from the slope of the photconductance decay curve. [51].
The effective lifetime,
Teff,
is a function of excess carrier density, An, and the carrier
generation rate, G, and the time derivative of excess carrier density. The effective lifetime can be
expressed as [52]:
dAn
Teff(An) =
G(t)
(4.2)
-dt
For the multicrystalline samples considered, the lifetime is much lower than the 2.3 ms
typical flash decay time constant [52]. The effective lifetime simplifies using the quasi-steadystate assumption to:
Tefff(An) =
An
-(4)
G(t)
(4.3)
Excess carrier density is calculated as a function of time from measured sample conductivity.
Conductivity is measured using an RF coil. Generation rate is calculated as a function of time
from the measured light intensity. Light intensity is measured using a built in light sensor.
Additional specifications for the Sinton WCT-120 tool are found in the manual [53].
4.5 Interstitial Iron Quantification by FeB Dissociation
Interstitial iron concentration in p-type silicon is measured from change in minority carrier
lifetime for dark and illuminated samples. The method proposed by Zoth and Bergholtz for
detecting low concentration of metal impurities contaminating silicon in the integrated circuit
industry is capable of detecting interstitial iron concentrations as low as 2-5 x 1011 cm [54]. The
measurement method has many advantages over measurement methods such as DLTS or SIMS
including the sensitivity, contactless, non-destructive and rapid.
The measurement takes advantage of the equilibrium reaction for iron and boron in silicon:
Fet + B- ++FeB
36
(4.4)
Interstitial iron in silicon is mobile at room temperature. As the iron is positively charged it
forms a covalent pair with the negatively charged boron.
measurement
and dissociated
FeB pairs are associated for dark
illuminated measurements
during
pair in p-type
silicon.
Manipulation of the Shockley-Read-Hall equation allows calculation of iron concentration from
measured associated and dissociated lifetime [34], [54], [55].
(4.5)
[Fei] = C
( diss
assoc)
4.6 Phosphorus Diffusion
Phosphorus diffusion is performed in a Tystar Mini-Tytan 3800 diffusion furnace. The
samples are placed into a quartz furnace tube and loaded into the pre-heated furnace.
The
furnace is pre-programmed with time-temperature and gas flow profiles. Typically the program
is as follows:
e
Pre-heat - The furnace is heated from standing temperature at 500 *C to load
temperature at 800 'C.
e
Load - The furnace tube opens allowing samples to be loaded. After loading
samples, the tube is closed and the program allows the furnace temperature to
stabilize.
e
Ramp-up - The temperature of the samples is increased from the load
temperature at 800 *C to the diffusion temperature at 4 *C/min.
* Phosphorus diffusion
-
POC13 gas is flowed into the furnace tube constant
temperature. To fill or flush the furnace tube with gas requires 6 minutes (or 12
minutes for a complete changeover). Typically, the gas is turned over twice for a
total time of 24 minutes.
" Ramp-down - The temperature of the furnace is decreased from the diffusion
temperature to unload temperature at 550 *C at 4 *C/min.
e
Unload - The furnace tube opens allowing samples to be unloaded.
The typical time-temperature profile and gas flow schedule is illustrated in Figure 4.2.
37
900
850
a
GD
800
750
700
650
600
500
0
10
20
--30
40
50
60
70
80
Time (min)
Gas
N2
POC
3
N2
Figure 4.2: Typical Phosphorus Diffusion Profile
Typical phosphorus diffusion time-temperature profile and corresponding gas flow.
Figure 4.3: Loading the Tystar Furnace for Phosphorus Diffusion
Samples are centered on the rails when loaded into the furnace at 800 *C. Large insulating plug
(lower right) reduces heat loss to maintain the furnace temperature.
38
4.7
Microwave Photoconductance Decay
Microwave photoconductance decay (p-PCD) measures spatially resolved minority carrier
lifetime. The Semilab WT-2000 tool uses the same theory as described in section 4.4 for the
minority carrier lifetime measurement. To excite carriers, an infrared semiconductor laser scans
the surface of the sample generating free carriers. Simultaneously, the tool measures microwave
reflectivity which is proportional to the sample conductivity [56]. As the laser scans over the
surface of the sample, the tool creates a raster or map of the effective lifetime at each pixel. The
spatially resolved lifetime map is particularly useful for comparing the effect of gettering on
particular grains or regions of the sample.
4.8 Photoluminescence Imaging
Photoluminescence imaging (PL) produces a high-resolution map of carrier lifetime rapidly
and non-destructively [57], [58]. The map illustrates the spatial distribution of lifetime in the
sample. A PL image is obtained by illuminating a sample with a 808 nm laser to excite minority
carriers. Simultaneously a Princeton Instruments/ACTON, PIXIS: 1024 series infrared camera is
used to capture the luminescence of the sample.
39
40
CHAPTER
5
EXPERIMENTAL RESULTS
5.1 Introduction
To determine the effect of high-temperature
phosphorus diffusion gettering on
multicrystalline silicon, diffusion processes were performed at three temperatures. Sample
minority carrier lifetime and iron concentration were measured before and after the diffusion
process as a metric for material quality. Spatially resolved measurements provide further insight
into the uniformity of the impact on each sample.
5.2 Sample Mass and Thickness
To verify the thickness of sample material removed during CP4 etch, sample masses were
recorded. From the mass the thickness was calculated. Example recorded mass and calculated
thickness values are reported in Table 5.1.
Table 5.1: Sample Mass and Thickness
Mass [g]
Procedure
Pre-CP4
950 *C (as-grown)
1100 *C (as-grown)
--
0.7790
Post-CP4
Thickness [microns]
Pre-CP4
0.6282
0.6890
--
176.0
Post-CP4
146.6
155.7
41
5.3 Phosphorus Diffusion Time-Temperature Profiles
To determine the effectiveness of high-temperature phosphorus diffusion gettering, three
high-temperature profiles were designed for experimental tests.
Diffusion temperature is the
experimental variable. To isolate the impact of temperature, experimental profiles had consistent
load temperature, ramp rate, diffusion time, cool rate and unload temperature. Profile design and
theory are described in Chapter 3.
Experimentally, time-temperature profiles are pre-programmed into and controlled by the
furnace computer. The temperature is measured by three thermocouples along the length of the
furnace tube (at the front, middle and rear) to confirm a uniform tube temperature. Recorded
time-temperature profiles from the center thermocouple for each of the two higher temperature
experiments are reported in Figure 5.1 and Figure 5.2.
1000
goo
850
S800
750
700
650
600
550
500
0
20
40
60
80
100
120
140
160
180
Time (min)
Figure 5.1: Experimental Time-Temperature Profile for 950 *C Diffusion
Temperature recorded by furnace center thermocouple.
42
1200
1100
S1000
E
800
700
600
-
500
0
50
100
150
Time (min)
200
250
Figure 5.2: Experimental Time-Temperature Profile for 1100 *C Diffusion
Temperature recorded by furnace center thermocouple.
Experimental profiles deviate slightly from the ideal simulated profiles. During loading the
temperature of the furnace drops below the specified temperature because the tube is open to the
environment.
idealized
When ramping the furnace temperature, the ramp rate is often slower than the
1 00C/minute for several reasons. The furnace temperature controller prioritizes
maintaining a uniform furnace temperature over the ramp rate. If the measured temperature of a
zone of the furnace deviates too far from the other zones, the controller slows the ramp rate to
allow the tube to re-equilibrate. At the transition to the constant temperature plateau, the furnace
ramp rate slows as the furnace controller attempts to stabilize the constant temperature in all
three zones. The controller does not proceed to the phosphorus diffusion step until all three zone
temperatures are uniform to within 1PC for one minute.
43
Figure 5.3: Samples Gettered at 900 *C and 1100 *C
Samples from adjacent wafers exhibit similar grain structure after gettering at 900 'C (left) and
1100 *C (right). The sample gettered at higher temperature appears blue due to thicker emitter
layer formed during higher temperature phosphorus diffusion.
5.4 Measured Minority Carrier Lifetime and Interstitial
Iron Concentration
To measure and quantify the effectiveness of high-temperature phosphorus diffusion
gettering profiles, the minority carrier lifetime was measured and interstitial iron concentration
was calculated for each sample before and after gettering.
As-grown mean lifetime, interstitial iron and total iron concentration are reported in Table
5.2. Mean as-grown measurements are reported by ingot height. Also total iron concentration
was measured by inductively coupled plasma mass spectrometry (ICPMS) fitted with the Scheil
equation.
Measured lifetime and iron concentrations are consistent within each of the sample
sets as established by low standard deviations.
44
Table 5.2: Mean As-Grown Lifetime and Interstitial Iron
[Fei] (cm 3 )
1.13
7.4
10"
Mean 92
39.9
6.1
2.67
Mean 95
5.78
0.96
2.83 + 0.42 x 1012
x
[Fettai] (cm~ 3
)
T FeB (js)
x
10"
1.4 x 1014
After characterizing the as-grown iron concentration and lifetime values of the sample set, the
samples were split into three groups for high-temperature phosphorus diffusion gettering at three
plateau temperatures. Sets of sister wafers from both ingot height were randomly assigned to the
three gettering temperatures summarized in Table 5.3.
Table 5.3: Distribution of Samples by Ingot Height and Gettering Temperature
900*C
950*C
1100*C
92% ingot height
MG1090
MG1089
MG1088
95% ingot height
MG1119
MG1118
MG1120
After gettering, lifetime and iron concentration of each sample was measured again. Average
post-gettered lifetime for each ingot height is reported by PDG plateau temperature in Table 5.4.
Table 5.4: Mean Phosphorus-Diffused Minority CarrierLifetime,
T
Fe-B, (ps)
1100 *C
950 C
r (Rs)
900 *C
Mean 92
85.5 + 29.4
72.3
28.9
26.8
Mean 95
78.5
74.9
16.8
18.5 + 3.5
26.7
0.3
Interstitial iron concentration is calculated from lifetime measurements and reported by PDG
plateau temperature Table 5.5.
)
Table 5.5: Mean Phosphorus-Diffused Interstitial Iron Concentration [Fei] (cm~ 3
[Fei] (cm 3 )
900 *C
950 *C
1100 *C
Mean 92
9.18
5.61 x 10'
9.90
11.4 x 109
9.47
8.82 x 109
Mean 95
1.27
0.97 x 1010
3.91 +3.00 x 109
2.03
1.90 x 1010
45
5.5 Microwave Photoconductance Decay Results
Spatially resolved maps of lifetime were produced to provide a better understanding of the
lifetime distribution. Each sample was mapped at high resolution (0.5 mm raster) using a 200 ns
pulse width. After mapping all samples, each map was scaled to the same lifetime range of 9 to
104 As. Lifetime maps are shown for 92% and 95% ingot height samples in
Figure 5.4 and
Figure 5.5 respectively.
From the p-PCD measurement, histograms illustrating the area-weighted distribution of
lifetime for each sample were plotted. Histograms for the 92% and 95% ingot height samples
are plotted in
Figure 5.6 and
Figure 5.7 respectively.
46
0
ACB
0
C)
P
CL
9 us
104 us
Figure 5.4: p-PCD Maps for 92% Ingot Height
Lifetime ranges from 9 to 104 gs.
47
A
B
C
0
0
003L
0
0
0
LO)
0)
0
0
0L
0
0
C!,
9 us
104 us 0
Figure 5.5: p-PCD Maps for 95% Ingot Height
Lifetime ranges from 9 to 104 ps.
48
A
B
.......... -------------------------
c
----------- ----------------------- .........................
.......
..........
-------------
................................... .. -------------------------
0
0
------- ------------
----------
----------- -
0)
0
.......
.....
9
a
41
1.
47
a
1
",V-
w
)
9
20
es
47
L
............
C
IN
1.)
-- --------
10
104
[W)
......
............I ------------
------------
-----------------------
LO
0
a
...........
------------------------ ..........................
20
41
M
IN
-----------
------
M
----------- . ........
15
w
M
------------------------
1.
20
...................
20
9
IN
41
----------- 7 ----------------------- ------------------------
- ------......
......................
C>
CD
......
...... - ......
15
...........
........................
in
.......I
......... I........... ...........
10
------------
...........
...... ........
....................
...
0
0
a
0
47
W
... ...
as
1"
0
9
M
47
w
M
104
47
Be
e5
IN
LA4-1.1
M 9 us
104 us 0
Figure 5.6: Lifetime Histograms for 92% Ingot Height Samples
Histograms of sample area at by lifetime. Lifetime ranges from 9 to 104 gs.
49
A
B
r ...........
F........... 7 ........... T ........... ........................
c
T...........
---------
............. .........
................
............ ,...... .......... ....... ...........
0
........
0
)
0
20
47
M
as
'00
0
a
2S
104
a
uft
Low. 1-11
U'." "I
........... ....................... 7 ------------------------
'a
------------ 7
............ -T .........................
10
as
10.
1.1
........... 7 ....................... .........................
LO
.. ..........
........
...........
0
0
21
47
W
46
104
20
9
41
40
is"
...
...
104
9
26
......
30
......
LO*w W
........... 7 .............. ........ 7 ....
..
1.
47
1w)
.............
3D
........... ........................ .........................
........
.......... . ......
-- ----------- 1
----------- 1----------- - -----------
-------
0
26
47
05
Uf". 1.)
05
104
IQ
-------
9
29
47
----------
a
Lft
ft
IN
1........... ............
IQ
0
----------- 1----- ----- ---------
---
9
1-1
M 9 us
28
47
66
Lb.
1.)
104 us 0
Figure 5.7: Lifetime Histograms for 95% Ingot Height Samples
Histograms of sample area at by lifetime. Lifetime ranges from 9 to 104 gs.
50
es
104
5.6 Photoluminescence Imaging
Photoluminescence imaging (PLI) produced a high-resolution lifetime image of each sample.
PL images for the samples from 92% and 95% ingot heights are plotted in Figure 5.8 and Figure
5.9 respectively. Each sample was imaged at 60% laser power. The laser excites excess carriers
in the sample, and a camera captures the emitted energy at recombination.
Higher lifetime
regions are brighter. In addition, PL images of higher-lifetime samples appear blurrier as
minority carriers can travel farther before radiatively recombining.
51
CD
NA
U
0
0
0
0
Figure 5.8: PL Image for 92% Ingot Height Samples
Brighter regions indicate higher lifetime; arbitrary scale.
52
U
0
0
0
0
Figure 5.9: PL Image for 95% Ingot Height Samples
Brighter regions indicate higher lifetime; arbitrary scale.
53
54
CHAPTER
6
DISCUSSION
6.1 Introduction
From experimental results, the impact of high-temperature PDG on multicrystalline silicon
performance is determined. Previous work on high-temperature PDG has shown that increasing
gettering temperature is effective at removing impurities and improving material quality to a
point at which the material begins to degrade with increasing temperature [59].
Multiple
possible defects and sources of degradation at high-temperature are considered including Fe, Cr,
0, and dislocation propagation.
While some have considered iron a lifetime limiting defect for high-temperature annealing
[59], experimental and simulated results show that at high-temperatures iron is successfully
removed and not responsible for high-temperature degradation.
In determining a true upper
bound on high-temperature PDG, it is essential to investigate multiple possible sources of
degradation.
6.2 High-Temperature PDG Effectively Removes
Interstitial Iron
High-temperature
gettering
is
effective
at
reducing
interstitial
iron
concentration.
Experiments confirmed modeled predictions in Chapter 3 that high gettering temperature would
reduce interstitial iron concentration.
For each gettering temperature, the interstitial iron concentration was averaged by ingot
height and graphed in Figure 6.1. For both ingot heights and all three gettering temperatures,
55
iron concentration was reduced to below 1 x 1010. The measured iron concentration is
approaching the lower bound for the tool and QSSPC technique so the actual iron concentration
could be lower. Most important is that the effective iron concentration measured is constant after
gettering.
E
Average Decrease in Interstitial Iron
Concentration
1.OE+12
1.QE+10
0
1.QE+08
-
5
1.QE+06
10
S1.OE+04 - 1.0+04
1 .OE+02
As grown
Post-PDG
1.OE+00
92C
95B
92B
95A
92A
95C
Sample Number / Gettering Temperature
900 0C
950 *c
1100 C
Figure 6.1: Reduction in Interstitial Iron Concentration
Interstitial iron concentration is reduced for each ingot height and gettering temperature.
The percentage reduction for each ingot height is plotted in Figure 6.2.
The majority of
interstitial iron is removed during high-temperature processing or 95% for 92% ingot height
samples and 99% for 95% ingot height samples.
56
Mean Percent Reduction in Iron
Concentration
100%
0 98%1-
96%-
0
94%
92%
* 90%
88%
86%
95C
92A
95A
92B
95B
92C
Sample Number / Gettering Temperature
9000C
50 *C
1100 *C
Figure 6.2: Percent Reduction in Interstitial Iron Concentration
Percentage reduction in interstitial iron concentration is plotted for each ingot height and
gettering temperature.
6.3 Lifetime Decreases with Higher PDG Temperature
While high-temperature gettering successfully reduces interstitial iron concentration, sample
lifetime does not improve accordingly. As interstitial iron is removed from a sample, minority
carrier lifetime is expected to increase as shown in equation (3.5).
For the majority of the samples, the lifetime increased after phosphorus diffusion gettering.
Average percentage increase in minority carrier lifetime is plotted in Figure 6.3 by gettering
temperature. As gettering temperature increases, percentage increase in lifetime is lower.
For the 95% ingot height samples, with increasing gettering temperature percentage increase
in lifetime is lower. For these higher initial iron concentration samples with lower initial lifetime,
high-temperature processing always increases the lifetime. Increasing the gettering temperature
beyond 900 'C does not result in improved minority carrier lifetime.
For the 92% ingot height samples, increasing gettering temperature also results in decreased
percentage increase in lifetime. For the sample gettered at 1100 'C, the post-gettered lifetime is
lower than the pre-gettered lifetime.
57
Average Percentage Increase in Lifetime
1800%
1600%
E
e 1400%
-J1200%
Dark
lluminated
-
3 1000%
800%
e 600%
400%
200%
0%I
-200%
92A
95A
92B
95B
92C
Sample Number / Gettering Temperature
900 *C
950 OC
950
110D *C
Figure 6.3: Percent Reduction in Interstitial Iron Concentration
Percentage reduction in [Fei] is plotted for each ingot height and gettering temperature.
Average lifetime values for each ingot height are plotted by gettering temperature in Figure
6.4. Note that gettering increases the lifetime for the 95% ingot height samples to nearly equal
the 92% ingot height samples. The samples from the 95% ingot height initially had a much
higher iron concentration and lower lifetime. High-temperature gettering was able to bring the
lifetimes up to the level of the lower contamination samples.
58
Average Lifetime Post-PDG
-
Dark
Illuminated
-
100
90
80
70
60
E 50
40
~30
20
10
0
Sample Number/ Gettering Temperature
900 *C
950 0C
11000C
Figure 6.4: Post-Gettered Lifetime by Gettering Temperature
Dark and illuminated minority carrier lifetime.
Again the trend is clear that increasing gettering temperature results in lower minority carrier
lifetime. With increasing gettering temperature from 900 'C to 1100 'C the post-gettered
lifetime decreased.
As observed by previous studies, higher temperature gettering results in degraded lifetime. In
the next sections, spatial analysis is performed to elucidate the source of the thermal degradation.
6.4 Spatially Resolved Lifetime - pt-PCD
To understand the spatial resolution of lifetime, the samples were imaged using g-PCD. From
the maps in
Figure 5.4 and
Figure 5.5, lifetime is degraded with increasing temperature. Within each set of sister wafer
samples, the lifetime is clearly degraded with increasing gettering temperature at both ingot
heights. From the histograms with increased gettering temperature, the entire distribution of
lifetime is shifted left indicating uniformly lower lifetime values.
59
Quantifying the impact of high-temperature locally, lifetime for specific regions of the sister
samples are compared. Specifically, lifetime distribution and degradation within specific regions
are analyzed. The distribution of lifetime degradation within the samples is important to
identifying potential impurity or defect causing degradation.
To quantify the regional impact of lifetime degradation, sub-regions of the sister samples
were selected using grain boundary to ensure similar as-grown contamination and structure.
Regions of the same dimensions were aligned tangent to grain boundaries (used as a datum
surface) for three sister samples as shown in Figure 6.5 and Figure 6.6. From the selected
region, local average lifetime at 950 *C and 1100 *C is compared to that at 900 *C and plotted in
Figure 6.7 and fit with a linear approximation.
Lifetime degradation with increasing PDG
temperature is linear, indicates that lifetime degradation is uniform.
60
PDG 950 ~C
PDG 950 TC
qnn
~
p1v
Mr. QAA or
5
(D
1
Figure 6.5: Sub-Region Selection for Lifetime Comparison 95%
Regions of varying lifetime with well-defined grain boundaries were compared. Average lifetime
was calculated for each region.
PDG 900 *C
PDG 950 *C
PDG 1100 *C
(D0
3
Figure 6.6: Sub-region selection for Lifetime Comparison 92%
Regions of varying lifetime with well-defined grain boundaries were compared. Average lifetime
was calculated for each region.
61
Lifetime Degradation by Temperature
.
100
*
90
E
T950 -C
M T110010 C
80
S70
60
50
40
E
cL30
A!
20
Do
10
0
0
20
40
60
80
Lifetime for PDG 900 0C (ps)
100
120
Figure 6.7: Post-Gettered Lifetime Degradation by Temperature
Lifetime at 950 *C and I100 0 C is compared to lifetime at 900 'C to determine the uniformity of
thermal degradation. Linear trend indicates uniform lifetime degradation.
For each linear fit, the slope was calculated to estimate the impact of increased gettering
temperature on number of defects. Lifetime in a wafer after gettering at a given temperature T
can be expressed as -CT. Assuming one defect type is governing the lifetime, then TT is
proportional to the density of defects remaining in the wafer after gettering at that temperature,
ND,T,
as described by equation (6.1), where C is a constant.
C
(6.1)
TT = ND,T
From equation 6.1, the ratio of lifetime at two different gettering temperatures is correlated to the
ratio of density of defects in equation (6.2).
74T_
T900
ND,90 0
(6.2)
ND,T
The lifetime ratio corresponds to the slope of each linear fit in Figure 6.7 reported in Table 6.1.
From the slope, the percentage increase in defect density is calculated from the inverse of the
slope also reported in Table 6.1. The calculated values indicate an increase in defect density
with increasing gettering temperature. Gettering at 950 0 C and 1100 'C instead of 900 'C
62
increases the defect density by 23% and 236% respectively. While caution must be taken with a
limited data set, the supra-linear relationship between defect density and gettering temperature
suggests the possibility that the lifetime-limiting defect formed at the gettering temperature and
was minimally affected by the cool-down process.
Table 6.1: Slope of Lifetime Degradation by Temperature
T
950*C
1100*C
TT
0.810
0.298
NDT
ND,TO
ND,900
1.23
3.36
6.5 Spatially Resolved Lifetime - PL Imaging
Comparing the PL images of sister wafers highlights the impact of high-temperature gettering
on lifetime in different regions of the multicrystalline silicon samples. When analyzing samples,
sister wafers were compared to understand the uniformity of high-temperature processing on
grain structures and regions of the sample. For one set of sister samples, MG 1118, MG 1119, and
MG 1120, enlarged PL images are plotted for comparison in Figure 6.8.
At first glance, the PL images are progressively crisper with increasing gettering temperature.
The blurriness at for the low gettering temperature sample is due to the higher lifetime of the
material. When imaging higher-lifetime material, minority carriers can travel longer distances
before recombining, causing the image to blur.
Comparing the impact of gettering on the distribution of lifetime within a grain, one can
notice a distinct difference between samples gettered at different temperatures in Figure 6.8. As
gettering temperature increases, the grains suggest an increase in dislocation defects evidenced
by spider-web-like pattern. For example, the large grain in lower right hand corner exhibits
increased spider web pattering after higher temperature gettering. The change could evidence an
increase in thermal degradation at high-temperature, or simply the benefit of enhanced spatial
resolution due to shorter minority-carrier lifetime (lack of blurring).
With increasing gettering temperature, the large grains also show a decrease in dark spots and
the grains are more uniformly shaded. The decrease in dark spots could indicate removal or
63
decreased size of larger impurities.
The uniform grain shade indicates a uniform lifetime
distribution across the grain. Specifically, lifetime does not decrease as proximity to the grain
boundary increases. Gradients in lifetime do not appear near grain boundaries or point defects.
The uniformity of the lifetime degradation indicates that the high-temperature degradation
defect is uniformly distributed across the sample.
Figure 6.8: PL Image of Sister Samples by Gettering Temperature
Brighter regions indicate higher lifetime.
Similar to pt-PCD, PL image analysis of sister wafers suggest uniform lifetime degradation for
increased gettering temperatures.
64
6.6 Candidate Sources of High-Temperature
Degradation
To identify a source of high-temperature degradation, literature on high-temperature gettering
was reviewed and summarized in Table 6.2.
Table 6.2: Candidate High-Temperature Contaminants
Contaminant
Hypothesis
Measurement
Literature
High-temperature changed the phase of
oxygen in the bulk from an inert form
(interstitial) to a recombination-active
FTIR to measure
Falster [60],
interstitial oxygen.
Pizzini [61],
H. Hiesimair [62]
Oxygen
Interstitial
oxygen
form (chain-like structure or precipitate).
Metal
Impurities
Ti
High-temperature PDG dissolves Ti
precipitates. Slow diffuser does not have
sufficient time to getter to the emitter.
DLTS
Chen 1979 [63],
K. Leo [64],
A. Rohatgi[65]
Cr
High-temperature PDG dissolves Cr
precipitates. Slow diffuser does not have
sufficient time to getter to the emitter.
Thermal disassociation
with Sinton tool and
QSSPC method.
--
Mo
High-temperature PDG dissolves Mo
DLTS
A. Rohatgi [65]
precipitates and standard POC1 3
processes do not adequately remove Mo.
Other
Synchrotron measurement could identify
common contaminants in as-grown
Existing synchrotron data
for MG as-grown material.
material at grain boundaries.
Dislocation
Thermal
stress during
loading and
unloading
Hightemperature
plastic flow
Thermal stress from loading and
unloading increases the dislocation
concentration. This seems unlikely as all
the samples were loaded and unloaded at
the same temperature.
Increase in dislocation density due to
plastic flow at high-temperature, e.g.,
caused by mechanical loading or
relaxation of residual stress at as-grown
Dislocation etch
Franke [66]
Dislocation etch
Macdonald
2000
[67]
defects.
65
6.7 Furnace Cool Rate Verification
As cool rate is critical to gettering as shown by simulation and experiments [68], the furnace
cool rate was verified from the temperature signal recorded during getting experiments.
Taking the average of the time derivative of the temperature signal provides an estimate for
the change in temperature per unit time. Plots of the average change in furnace temperature are
plotted in Figure 6.9 and Figure 6.10.
Derivative of Average Furnace Temperature
durring PDG at 950 *C
10
Figure 6.9: Derivative of Mean Furnace Temperature during 950 *C PDG
Ramp rate is 10 *C/min. Peak cool rate is 5 'C/min.
Derivative of Average Furnace Temperature
durring PDG at 1100 T
10
0
j
Time (imi
Figure 6.10: Derivative of Mean Furnace Temperature during 1100 'C PDG
Ramp rate is 10 *C/min. Peak cool rate is 8 *C/min.
At higher furnace temperature the cool rate increases, as the temperature gradient between the
furnace and surroundings is higher. Temperature cool rate can be controlled to reduce any
variation in thermal stress for future experiments.
66
6.8 Baseline Gettering at 845 0 C
To review the range of high-temperatures on gettering, the results of the high-temperature
gettering study were compared to samples from the same ingot gettered at a plateau temperature
of 845 *C with slow cool rate (-4 *C/min). Samples from the same ingot heights as the original
samples have similar initial iron concentration and consistent grain structure therefore provide a
useful baseline for the high-temperature gettering study. For the 95% ingot height, samples
compared were cut from the same wafer. For the 92% ingot height, samples compared were
averaged from proximate wafers. Note that samples for the 845 *C are not sister wafers or
samples directly adjacent from different wafers, which increase uncertainty. Especially in
multicrystalline silicon, lifetime and impurities are particularly dependent on grain structure.
Grain structure is most closely preserved between sample sets when sister wafers are selected.
While sister wafers were not available, the comparison still provides a valuable baseline.
Average minority carrier lifetime for the 92% and 95% ingot heights are plotted by
temperature in Figure 6.11 and Figure 6.12. (Lifetime measurements are reported at 5
x 1015
injection level.) For the 92% ingot height samples, improvement in minority carrier lifetime at
higher temperature is not definitive (especially due to a broken sample resulting in a low number
of samples at 900 *C). For the 95% ingot height samples, the lifetime is improved by increasing
gettering temperature to 900 *C, but beyond this point the lifetime degrades with increasing
temperature.
67
Average Lifetime Post-PDG by Temperature for
92% Ingot Height Samples
120
U Dark
100
Illuminated
-
80
60
-
E
40
-
20
0
845
900
950
1100
Gettering Temperature (C)
Figure 6.11: Average Lifetime Post-PDG by Temperature (92% Ingot Height)
Dark and illuminated minority carrier lifetime.
Average Lifetime Post-PDG by Temperature for
95% Ingot Height Samples
120
0 Dark
Illuminated ~
100 ---
60
-
E
40
-
80
-
20
0
845
900
950
1100
Gettering Temperature (*C)
Figure 6.12: Average Lifetime Post-PDG by Temperature (95% Ingot Height)
Dark and illuminated minority carrier lifetime.
68
6.9 Conclusion
High-temperature, "sacrificial" gettering processes were explored to optimize iron removal,
without consideration for emitter quality.
We utilize a kinetic gettering simulation, 12E, to
predict the effect of high-temperature gettering on iron concentration in multicrystalline silicon.
With increasing temperature, the solubility and diffusivity of iron in silicon increases.
Confirming the predicted simulation results, high-temperature gettering with a controlled cool
down was a successful method for reducing interstitial iron in mc-Si.
Yet, after high-temperature gettering, lifetime is not improved proportionally with decreased
iron concentration. Iron is no longer the lifetime-limiting defect in gettered material. Another
uniformly distributed defect likely is generated after higher-temperature processing and is
responsible for the observed lifetime degradation. With optimized gettering profiles, iron does
not place an upper bound on maximum gettering temperature.
Additional research must be
conducted, to elucidate the nature of the performance-limiting defect(s) generated after hightemperature gettering.
69
70
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