Semiconductor Nanowires Semiconductor Nanowires JASS 05 Technische Universität München April 2005 Yvonne Gawlina Yvonne Gawlina Semiconductor Nanowires Overview Introduction Synthesis of Nanowires - Pseudowires Properties of Nanowires Applications April 2005 Yvonne Gawlina - Free standing nanowires Semiconductor Nanowires Introduction stained glass: nanoparticles of gold and silver in glass Creation of Nanowire a new challenge in modern age! April 2005 Yvonne Gawlina The “first nanotechnologists” worked in the middle ages: Semiconductor Nanowires “Pseudowires” Pseudowires: wires which are enclosed in other material Methods of manufacturing: - lithography and etching top down - electrostatically induced wires - strain induced wires - cleaved edge overgrowth April 2005 Yvonne Gawlina - growth on patterned surfaces Semiconductor Nanowires “Pseudowires” Litography and etching Coating with resist Create pattern Etch, until wire remains Sometimes overgrown again to shield wire! Disadvantages: optical and electrical dead layer because of defects due to etching April 2005 Yvonne Gawlina Formation of 2d quantum well Semiconductor Nanowires “Pseudowires” Electrostatically induced wires - Creation of a Schottky contact (metal on semiconductor): - application of voltage raises/lowers the bands split gates: two slightly separated metal strips with voltage: potential minimum creates of wire of variable width disadvantage: potential minima not very deep only for low temperature April 2005 Yvonne Gawlina creation of “wires” for holes/electrons at certain voltages Semiconductor Nanowires “Pseudowires” Strain induced wires Carbon as stressor Wires through strain Disadvantage: very small potential only for low temperatures April 2005 Yvonne Gawlina 2d quantum wire Semiconductor Nanowires “Pseudowires” V-groove nanowires Growth of barrier material Growth of wire material Growth of 2nd barrier material to sharpen groove again wire April 2005 Yvonne Gawlina V-shape due to different etching directions Semiconductor Nanowires “Pseudowires” Cleaved edge overgrowth Growth of quantum well rotation Disadvantage: low temperatures needed Growth of second quantum well April 2005 Yvonne Gawlina wire Semiconductor Nanowires Synthesis of Nanowires Methods of Nanowire synthesis VLS (Vapour Liquid Solid) method Modification of VLS CVD (Chemical Vapour Deposition) LCG (Laser Ablation catalytic Growth) FLS (Fluid Liquid Solid) mechanism SLS (Solution Liquid Solid) mechanism OAG (Oxide Assisted Growth) April 2005 Yvonne Gawlina Low temperature VLS method Semiconductor Nanowires Vapour Liquid Solid method Basics about phase diagrams Alloys have phase diagrams Lever rule: s tot g g l a s g gl T liquid solidus mixed crystal gl gtot A gs B al + a s = 1 April 2005 Yvonne Gawlina liquidus liquid and solid Semiconductor Nanowires Vapour Liquid Solid method Eutectic: - coexistence of 3 phases - lowest temperature where system is still totally liquid - minimum of liquidus curve - solid in solid + liquid phase consists of only one material liquidus liquid Eutectic A + liquid B+ liquid Mixed crystal A solidus B April 2005 Yvonne Gawlina T Semiconductor Nanowires Vapour Liquid Solid method - mix of semiconductor and metal - eutectic - melting point of Semiconductor with metal lower - growth of one pure material T l metal as catalyst A+l B+ l Mixed crystal B A reactant vapour metal Liquid catalytic nanocluster reactant vapour metal +Sc supersaturating reactant vapour metal +Sc Nanowire nucleation reactant vapour metal +Sc Nanowire growth Sc April 2005 Yvonne Gawlina Growth procedure: Semiconductor Nanowires Vapour Liquid Solid method Synthesis of multicomponent semiconductor, like binary III-V materials (GaAs, GaP,InAs, InP) ternary III-V materials (GaAs/P, InAs/P) binary II-VI materials ( ZnS, ZnSe, CdS, CdSe) binary Si Ge alloys T liquid E.g. Au - GaAs pseudobinary phase diagram GaAs+ liquid Au + liquid Au + GaAs Au GaAs April 2005 Yvonne Gawlina Pseudobinary phase diagram Semiconductor Nanowires Vapour Liquid Solid method - critical diameter, so that the liquid catalyst clusters are stable in equilibrium Problem: in fluid at according temperature critical diameter about d = 0.2 mm Goal: finding methods to get smaller metal clusters to start NW growth April 2005 Yvonne Gawlina 4 dc C RTln C = surface free energy = molar Volume R = gas constant T = absolute temperature C = concentration of semiconductor component in liquid alloy C equilibrium concentration Semiconductor Nanowires Chemical Vapour Deposition E.g. growth of GaN nanowires in CVD reactor - Ni catalyst on Si substrate with 0.5 M Ni(NO3)26H2O drying in oven - formation of Ni islands on Si substrate - Ga and GaN powder in inner reactor - Ammonia gas into inner reactor start of nanowire growth - Nitrogen gas during cooling phase April 2005 Yvonne Gawlina - Hydrogen in outer tube to minimise side reactions until 700 °C Semiconductor Nanowires Chemical Vapour Deposition CVD reactor 1. Vertical tubular furnance 2. Gas inlet line 3. Ni-coated Si substrate 4. Gas outlet line 6. Inner reactor tube April 2005 Yvonne Gawlina 5. Outer reactor tube Semiconductor Nanowires Laser Ablation Catalytic Growth nanometer sized cluster with laser ablation hn SC SC M SC SC SC M, SC Laser ablation Vapour condenses in cluster SC SC Supersaturation until start of wire growth Transport from growth zone April 2005 Yvonne Gawlina M Semiconductor Nanowires Laser Ablation Catalytic Growth LCG reactor Cold finger Focus Tube furnace Gas: in Target in quartz tube Gas: out April 2005 Yvonne Gawlina Laser Semiconductor Nanowires Laser Ablation Catalytic Growth Results with LCG: with Si: - uniform Diameter down to 3 nm. - Amorphous coating, consisting of SiO2 - Nanocluster at the end of the wire, consisting of metal and Si (e.g. FeSi2) Nanowire diameter depends on nanocluster catalyst diameter: Nanocluster nm 4.9 +/- 1.0 9.7 +/- 1.5 Nanowire nm 19.8 +/-2.0 30.3 +/- 3.0 6.4 +/- 1.2 12.3 +/- 2.5 20.0 +/- 2.3 31.1 +/- 2.7 April 2005 Yvonne Gawlina - [111] growth direction Semiconductor Nanowires Low temperature VLS method - metal with low melting point (e.g. Ga ,In, Bi..) - eutectic with very low semiconductor content - silane decomposition by atomic hydrogen e.g. SiHx(g) + xH(g) Ga-Si(l) + xH2(g) April 2005 Yvonne Gawlina Ga Semiconductor Nanowires Low temperature VLS method 4 dc C RTln C = surface free energy = molar Volume R = gas constant T = absolute temperature C = concentration of semiconductor component in liquid alloy C equilibrium concentration d = 6nm usually with Si conc. of about 20-30 % d= 0.2 mm E.g. Ge with Ga forms eutectic at only 30 °C! April 2005 Yvonne Gawlina E.g. T = 400°C and 1% of Si Semiconductor Nanowires Fluid Liquid Solid mechanism E.g growth of Si nanowires - alkanethiol coated Au nanocrystals (d = 6.7 +/- 2.6 nm) tethered on Si substrate - diphenysilane (C12H12Si) decomposes in supercritical cyclohexane (C6H12) Si Si Si Si Au Au SiO2 Si Si Au SiO2 SiO2 Si Si April 2005 Yvonne Gawlina Si Si Semiconductor Nanowires Fluid Liquid Solid mechanism manipulation of NW: - metal seed density and size - Diphenylsilane rate - Temperature - T small: few nanoparticles but nanowires curled - T high: straight nanowires but more nanoparticles April 2005 Yvonne Gawlina FLS reactor Semiconductor Nanowires Solid Liquid Solid mechanism E.g. amorphous Si nanowires with SLS Si nanowires Si - Ni alloy Ni Si Si Heat Ni coated Si substrate Si Si Si Si Si Si Heat Heat diffusion of Supersaturating of Ni Si into Ni Heat Growth of Si nanowires April 2005 Yvonne Gawlina Si substrate Semiconductor Nanowires Oxide Assisted Growth - Oxides as catalyst instead of metal Ge nanowires Silicon nanoribbons April 2005 Yvonne Gawlina - production of Ge nanowires, Si nanowires, carbon nanowires, silicon and SnO2 nanoribbons, Group III - V and II - VI compound semiconductor nanowires Semiconductor Nanowires Oxide Assisted Growth Process of OAG for Si: - SiO2 powder added to Si (SiO2 needed throughout process) - ablation of powder - silicon sub-oxides form bonds with Si substrate - “dangling bonds” act as nuclei April 2005 Yvonne Gawlina - Si takes places of oxide start of nanowire growth and outer layer of SiOx Semiconductor Nanowires Oxide Assisted Growth - kinds of silicon oxide cluster: + oxygen rich cluster + silicon rich cluster + silicon monoxide like clusters (Si : O = 1:1) - highest reactivity in Si rich cluster yield [110] Triangle [110] Rough circle [110] Rough rectangle [112] Pentagon [001] [001] April 2005 Yvonne Gawlina - growth surpressed in certain directions Semiconductor Nanowires OAG, VLS and temperature For Si: T = 1100 °C - 1200 °C : d gets smaller with decreasing T, metal found in wire VLS mechanism with [111] as favoured growth direction T = 850 °C - 1050 °C : no metal in wire OAG region, diameter not dependant on T April 2005 Yvonne Gawlina T = 1100 °C : Coexistence of OAG and VLS Semiconductor Nanowires Nanowires Minimum d in[nm] structure Ratio of components GaAs 3 Zinkblende 1.00 : 0.97 GaP 3-5 Zinkblende 1.00 : 0.98 GaAs0.6P.0.4 4 Zinkblende 1.00 : 0.58 : 0.41 InP 3-5 Zinkblende 1.00 : 0.98 InAS 3-5 Zinkblende 1.00 : 1.19 InAs0.5P0.5 3-5 Zinkblende 1.00 :0.51 : 0.51 Zns 4-6 Zinkblende 1.00 : 1.08 ZnSe 3-5 Zinkblende 1.00 : 1.01 CdS 3-5 Wurtzite 1.00 : 1.04 CdSe 3-5 Wurtzite 1.00 : 0.99 Si1-xGex 3-5 Diamant Si1-xGex Material April 2005 Yvonne Gawlina Summary of some single crystal nanowires synthesised Semiconductor Nanowires Properties of Nanowires PL characterisation PL dependence on direction: parallel “on” perpendicular “off” - intensity uniform along wire April 2005 Yvonne Gawlina - periodic cos2dependence Semiconductor Nanowires Properties of Nanowires - Shift to higher energies with decreasing diameter - Quantum confinement effects below d = 20nm - T - dependant shift April 2005 Yvonne Gawlina Size Dependant PL Semiconductor Nanowires Properties of Nanowires Size Dependant PL Theory: particle in an infinite cylinder Wave function: re,h ze,h Ψ(r e,h , ze,h ) NJ0 (α01 )sin(π ) R L 2 ΔΕ 2m * α01 2 π 2 R L e2 Ψ(x e ) ( xh ) | | Ψ(x h )(x e ) ε| x e x h | April 2005 Yvonne Gawlina Energy shift Semiconductor Nanowires Properties of NW Polarised excitation and emission Polarisation rate: ΙΙΙ Ι ρ 0.91 0.07 ΙΙΙ Ι Most nanowires r= 0.96 Excitation emission 2ε 0 Ei Ee ε ε0 Solid line: parallel dashed line: perpendicular with e= 12.4 for InP r= 0.96 April 2005 Yvonne Gawlina Theory: infinite dielectric cylinder in vacuum and laser is constant Semiconductor Nanowires Properties of NW Polarised Photodetection photodetector Conductance vs. power density: lower branch: light perpendicular polarised Conductance vs. polarisation angle April 2005 Yvonne Gawlina upper branch: light parallel polarised Semiconductor Nanowires Properties of NW Thermal conductivity 1 κ c v vl 3 Cv= specific heat v = velocity of phonons l = mean free path Alteration of phonon transport in nanowires: - more boundary scattering - changes in phonon dispersion relation - quantization of phonon transport April 2005 Yvonne Gawlina Mean free path for phonons in solids in the nm range Semiconductor Nanowires Properties of Nanowires Thermal conductivity Deviation from the Debye T3 law April 2005 Yvonne Gawlina Si NW thermal conductivity 2 orders of magnitude smaller than in bulk Si Semiconductor Nanowires Properties of NW Doping - possible to dope nanowires, e.g silicon: boron doped p-type Lightly doped Heavily doped metallic many new exciting possibilities for application of nanowires April 2005 Yvonne Gawlina phosphor doped n-type Semiconductor Nanowires Applications - Nanowire heterostructures + axial heterostructures, e.g GaP-GaAs heterojunction + radial heterostructures, e.g. Si-Ge April 2005 Yvonne Gawlina + Nanowire superlattices Semiconductor Nanowires Applications - Sensors + pH sensors + gas sensors (e.g. Ammonium, Water) - Single mode optical wave guides Gas out April 2005 Yvonne Gawlina Gas in Semiconductor Nanowires Applications - Nanophotonics + nanoLEDs (p and n type nanowires in crossed nanowire device light from crossing point at forward bias) - Nanoprobes + Tips for Atomic Force Microscopy - High temperature, high current superconductors - nanoFETs etc. April 2005 Yvonne Gawlina - Lasers (electrically driven) Semiconductor Nanowires Summary Synthesis Pseudowires Free standing Nanowires Properties PL Doping Applications April 2005 Yvonne Gawlina Thermal