Synthesis of the
Optimal 4-bit
Reversible Circuits
Oleg Golubitsky Sean Falconer Dmitri Maslov (spkr)
Google Inc.
Waterloo, ON, Canada
Stanford University
Stanford, CA
University of Waterloo
Waterloo, ON, Canada
Basic Definitions
NOT
x
y
x
y
z  xy
z
Toffoli
CNOT
Toffoli-4
Reversible circuit is a string of gates. Reversible nbit function is a permutation of 2n elements.
page 1/15
Problem
Synthesize optimal 4-bit reversible circuits, i.e., containing
minimal number of gates.
Complexity
-- There are 16!=20,922,789,888,000 reversible functions.
-- There 32 gates.
-- An average optimal circuit requires 11.94 gates.
:: 20,922,789,888,000 * log2 32 * 11.94 bits > 100 TB.
Murphy, David. "Western Digital Launches World-First 2TB
Hard Drive". PC World. Retrieved 2009-01-27.
page 2/15
Importance
Library for physicists interested in performing a small
experiment, but having very limited control over their system.
Indispensable for peep-hole optimization methods. Peephole optimizations are an important part of any modern
compiler.
Mathematical curiosity. Computing the value of Shannon’s
complexity function. L(3)=8, L(4)=[14,17], L(5)=?
page 3/15
Solution
Denote 16!=N (formally, N:=2n!).
Rough complexity analysis
N 
-- time: N 
-- space:
Next, reduce these complexity figures to something
manageable.
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Solution
Optimization 1
Synthesize and save only halves of all optimal circuits.
An optimal circuit for any function may be found by searching
for both of its halves.
Rough complexity analysis
-- space: 
-- time: 

 N

N * N   N 
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Solution
Optimization 2
Store optimal halves in a hash table.
Rough complexity analysis
 N
-- time: soft   N 
-- space: 
Actual complexity is closer to
OSpace Re quiredToSt oreHalves( N )
-- time: soft OSpace Re quiredToSt oreHalves( N )
-- space:
page 6/15
Solution
Optimization 3
Simultaneous input/output relabeling does not change
optimality of a circuit. Thus, we store a single (canonical--binary string with least lexicographic order) representative.
In practice, there are almost 24=4! different relabelings,
reducing the storage complexity by a factor of almost 24, and
helping to reduce runtime.
page 7/15
Solution
Optimization 4
If an optimal circuit is found for a function f, an optimal circuit
for the inverse function, f -1, can be obtained by reversing the
optimal circuit for f.
In practice, random f frequently differs from f -1 resulting in
the reduction of storage requirement by an additional factor
of almost 2, and helping to further reduce the runtime.
page 8/15
Performance
Parameters of the linear hash table storing canonical
representatives.
k
Size
7
225
8
228
Memory usage 256 MB 2 GB
Load factor
0.58
0.91
9
232
32 GB
0.51
Using a high performance server with 16 AMD Opteron
2300 MHz processors, 64 GB RAM, and Seagate
Barracuda ES2 SCSI 7200 RPM HDD running Linux it took
10,549 seconds (under 3 hours) to synthesize all optimal
circuits with up to 9 gates.
page 9/15
Performance
Size
14
13
Functions
17,191
2,371,039
12
11
10
5,110,943
2,051,507
392,108
9
8
7
50,861
5,269
455
6
5
24
3
Synthesis of 10,000,000 random
functions (Fisher-Yates shuffle over
Mersenne twister random number
generator) took 104,616.716 seconds
(about 29 hours) of user time with the
maximal memory usage of 43.04 GB.
Loading optimal circuits with up to 9
gates into RAM took 1111 seconds.
On average, it took only 0.01035
seconds to synthesize an optimal circuit.
A 5400-RPM HDD access time may be
expected to be on the order of 0.01—
0.02 seconds.
page 10/15
Performance
Distribution of the
number of functions
requiring a circuit of
a specified size
(gate count).
page 11/15
Performance
Size Functions
10 138
9 13,555
8 84,225
7 118,424
6 72,062
Distribution of the number of
linear functions requiring a
circuit of a specified size
(gate count).
5 26,182
4 6,589
3 1206
It took under 2 seconds to
synthesize all these circuits.
2 162
1 16
0 1
WA: 6.8816
Total: 322,560
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Performance
page 13/15
Future directions
Larger circuits
-- There are 80 transformations resulting from the application
of all possible Toffoli-type gates on 5 bits.
-- 806*(log2 80)/5!/2 ~ 7.1 billion bits, fits into RAM memory.
-- 6+6=12. Meaning, it is reasonable to expect that extending
the search for optimal 4-bit reversible circuits will allow to find
optimal 5-bit reversible circuits with up to 12 gates.
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Future directions
Optimal circuits using other cost metrics
This search can be easily extended to account for other cost
metrics:
Weighted gate count optimal circuits---organize breadth
first search such that a gate with cost G is assigned to a
circuit of cost C at the iteration number G+C.
Depth optimal circuits---choose a different set of
elementary transformations, e.g., circuit NOT(a)CNOT(b,c) is
now an elementary transformation.
Depth optimal weighted gate circuits---combine previous
two modifications.
page 15/15
END
Questions?
2 ! 5.418528796 10
10
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Classically:
210!/(Lifespan_of_universe_in_Planck_time_units *
Estimated_number_of_atoms) ~ 102452 universes!
page __/__
Work in progress
Synthesize all optimal 4-bit circuits
-- Store circuits with up to 9 gates as we do it now.
-- Store a bit vector (~250 GB) for canonical representatives
of circuits with 10, 11, 12, 13, and 14 gates, one at a time.
-- Use a minimal number of uploads/downloads of parts of
each of such vectors into RAM.
page __/__