E. T. TELECOMUNICACIONS 1BT4 30/10/2007 DIGITAL ELECTRONICS Prof. F. J. Sànchez i Robert - Minimum control: 40 min. Grades will be available on November 5th - Questions about the examination: TU:15:00 – 17:00; TH: 15:00 – 19:00 VERY IMPORTANT: Draw a general schematic or plan, develop the exercise and justify the results explaining always what you are doing Minimum 3 Fig. 1 Internal structure of a 74LS85 cascadable 4-bit comparator1 1. Draw the symbol of an entity 12-bit comparator COMP12 2. Invent an internal architecture cascading COMP4 74LS85 to produce the COMP12 3. If the internal circuit for the 74LS85 is the one represented in Fig. 1, determine for the block COMP12: 1 Find the electrical characteristic of this chip in its datasheet at: http://www.alldatasheet.com/ 1 2 - The maximum frequency of operation - The power dissipation when the outputs are in open circuit - The power dissipation if the outputs are loaded with 10 mA LED’s - Determine approximately the battery duration if a cell of 5 V - 2500 mA·h is used to power the circuit Minimum 4 We used the Minilog2 software to determine the output functions of a cascadable COMP1 like the one shown in Fig. 2, and the following output functions were found: FUNCTION TABLE (the simplified truth table) =========== =========== GEL GEL TQT GEL GEL ABIII ABIII TQT =========== =========== -01-- | 1.. 10--- | 100 1-1-- | 1.. 01--- | 001 00-1- | .1. 00100 | 100 11-1- | .1. 00010 | 010 0---1 | ..1 00001 | 001 -1--1 | ..1 11100 | 100 10--- | 1.. 11010 | 010 01--- | ..1 11001 | 001 πΊπ = π(π΄, π΅, πΊπΌ, πΈπΌ, πΏπΌ) = π΅′ · πΊπΌ + π΄ · πΊπΌ + π΄ · π΅′ πΈπ = π(π΄, π΅, πΊπΌ, πΈπΌ, πΏπΌ) = π΄′ · π΅′ · πΈπΌ + π΄ · π΅ + πΈπΌ πΏπ = π(π΄, π΅, πΊπΌ, πΈπΌ, πΏπΌ) = π΄′ · πΏπΌ + π΅ · πΏπΌ + π΄′ · π΅ 1-BIT COMP 0 1 A 0 1 0 GI GT B EQ LT 0 0 1 EI LI COMP1 Fig. 2 A cascadable 1-bit comparator cell 1. Write the output functions GT, EQ, and LT, as canonical sum of minterms 2. Solve the circuit (produce GT, EQ and LT) by the method of decoders 2 Wim de Valk, Fontys Hogescholen Eindhoven, http://pico1.e.ft.fontys.nl/publicad.html 3 3. Implement the function LT by the method of multiplexers using a MUX2 Extra voluntary exercises 4. Mount the required decoder using 74LS138 chips and verify the design in (2) using Proteus-VSM. 5. Could you find information on how to synthesize a COMP12 using VHDL-based project and programmable logic devices? 4