CAPACITANCE AND INDUCTANCE Introduces two passive, energy storing devices: Capacitors and Inductors LEARNING GOALS CAPACITORS Store energy in their electric field (electrostatic energy) Model as circuit element INDUCTORS Store energy in their magnetic field Model as circuit element CAPACITOR AND INDUCTOR COMBINATIONS Series/parallel combinations of elements RC OP-AMP CIRCUITS Integration and differentiation circuits CAPACITORS First of the energy storage devices to be discussed Basic parallel-plates capacitor CIRCUIT REPRESENTATION NOTICE USE OF PASSIVE SIGN CONVENTION Typical Capacitors C A d Dielectric constant of material in gap PLATE SIZE FOR EQUIVALENT AIR-GAP CAPACITOR 8.85 1012 A 8 2 55F A 6 . 3141 10 m 4 1.016 10 Normal values of capacitance are small. Microfarads is common. For integrated circuits nano or pico farads are not unusual Basic capacitance law Q f (VC ) Linear capacitors obey Coulomb’s law Q CVC C is called the CAPACITANCE of the device and has units of charge voltage One Farad(F)is the capacitance of a device that can store one Coulomb of charge at one Volt. Coulomb Farad Volt Linear capacitor circuit representation EXAMPLE Voltage across a capacitor of 2 micro Farads holding 10mC of charge VC 1 1 3 Q 10 * 10 5000 6 C 2 *10 V Capacitance in Farads, charge in Coulombs result in voltage in Volts Capacitors can be dangerous!!! Capacitors only store and release ELECTROSTATIC energy. They do not “create” The capacitor is a passive element and follows the passive sign convention Linear capacitor circuit representation i (t ) C dv (t ) dt LEARNING BY DOING QC CVC Capacitance Law If the voltage varies the charge varies and there is a displacement current One can also express the voltage across in terms of the current 1 VC (t ) Q 1 C C … Or one can express the current through in terms of the voltage across t iC ( x)dx Integral form of Capacitance law The mathematical implication of the integral form is ... VC (t ) VC (t ); t Voltage across a capacitor MUST be continuous iC dV dQ C C dt dt Differential form of Capacitance law Implications of differential form?? VC Const iC 0 DC or steady state behavior A capacitor in steady state acts as an OPEN CIRCUIT CAPACITOR AS CIRCUIT ELEMENT iC LEARNING EXAMPLE C 5F DETERMINE THE CURRENT vC iC (t ) C i (t ) C dvc (t ) dt 1 iR v R R vR Ri R t 1 vC (t ) iC ( x)dx C t t0 Ohm’s Law t t0 vc ( t O ) t 1 0 1 t vC (t ) iC ( x )dx iC ( x )dx C C t0 t 1 vC (t ) vC (t0 ) iC ( x)dx C t0 The fact that the voltage is defined through an integral has important implications... dv (t ) dt 60mA i 5 106[ F ] 24 V 20mA 6 103 s i (t ) 0 elsewhere CAPACITOR AS ENERGY STORAGE DEVICE iC vC Instantaneous power pC (t ) vC (t )iC (t ) W dvc iC (t ) C (t ) dt dvc pC (t ) CvC (t ) dt t q (t ) 1 vC (t ) iC ( x)dx C C C dq 1 pC (t ) qC (t ) C (t ) C dt d 1 2 Energy is the integral of power t pC (t ) C vC (t ) dt 2 w (t , t ) p ( x )dx p (t ) 1 d 1 q 2 (t ) C 2 1 C c C C dt 2 t 2 1 If t1 is minus infinity we talk about “energy stored at time t2.” 1 1 wC (t 2 , t1 ) CvC2 (t 2 ) CvC2 (t1 ) 2 2 If both limits are infinity then we talk about the “total energy stored.” 1 2 1 2 wC (t 2 , t1 ) qC (t 2 ) qC (t1 ) C C Energy stored in 0 - 6 msec C 5F 1 1 wC (0,6) CvC2 (6) CvC2 (0) 2 2 1 wC (0,6) 5 *106 [ F ] * (24) 2 [V 2 ] 2 Charge stored at 3msec qC (3) CvC (3) LEARNING EXAMPLE qC (3) 5 *10 6 [ F ] *12[V ] 60C “total energy stored?” .... “total charge stored?” ... If charge is in Coulombs and capacitance in Farads then the energy is in …. C 4 F . FIND THE VOLTAGE v (0) 0 1t v (t ) v (0) i ( x )dx; t 0 C0 0t 2 v (t ) v (2) t 1 i ( x )dx; t 2 C2 3 v (t ) 2t 8 10 [V ] 2 t 4ms C 4 F . FIND THE POWER i (t ) 8 103 t v (0) 0 p(t ) 8t 3 , 0 t 2ms 2 t 4ms p(t ) 0, elsewhere FIND THE ENERGY p(t ) 8t 3 , 0 t 2ms p(t ) 0, elsewhere 2 t 4ms LEARNING EXTENSION C 2 F DETERMINE THE CURRENT i 2 106 F i 2 106 F 12 V 3 2 10 s 12 V 4 103 s i (t ) C dv (t ) dt SAMPLE PROBLEM C 2 F v (t ) v (t ) 130 sin (120 t ) WHAT VARIABLES CAN BE COMPUTED? Charge stored at a given time 1 2 CvC (t ) E (1 / 240) 1 2 *10 6 [ F ] *130 2 sin 2 2 2 2 qC (1 / 120) 2 *106 [C ] * sin( )[V ] 0 C qC (t ) CvC (t ) Current through the capacitor iC C Energy stored at a given time t E (t ) dvC (t ) dt Electric power supplied to capacitor at a given time Energy stored over a given time interval iC (1 / 120) 2 *106 *130 *120 cos( ) pC (t ) vC (t )iC (t ) W 1 1 w (t 2 , t1 ) CvC2 (t 2 ) CvC2 (t1 ) 2 2 J J A If the current is known ... SAMPLE PROBLEM Current through capacitor iC C vC e 0.5t ; t 0 iC (t ) [mA] 0; t 0 C 2F t Voltage at a given time t 1 vC (t ) iC ( x)dx C vC (0) 0[V ] Voltage at a given time t when voltage at time to<t is also known 2 1 1 0.5 x v ( 0 ) e dx vC (2) C 2 *106 C 0 Charge at a given time 2 1 1 1 0.5 x 1 6 e 0.5 2 *10 6 0.5 1 e 0.6321*10 V 0 qC (t ) CvC (t ) qC (2) 2 * 0.6321 t Voltage as a function of time vC (t ) Electric power supplied to capacitor 1 iC ( x)dx C vC (t ) 0; t 0 pC (t ) vC (t )iC (t ) Energy stored in capacitor at a given time w ( t ) “Total” energy stored in the capacitor t 1 vC (t ) vC (t0 ) iC ( x)dx C t0 W 1 2 CvC ( t ) J 2 1 wT CvC2 () 2 C t 1 vC (t ) vC (0) e 0.5 x dx C0 106 (1 e 0.5t ); t 0 vC (t ) 0; t 0 1 wT 2 *106 * (106 ) 2 106 2 J V SAMPLE PROBLEM Given current and capacitance Compute voltage as a function of time At minus infinity everything is zero. Since current is zero for t<0 we have 0 t 5m sec VC (0) 0 VC (t ) 5 10 VC (t ) 0; t 0 15 A 106 A iC (t ) t 3 3 t 3 *103[ A / s] t 5 ms 10 s 3 t 3 3 *10 xdx [V ] 3 *10 t 2 [V ]; 0 t 5 *103[ s ] 6 4 *10 0 8 In particular 3 *103 * (5 *103 ) 2 75 VC (5ms) [V ] [mV ] 8 8 t (m sec) 5 t 10 ms iC (t ) 10 [ A] t 75 75 *103 1 VC (5ms ) [mV ] VC (t ) (10 *106 )[ A / s ]dx 6 8 8 4 *10 5*103 Charge stored at 5ms qC (t ) CVC (t ) 75 *10 3 q(5ms) 4 *10 [ F ] * [V ] 8 6 q(5ms) (75 / 2) [nC ] 75 *103 10 VC (t ) t 5 *103 [V ]; 5 *103 t 10 *103 [ s ] 8 4 Total energy stored 1 E CVC2 2 Total means at infinity. Hence Before looking into a formal way to describe the current we will look at additional questions that can be answered. 2 3 6 25 *10 [ J ] ET 0.5 * 4 *10 8 Now, for a formal way to represent piecewise functions.... Formal description of a piecewise analytical signal 0; 3 2 t ; 8 Vc (t ) 75 10 t 5; 8 4 25 ; 8 t0 0 t 5ms 5 t 10 [ms] t 10[ms] [mV ] INDUCTORS Flux lines may extend beyond inductor creating stray inductance effects NOTICE USE OF PASSIVE SIGN CONVENTION Circuit representation for an inductor A TIME VARYING FLUX CREATES A COUNTER EMF AND CAUSES A VOLTAGE TO APPEAR AT THE TERMINALS OF THE DEVICE A TIME VARYING MAGNETIC FLUX INDUCES A VOLTAGE vL d dt LEARNING by Doing Induction law FOR A LINEAR INDUCTOR THE FLUX IS PROPORTIONAL TO THE CURRENT LiL diL vL L dt DIFFERENTIAL FORM OF INDUCTION LAW THE PROPORTIONALITY CONSTANT, L, IS CALLED THE INDUCTANCE OF THE COMPONENT INDUCTANCE IS MEASURED IN UNITS OF henry (H). DIMENSIONALLY HENRY Volt Amp sec INDUCTORS STORE ELECTROMAGNETIC ENERGY. THEY MAY SUPPLY STORED ENERGY BACK TO THE CIRCUIT BUT THEY CANNOT CREATE ENERGY. THEY MUST ABIDE BY THE PASSIVE SIGN CONVENTION Follow passive sign convention di vL L L dt Differential form of induction law t 1 iL (t ) vL ( x)dx L Integral form of induction law t 1 iL (t ) iL (t0 ) vL ( x)dx; t t0 L t0 A direct consequence of integral form i L (t ) iL (t ); t A direct consequence of differential form i L Current MUST be continuous Const. vL 0 DC (steady state) behavior Power and Energy stored pL (t ) vL (t )iL (t ) t2 w L (t 2 , t1 ) t1 W p L (t ) L d 1 2 LiL ( x ) dx dt 2 1 2 1 2 w (t 2 , t1 ) LiL (t 2 ) LiL (t1 ) 2 2 1 w L (t ) LiL2 (t ) 2 J diL d 1 (t )iL (t ) LiL2 (t ) dt dt 2 Current in Amps, Inductance in Henrys yield energy in Joules Energy stored on the interval Can be positive or negative “Energy stored at time t” Must be non-negative. Passive element!!! LEARNING EXAMPLE FIND THE TOTLA ENERGY STORED IN THE CIRCUIT In steady state inductors act as short circuits and capacitors act as open circuits 1 1 2 2 WC CVC W L LI L 2 2 @ A : 3 A VA VA 9 0 9 6 VA I L1 3 A I L 2 I L1 1.2 A V 6 V 10.8V VC 1 9 6 I L1 VC 1 16.2V C2 6 3 A VA I L2 1.8 A 9 81 [V ] 5 LEARNING EXAMPLE L=10mH. FIND THE VOLTAGE v (t ) L 20 103 A A m 10 s 2 103 s di (t ) dt A m 10 s THE DERIVATIVE OF A STRAIGHT LINE IS ITS SLOPE 10( A / s ) 0 t 2ms di 10( A / s ) 2 t 4ms dt 0 elsewhere di (t ) 10( A / s) 3 dt v (t ) 100 10 V 100mV L 10 103 H ENERGY STORED BETWEEN 2 AND 4 ms 1 1 w (4,2) LiL2 (4) LiL2 (2) 2 2 w(4,2) 0 0.5 *10 *103 (20 *103 )2 THE VALUE IS NEGATIVE BECAUSE THE INDUCTOR IS SUPPLYING ENERGY PREVIOUSLY STORED J SAMPLE PROBLEM L=0.1H, i(0)=2A. Find i(t), t>0 ENERGY COMPUTATIONS v (V ) 1 2 1 2 w (t 2 , t1 ) LiL (t 2 ) LiL (t1 ) 2 2 2 1t i (t ) i (0) v ( x )dx L0 2 t (s) Energy stored on the interval Can be positive or negative Initial energy stored in inductor w(0) 0.5 * 0.1[ H ](2 A)2 0.2[ J ] t v ( x ) 2 v ( x )dx 2t ; 0 t 2 0 L 0.1H i (t ) 2 20t ; 0 t 2 s “Total energy stored in the inductor” w() 0.5 * 0.1[ H ] * (42 A)2 88.2J v ( x ) 0; t 2 i (t ) i (2); t 2 s Energy stored between 0 and 2 sec 42 1 1 w (2,0) LiL2 (2) LiL2 (0) 2 2 i (A) w(2,0) 0.5 * 0.1* (42)2 0.5 * 0.1* (2)2 w (2,0) 88[ J ] 2 2 t (s) LEARNING EXAMPLE FIND THE VOLTAGE ACROSS AND THE ENERGY STORED (AS FUNCTION OF TIME) v (t ) FOR ENERGY STORED IN THE INDUCTOR w L (t ) NOTICE THAT ENERGY STORED AT ANY GIVEN TIME IS NON NEGATIVE -THIS IS A PASSIVE ELEMENT- LEARNING EXAMPLE L 10mH DETERMINE THE VOLTAGE v 100mV 20 103 A v 10 10 [ H ] 2 103 s 3 v (t ) L di (t ) dt LEARNING EXAMPLE FIND THE CURRENT i (t ) L=200mH 1t i (t ) i (0) v ( x )dx; t 0 L0 v (t ) 0; t 0 i (0) 0 i (t ) L=200mH FIND THE POWER NOTICE HOW POWER CHANGES SIGN i (t ) POWER p(t ) ENERGY w (t ) FIND THE ENERGY ENERGY IS NEVER NEGATIVE. THE DEVICE IS PASSIVE LEARNING EXTENSION L=5mH FIND THE VOLTAGE m 20mA 1ms m 10 20 ( A / s) 2 1 v 50mV m0 v 0V v 5 103 ( H ) 20( A / s); 0 t 1ms 100mV v (t ) L m di (t ) dt 0 10 ( A / s) 43 v 50mV CAPACITOR SPECIFICATIONS Nominal current CAPACITANC E RANGE p F C 50mF IN STANDARD VALUES 300nA STANDARD CAPACITOR RATINGS 6.3V 500V STANDARD TOLERANCE 5%, 10%, 20% 100 109 F (3) 3 V 600nA 3 2 s 300nA LEARNING EXAMPLE C 100nF 20% i (t ) C dv (t ) dt GIVEN THE VOLTAGE WAVEFORM DETERMINE THE VARIATIONS IN CURRENT INDUCTOR SPECIFICATIONS CURRENT WAVEFORM INDUCTANCE RANGES 1nH L 100mH IN STANDARD VALUES 200 103 A v 100 10 H 20 106 S 6 STANDARD INDUCTOR RATINGS mA 1A STANDARD TOLERANCE 5%, 10% s LEARNING EXAMPLE L 100 H 10% v (t ) L di (t ) dt GIVEN THE CURRENT WAVEFORM DETERMINE THE VARIATIONS IN VOLTAGE CL vi iv IDEAL AND PRACTICAL ELEMENTS i (t ) i (t ) i (t ) i (t ) v (t ) v (t ) v (t ) v (t ) IDEAL ELEMENTS i (t ) C dv (t ) dt v (t ) L CAPACITOR/INDUCTOR MODELS INCLUDING LEAKAGE RESISTANCE di (t ) dt i (t ) v (t ) dv C (t ) Rleak dt MODEL FOR “LEAKY” CAPACITOR v (t ) Rleak i (t ) L di (t ) dt MODEL FOR “LEAKY” INDUCTORS SERIES CAPACITORS C1C2 Cs C1 C2 Series Combination of two capacitors 6F 3F CS 2 F NOTICE SIMILARITY WITH RESITORS IN PARALLEL LEARNING EXAMPLE 1 F DETERMINE EQUIVALENT CAPACITANCE AND THE INITIAL VOLTAGE 2 F 3 2 1 6 OR WE CAN REDUCE TWO AT A TIME 2V 4V 1V ALGEBRAIC SUM OF INITIAL VOLTAGES POLARITY IS DICTATED BY THE REFERENCE DIRECTION FOR THE VOLTAGE LEARNING EXAMPLE 8V + - 12V Two uncharged capacitors are connected as shown. Find the unknown capacitance FIND C1 30 F 4V 18V C SAME CURRENT. CONNECTED FOR THE SAME TIME PERIOD SAME CHARGE ON BOTH CAPACITORS Q (30 F )(8V ) 240C Q CV Q (12F )(6V ) 72C C1 72C 4 F 18V PARALLEL CAPACITORS ik ( t ) C k dv (t ) dt i (t ) LEARNING EXAMPLE CP 4 6 2 3 15 F LEARNING EXTENSION 6 F 2 F 3 F C eq 3 C eq F 2 4 F 12 F 3 F 4 F SAMPLE PROBLEM FIND EQUIVALENT CAPACITANCE ALL CAPACITORS ARE 4 F 8 F 8 F 4 F C eq 8 32 8 3 3 32 F 12 8 F 8 F SAMPLE PROBLEM IF ALL CAPACITORS HAVE THE SAME CAPACITANCE VALUE C DETERMINE THE VARIOUS EQUIVALENT CAPACITANCES Examples of interconnections C EQ CAB ______ All capacitors are equal with C=8 microFarads SERIES INDUCTORS v (t ) LS vk (t ) Lk di (t ) dt LEARNING EXAMPLE Leq 7H di (t ) dt PARALLEL INDUCTORS i (t ) LEARNING EXAMPLE N i (t0 ) i j (t0 ) j 1 4mH 2mH i (t0 ) 3 A 6 A 2 A 1A INDUCTORS COMBINE LIKE RESISTORS CAPACITORS COMBINE LIKE CONDUCTANCES LEARNING EXTENSION ALL INDUCTORS ARE 4mH a CONNECT COMPONENTS BETWEEN NODES d 6mH a 4mH 2mH WHEN IN DOUBT… REDRAW! c 4mH Leq c d 2mH 2mH b 2mH IDENTIFY ALL NODES PLACE NODES IN CHOSEN LOCATIONS a Leq (6mH || 4mH ) 2mH 4.4mH d b b c LEARNING EXTENSION ALL INDUCTORS ARE 6mH a a 2mH 6 || 6 || 6 Leq b b 6mH 6mH c 6mH c NODES CAN HAVE COMPLICATED SHAPES. KEEP IN MIND DIFFERENCE BETWEEN PHYSICAL LAYOUT AND ELECTRICAL CONNECTIONS a b c SELECTED LAYOUT Leq 6 (6 2) || 6 6 Leq 48 24 6 mH 14 7 66 mH 7 L-C RC OPERATIONAL AMPLIFIER CIRCUITS INTRODUCES TWO VERY IMPORTANT PRACTICAL CIRCUITS BASED ON OPERATIONAL AMPLIFIERS THE IDEAL OP-AMP IDEAL RO 0, Ri , A RO 0 vO A(v v ) Ri A RC OPERATIONAL AMPLIFIER CIRCUITS -THE INTEGRATOR v 0 IDEAL OP-AMP ASSUMPTIONS v _ v ( A ) i _ 0 ( Ri ) RC OPERATIONAL AMPLIFIER CIRCUITS - THE DIFFERENTIATOR i2 R1 i1 KVL v 0 KCL@ v : i1 i2 i IDEAL OP-AMP ASSUMPTIONS v _ v ( A ) v i1 O 0 R2 i _ 0 ( Ri ) t 1 i1 ( x )dx C1 di dv R1C1 1 i1 C1 1 (t ) dt dt v1 (t ) R1i1 DIFFERENTIATE replace i1 in terms of v o (i1 R1C1 vo ) R2 dvo dv vo R2C1 1 (t ) dt dt IF R1 COULD BE SET TO ZERO WE WOULD HAVE AN IDEAL DIFFERENTIATOR. IN PRACTICE AN IDEAL DIFFERENTIATOR AMPLIFIES ELECTRIC NOISE AND DOES NOT OPERATE. THE RESISTOR INTRODUCES A FILTERING ACTION. ITS VALUE IS KEPT AS SMALL AS POSSIBLE TO APPROXIMATE A DIFFERENTIATOR ABOUT ELECTRIC NOISE ALL ELECTRICAL SIGNALS ARE CORRUPTED BY EXTERNAL, UNCONTROLLABLE AND OFTEN UNMEASURABLE, SIGNALS. THESE UNDESIRED SIGNALS ARE REFERRED TO AS NOISE SIMPLE MODEL FOR A NOISY 60Hz SINUSOID CORRUPTED WITH ONE MICROVOLT OF 1GHz INTERFERENCE. 6 y (t ) sin(120 t ) 10 sin( 2 10 t ) signal 9 noise amplitude 106 signal amplitude noise THE DERIVATIVE noise amplitude 2000 dy 9 16.67 (t ) 120 cos(120 ) 2000 cos(2 10 t ) signal amplitude 120 dt signal noise LEARNING EXTENSION INPUT TO IDEAL DIFFERENTIATOR WITH R2 1k, C1 2 F m 10 V 5 103 s IDEAL DIFFERENTIATOR dv vo R2C1 1 (t ) dt DIMENSIONAL ANALYSIS V V V s A Q Q s Q F F s V R2C1 1103 2 106 F 2 103 s INPUT TO AN INTEGRATOR WITH R1 5k, C2 0.2 F CAPACITOR IS INITIALLY DISCHARGED INTEGRATOR LEARNING EXTENSION R1C2 103 s 1 t vo (t ) vo (0) vi ( x )dx R1C 2 0 DIMENSIONAL ANALYSIS V V V s A Q Q s Q F F s V t 3 3 0 t 0.1s :v1 (t ) 20 103 yo (t ) v1 ( x )dx 20 10 t V s y(0.1) 2 10 V s 0 t 0.1 t 0.2 s : v1 (t ) 20 103 y (t ) y (0.1) v ( x )dx 2 103 20 103 (t 0.1)V s o o 1 0.1 vo ( t ) 1 yo (t ) R1C 2 APPLICATION EXAMPLE CROSS-TALK IN INTEGRATED CIRCUITS Simplified Model REDUCE CROSSTALK BY • Reducing C12 • Increasing C2 COST? EXTRA SPACE BY GROUND WIRE USING GROUND WIRE TO REDUCE CROSSTALK SMALLER LEARNING EXAMPLE SIMPLE CIRCUIT MODEL FOR DYNAMIC RANDOM ACCESS MEMORY CELL (DRAM) REPRESENTS CHARGE LEAKAGE FROM CELL CAPACITOR NOTICE THE VALUES OF THE CAPACITANCES Vcell 1.5V FOR CORRECT STORAGE OF A LOGIC ONE 1t vC vC (0) iC ( x )dx C0 I leak I t 1.5 leak t 1.5V Ccell Ccell 1.5(V ) 50 1015 ( F ) 3 tH 1 . 5 10 s 12 50 10 A THE CELL MUST BE “REFRESHED ” AT A FREQUENCY HIGHER THAN 1 / t H Vcell 3 CELL AT THE BEGINNING OF A MEMORY READ OPERATION SWITCHED CAPACITOR CIRCUIT THE ANALYSIS OF THE READ OPERATION GIVES FURTHER INSIGHT ON THE REQUIREMENTS CELL READ OPERATION IF SWITCH IS CLOSED BOTH CAPACITORS MUST HAVE THE SAME VOLTAGE ASSUMING NO LOSS OF CHARGE THEN THE CHARGE BEFORE CLOSING MUST BE EQUAL TO CHARGE AFTER CLOSING Qbefore 1.5V 450 1015 F 3V 50 1015 F Qafter Vafter (500 1015 F ) Vafter 1.65V Even at full charge the voltage variation is small. SENSOR amplifiers are required After a READ operation the cell must be refreshed LEARNING EXAMPLE FLIP CHIP MOUNTING IC WITH WIREBONDS TO THE OUTSIDE GOAL: REDUCE INDUCTANCE IN THE WIRING AND REDUCE THE “GROUND BOUNCE” EFFECT A SIMPLE MODEL CAN BE USED TO DESCRIBE GROUND BOUNCE MODELING THE GROUND BOUNCE EFFECT VGB (t ) Lball Lball 0.1nH diG (t ) dt 40 103 A m 40 109 s IF ALL GATES IN A CHIP ARE CONNECTED TO A SINGLE GROUND THE CURRENT CAN BE QUITE HIGH AND THE BOUNCE MAY BECOME UNACCEPTABLE USE SEVERAL GROUND CONNECTIONS (BALLS) AND ALLOCATE A FRACTION OF THE GATES TO EACH BALL LEARNING BY DESIGN POWER OUTAGE “RIDE THROUGH” CIRCUIT CAPACITOR MUST MAINTAIN AT LEAST 2.4V FOR AT LEAST 1SEC. v DESIGN EQUATION http://www.wiley.com/college/irwin/0470128690/animations/swf/6-21.swf DESIGN EXAMPLE DESIGN AN OP-AMP CIRCUIT TO REALIZE THE EQUATION vO 50 v1 ( )d 2v2 t Proposed solution Needs integrator And adder adder integrator Design equations Two equations in five unknowns!! Not too large. Not too small Seems a reasonable value R3 10k R2 20k ANALYSIS OF THE SOLUTION If supply voltages are 10V (or less) all currents will be less than 1mA, which seems reasonable