CMPUT329 - Fall 2003 Computer Organization and Architecture II José Nelson Amaral CMPUT 329 - Computer Organization and Architecture II 1 Problem 1 We know that all the functions of a digital computer are implemented from three basic logic operations: AND, OR, and NOT. The following is a legal add instruction in the MIPS R2000 microprocessor: add $s1, $s2, $s3 How is the addition of two integers constructed from these three basic operations? CMPUT 329 - Computer Organization and Architecture II 2 Problem 2 Given a hardware prototyping board equiped with an FPGA, SRAM, Microcontroller, Parallel Port, etc, how would you implement the following systems: • A House Alarm System • An Encrypted Communication System • A Scrolling Display • A Multi-Mode Calculator • A Music Recorder/Player CMPUT 329 - Computer Organization and Architecture II 3 Course Outline Boolean Algebra Algebraic Simplification Karnaugh Maps Quine-McCluskey Multiplexes, Decoders, ROMs, PLAs Combinatorial Circuits Flip-Flops Sequential Circuits Clocked Seq. Circuits Finite State Machines State Assign. Problem Program. Logic Devices Hazards CMPUT 329 - Computer Organization and Architecture II 4 2000 1998 1990 1994 1988 1980 Xilinx University Program http://xup.msu.edu CMPUT 329 - Computer Organization and Architecture II 6 Some interesting, and important questions What are we doing here? What do we expect? What do we know? Why should a Computer Scientist learn Logic Design? CMPUT 329 - Computer Organization and Architecture II 7 Admin. Information Instructor: Office: Phone: email: Office Hours: Prof. José Nelson Amaral ATH 3-42 492-5411 amaral@cs.ualberta.ca 10:00-11:00 am (Wed.) 2:00-3:00 pm TA: email: A.K.M. Ashikur Rahman (Ashique) ashikur@grad.cs.ualberta.ca Office Hours: Lab: TBA Comp. Sci Center 105 http://www.cs.ualberta.ca/~amaral/courses/329 CMPUT 329 - Computer Organization and Architecture II 8 Important Dates September 17 (Tuesday) : first lab class October 23 (Wednesday) : mid-term exam December 04 (Wednesday) : last day of classes December 13, 9 AM (Friday) : final exam Course work will carry the following weights towards your final grade: Lab. Assignments: Midterm Exam: Homeworks: Final Exam: 20% 25% 20% 35% CMPUT 329 - Computer Organization and Architecture II 9 CS329 Honor Code By turning the solution of the homework for grading, I certify that I have worked all the solutions on my own, that I have not copied or transcribed solutions from a classmate, someone outside the class, or from any other source. I also certify that I have not facilitated or allowed any of my classmates to copy my own solutions. I am aware that students are encouraged to discuss the material covered in the class and to work examples together. However, the joint solution of problems assigned as individual homework exercises is not allowed. I am aware that the violation of this honor code constitutes a breach of the trust granted me by the teaching staff, compromises my reputation, and subjects me to the penalties prescribed in Section 26.1 of the University of Alberta 2002/2003 Calendar. CMPUT 329 - Computer Organization and Architecture II 10 Some Sad Statistics in Computing Science 21 cases of plagiarism in the 2000/2001 Academic Year: # of Students 3 1 5 1 Length of Suspension 1 year 2 years 4 months 8 months CMPUT 329 - Computer Organization and Architecture II 11 Late Submission Policy There will be a penalty of 10% of the grade per consecutive day of delay. This penalty is applied across the board and independent of justification. Deferred exams will be scheduled for early January, and will be different from the final given on the scheduled date. CMPUT 329 - Computer Organization and Architecture II 12 Initial Quizes September 09 (Monday): Chapter 1 September 13 (Friday): Chapter 2 September 20 (Friday): Chapter 3 Emphasys on sections • • • • • • • 3.1, 3.2, 3.3.1, 3.3.2, 3.3.3, 3.4.1, 3.6.1, 3.6.2, 3.7.2, 3.7.3, 3.9.1, 3.9.3 CMPUT 329 - Computer Organization and Architecture II 13 Bibliography Texbook: Wakerly, John F., Digital Design: Principles and Practices, Prentice Hall, Upper Saddle River, NJ, ISBN 0-13-089896-1. VHDL Book (References): Yalamanchili, Introductory VHDL: From Simulation to Synthesis, 2001, Prentice Hall, Upper Saddle River, NJ, ISBN 0-13-080982-9. Ashenden, Peter J., The Designer’s Guide to VHDL, Morgan Kaufmann Pub., San Francisco, CA, ISBN 1-55860-674-2 CMPUT 329 - Computer Organization and Architecture II 14 Mailing List Important announcements will be made through the class mailing list (some only in the list). To subscribe send an email to Majordomo@cs.ualberta.ca with no subject and the following line subscribe cmput329 CMPUT 329 - Computer Organization and Architecture II 15