Inputs
Combinational
Circuit
Outputs
Next
State
Storage
Elements
Present
State





A combinational circuit and storage elements are
interconnected to form sequential circuit.
Storage elements are capable of storing binary
information.
It defines the state.
Inputs together with the present state of storage
elements determine the output.
Determine values used to determine the next state
of storage elements.


Outputs in a sequential circuit are a function not
only of inputs.
Present state of stored elements.

Next state of storage elements is also a function
of inputs and present state of stored elements.

Thus, a sequential circuit is specified by a time
sequence of inputs, internal states and outputs

Synchronous
 Synchronous sequential circuits can be defined
from the knowledge of its signals at discrete
instants of time.

Asynchronous
 Asynchronous sequential circuits depends upon
the inputs at any instant of time and the order in
continuous time in which the inputs change.




Employs signals that effect storage elements
only at discrete instants of time.
Synchronization is achieved by a timing
device called a clock generator.
Clock generator produces a periodic train of
clock pulses.
Synchronous sequential circuits use clock
pulses as inputs to storage elements are
called clocked sequential circuits.



Storage can be constructed from logic with
delay connected in a closed loop.
A property - there must be no inversion.
A buffer is usually implemented using two
inverters.
Inputs
Outputs
Combinational
Circuit
Flip-Flops
Clock
pulses


A storage element can maintain a binary
state indefinitely, until directed by an input
signal to switch states.
Difference between latches and flip-flops
 No of inputs they possess
 Manner which the inputs affect the binary state

Most basic storage elements are latches

Two cross-coupled NOR gates.
Derived from

Replacing inverters with NOR gates.


Two inputs
 S - set
 R – Reset

When
 Q = 1 and Q’ = 0
 Q = 0 and Q’ = 1
Set State
Reset State
Outputs Q and Q’ are normally the
complements of each other
S
R
Q
Q’
1
0
1
0
0
0
1
0
0
1
0
1
0
0
0
1
1
1
0
0

Two cross-coupled NAND gates.
S
R
Q
Q’
0
1
1
0
1
1
1
0
1
0
0
1
1
1
0
1
0
0
1
1
C
S
R
Next State of Q
0
X
X
No change
1
0
0
No change
1
0
1
Q = 0 ; Reset Time
1
1
0
Q = 1 ; Set State
1
1
1
Undefined
Eliminate undesirable undefined state in SR
latch is to ensure that inputs S and R are
never equal to 1 at the same time.
C
D
Next State of Q
0
x
No change
1
0
Q = 0 ; Reset State
1
1
Q = 1 ; Set State



The simplest form of sequential circuit.
Variety of flip flops, all of which share two
properties.
One is ….
 A bistable device.
 Exists in one of two states
 In the absence of input, remains in the state.
 Thus, can function as a 1 – bit memory.

2nd one
 Has two outputs.
 Which are always complements of each other.
 Generally labeled Q and Q’.

Latches are asynchronous, which means that the
output changes very soon after the input changes.

Most computers today are synchronous, which
means that the outputs of all the sequential circuits change
simultaneously to the rhythm of a global clock signal.

A flip-flop is a synchronous version of the
latch.

There are several fundamental types of flipflops.

In addition there are minor variations
depending on the number of inputs and how
they control the state of the flip-flop.

Very simple type of flip-flop called a D-flipflop.

A master-slave D-flip-flop is built from two
SR-latches and some gates