VLSI Layout using Microwind
Kishore C Acharya
Getting Microwind
• Go to the website
http://www.microwind.org
• Download the freeware version of the microwind
in a Folder called microwind_source
• Unzip the files in a Folder called
microwind_layout
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Setting Up Technology File
• Launch the program microwind2.exe from
the folder microwind2-7 within
microwind_layout folder
• From File Menu-> Select Foundry
Browse to Folder Micrrowind2-7 and open
the file cmos06.rul On the Layout window
at the Top left there is a ruler. The ruler
should say 5 lambda and 1.5 micron
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Creating your own rule file
• If the appropriate rule file is not available,
you can create your own rule file:
– Using notepad open the file default.rul in
microwind2-7 folder
– Edit appropriate parameters
– Save as a new file
Note: Oxide thickness is defined in l3tox within
spice parameters
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Suggested Directory Tree
Main Directory C or D
Microwind_source
Contains microwind2,zip
Microwind_layout
Microwind2-7
Contains all microwind files
Automatically built during Unzip
ee393_layout
Contains all layout files
And special .rul files
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Opening and Saving Layout Files
• Open: From File menu Select Open and
Browse to the folder ee393_layout and open
the appropriate .msk file
• Save: From File Menu select Menu item
Save as and save layout file in ee393_layout
directory
You must setup Technology Right after
Launch before any work
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Working with Layout Notes
• To draw a transistor click on the transistor
symbol in the Palette window.
Select transistor type (PMOS or NMOS)
Select the units in lambda and specify width in terms
of lambda
• Delete: select the Gun icon and either click
on each color section or draw a border
around the device
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To Do Layout
• Select the appropriate trace e.g. poly,
metal1, contact etc.
– Draw a rectangle by dragging the mouse and
the appropriate trace will be drawn as you
release the mouse button
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Design rule checker
• During layout process check if the component
placements such as NMOS, PMOS transistors are
correct.
– From the Analysis menu select the menu item Design
Rule Checker
– If the placements are correct Checker will report No
error
– If there are errors, checker will display them on the
components in the placement window
– Clicking the mouse in the placement window will
remove the error display
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Well Contacts
• From Palette menu select contact (three bars
next to transistor symbol)
– Select N+ to Metal contact
– Place the contact on a Metal line over the N
well (if needed extend the N well over the Vdd
bus
– Run design rule checker
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Substrate Contacts
• From Palette menu select contact (three bars
next to transistor symbol)
– Select P+ to Metal contact
– Place the contact on a Metal line (ground bus)
next to the NMOS transistor
– Run design rule checker
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Metal to Metal Contacts
• From Palette menu select contact (three bars
next to transistor symbol)
– Set Poly to Diff Contact selection to none
– Check () appropriate metal to metal contact
(e.g. Metal 1 to Metal 2)
– Place the contact on the intersection of the two
Metal lines
– Run design rule checker
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Working with Layout Notes
Continued
• Rotate & Flip: From Edit Menu select
menu item Flip or Rotate -> Flip or
Rotation angle
– Draw a box around the object
• Move: From Edit Menu select menu item
Move or Stretch
– Draw a box around the object and move the object by
dragging the mouse
– click on an edge of the object and stretch it by dragging
the mouse
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Working with Layout Notes
Continued
• Pan: From the tool bar use left, right top
and bottom arrows for panning alternatively
use the arrow keys from the keyboard
• Move stepwise: From Edit Menu select
menu item Move Step By Step
– Draw a box around the object and move the
object by clicking on the arrows that appears on
the screen
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Working with Layout Notes
Continued
• Delete: From the menu bar select the gun
symbol (Delete Some Layout)
– Method 1:Draw a box around the object to be
deleted using the mouse and let go the mouse
button
– Method 2:Place the mouse pointer on the
object to be deleted and click the right button
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Working with Layout Notes
Continued
• Zoom in: From the tool bar use Zoom in
icon and then click on the Layout Window
• Zoom out: From the tool bar use Zoom out
icon and then click on the Layout Window
• On the tool bar click on the draw box icon
to stop Zoom operation
• To Print: From the File Menu select Menu
item Print Layout
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Obtaining parasitic values
• Put the mouse on a section of the Layout (e.g.
Metal lines, Gate connections etc) and click the
right button of the mouse.
• From the displayed menu at the mouse point select
the menu item Node Properties
• A new window called Navigator will be displayed
– Read the parasitic values displayed in the navigator
Window
– If the parasitic values are not displayed click on Props
Tab of the Navigator window
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Some drawing & design rule help
• Make width of all metal lines 4l
• Make spacing between two adjacent metal lines 6l
• When making contact between metal and
polysilicon, build a 4l by 4l pad with polysilicon
for connection
• For layouts needing many connections use Metal 1
for Horizontal lines and Metal 2 for vertical lines
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Changing Layout display
• To BW Layout
– From File Menu Select menu item Colors
– From Colors submenu click on Monochrome
– From Colors Submenu White or Black back ground can
be selected by clicking on White background
• To Color Layout
– From File Menu Select menu item Colors
– From the Colors submenu click on Color
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Naming Nodes and Assigning Parameters
• Select a node by double clicking on it
• Right click and select Text Properties
• Type name of the (e.g. In, Vdd, Out etc.) node in
the Label name box
• Select node type by clicking on the button
– Enter appropriate parameters
– For observation in simulation click “not in simulation”
• Observable variable are shown in italics
• Click on Assign button
• Click on Move icon and move name into the node
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by clicking on it
Assigning Virtual Components
• From the Edit menu select menu item
Virtual RLC
• Click on the R or L or C
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Creating SPICE Netlist
• From File menu select menu item Convert
Info
• Select SPICE netlist
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About SPICE in Microwind
• SPICE Model files are located in rule file
• Supported Simulation Type
– Frequency Sweep Analysis (Frequency vs.
time)
– DC Analysis (Static Voltage vs. Voltage
– Transient Analysis (Voltage vs. time &
Voltage,Current vs. time)
• Model Selection (Level 1, Level 3& BSIM)
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Running Simulation
• If default Vdd is not correct Set default voltage to
desired voltage in rule file
– To find the variable in rule file search for “vdd”
– Set Vdd = 5.0 for I/O & Vddh = 5.0 or 3.3 for core
logic
• Select Run Simulation from Simulate menu
• Select Simulation type from sub menu
• Setup simulation parameter in simulation dialog
box that appears
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Model & Parameter Selection
• Default model is level 3
• To use different model from simulate menu
select using model then model type (Level 1
or BSIM) from submenu
• Simulation parameters (Model, voltage
range, temperature etc.)can be setup by
Selecting Simulation parameter menu item
from Simulation Menu
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Simulation Parameter Setup
• For Transient Analysis (Voltage vs. time or
Voltage, Current vs. time)
– Set to desired duration by clicking into the “Time
Scale” dialog item (center right)
• For DC Analysis (Static Voltage vs. Voltage
– Set to desired voltage range by clicking into the “X
Scale” dialog item (center right)
• Simulation could be repeated by clicking into
“Reset” or “more” button
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Getting Microwind2
• Go to the website
http://www.microwind.org
• Click on the Hyperlink (Location: Top right)
New: A book on CMOS design by J. Uyemura based on
Microwind
• Click on the hyperlink (Location: Below the description of the
book)
Microwind 2.7 (lite version)
• Download the file in a Folder called microwind_source
• Unzip the files in a Folder called microwind_layout
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