FPGAs AND EMBEDDED
SYSTEMS
Asma Fathima Khizer
University Of North Carolina Charlotte
Overview
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Introduction
Technical overview
Configuration
Embedded System design in FPGA
Processors
Applications
What are FPGAs?
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A Field Programmable Gate Array or FPGA is a
semiconductor device containing programmable
logic components and programmable interconnects.
FPGAs are programmable digital logic chips. It
means that we can program them to do almost any
digital function.
In most FPGAs, these programmable logic
components (or logic blocks) also include memory
elements, which may be simple flip-flops or more
complete blocks of memories.
Architecture
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Basic architecture consists of an array of configurable logic blocks
(CLBs) and routing channels.
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A logic-cell (CLB) is composed of a small lookup table, some gates and
a D-flip-flop. Each logic-cell then can be connected to other logic-cells
through interconnect resources.
Fig: Logic-cell (CLB)
Architecture Contd.,
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Each wiring segment spans only one logic block before it terminates in a
switch box.
Whenever a vertical and a horizontal channel intersect there is a switch
box.
When a wire enters a switch box, there are three programmable switches
that allow it to connect to three other wires in adjacent channel segments.
Fig: Switch box topology
Architecture Contd.,
FPGA Pins
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FPGA pins fall into 2 categories:
Dedicated pins
 User pins
About 20% to 30% of the pins of an FPGA are
"dedicated pins", which means that they are hardcoded to a specific function.
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FPGA Pins Contd.,
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Dedicated Pins are again classified into 3 categories:
 Power pins. Might be ground pins (GND) or power pins
(core or IO).
 Configuration pins. These pins are used to "download"
the FPGA.
 Dedicated inputs, or clock pins. These pins are able to
drive large and wide nets inside the FPGA, suitable for
clocks or signals with large fan-outs.
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The rest are user pins.
Clocks and Global lines
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An FPGA design is usually "synchronous". Its means
that the design is clock based - each clock allows the
D-flip flops to take a new state.
Global routing or Global lines, these allow distributing
the clock signal all over the FPGA with a low skew
(i.e. the clock signal appears almost simultaneously to
all the flipflops).
To feed a clock to FPGA, a dedicated input pin is used
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An FPGA can use multiple clocks
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Pin Assignments
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Xilinx (uses .ucf files)
NET "data" LOC = "P17";
NET "clock" LOC = "P91";
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Altera (uses .qsf files)
set_location_assignment PIN_10 -to clk
set_location_assignment PIN_26 -to LED
FPGA Configuration
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An FPGA can be into 2 states:
 Configuration mode
 User mode
FPGA Configuration
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Configuring an FPGA means downloading a stream of 0's and 1's
into it through some special pins. Once the FPGA is configured, it
goes into "user-mode" and becomes active, performing
accordingly to your programmed logic function
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There are 3 ways to configure FPGA:
 Use a cable from a PC to the FPGA, and run a software on the
PC to send data through the cable.
 Use a microcontroller on the board, with an adequate firmware
to send data to the FPGA.
 Use a "boot-PROM" on the board, connected to the FPGA,
that configures the FPGA automatically at power-up.
FPGA Programming
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The behavior of the FPGA (logic function) can be defined by
either a hardware description language (HDL) or a schematic
design.
Compile the logic function on the PC using the software provided
by the FPGA vendor. A binary file is created.
Connect a cable from the PC to the FPGA and download the
binary file.
FPGAs loose their functionality when the power goes away (like
RAM in a computer that looses its content). We have to redownload them when power goes back up to restore the
functionality.
A simple program for D- Flip Flop
library IEEE;
use IEEE.std_logic_1164.all;
entity DFlipFlop is
port (
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
D : in STD_LOGIC;
Q : out STD_LOGIC
);
end DFlipFlop;
architecture behaviour of DFlipFlop is
begin
process(CLK)
begin
if rising_edge(CLK) then
if RST = '1' then
Q <= '0';
else
Q <= D;
end if;
end if;
end process;
end behaviour;
Ref [6]
FPGA vs. Microcontrollers
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Microcontrollers are based on a CPU architecture. As
all CPUs, they execute instructions in a sequential
manner.
FPGAs are programmable logic and run in a parallel
fashion.
FPGA Manufacturers
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Xilinx has traditionally been the FPGA leader.
Altera is the second FPGA heavyweight.
Lattice Semiconductor focuses on low-cost, feature-optimized FPGAs
and non-volatile, flash-based FPGAs.
Actel has antifuse and reprogrammable flash-based FPGAs.
QuickLogic has antifuse (programmable-only-once) products.
Cypress Semiconductor
Atmel is the only manufacturer whose devices are fine-grain
reconfigurable (the Xilinx XC62xx were, but they are no longer in
production). They focus on providing AVR Microcontrollers with
FPGA fabric on the same die. These factors aside, their devices tend
to be smaller and more expensive than other manufacturers'.
Achronix Semiconductor has very fast FPGAs in development. They
plan to ship in early 2007 and claim they can reach speeds of over
1GHZ.
Embedded System Design in an FPGA
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A typical digital system design involves a significant amount of
custom logic circuitry, but also includes pre-designed major
components, such as processors, memory units and various types
of input/output (I/O) interfaces.
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In the traditional approach for designing such systems, a new
integrated circuit (IC) chip is created for the custom logic circuits,
but each pre-designed component is included as a separate chip
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Different approach for realizing digital systems, called embedded
system design. It leverages the advanced capabilities of today's IC
technology by implementing many of the components of the
system within a single chip, such as a field programmable gate
array (FPGA).
Technical reasons to use FPGAs in System
Design
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Offer large logic capacity, exceeding several million equivalent
logic gates, and include dedicated memory resources
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Include special hardware circuitry that is often needed in
digital systems, such as digital signal processing (DSP) blocks
(with multiply and accumulate functionality) and phase-locked
loops (PLLs) (or delay-locked loops (DLLs)) that support
complex clocking schemes
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Support a wide range of interconnection standards, such as
double data rate (DDR SRAM) memory, PCI and high-speed
serial protocols.
Processors
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Two types of processors are available to use in FPGA
 Hard Processors
 Soft Processors
Hard Processor:
 A pre-designed circuit that is fabricated within the
FPGA chip
Soft Processor:
 The processor exists as code written in a hardware
description language (HDL)
Advantages of Soft Processors
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More flexible compared to hard processor.
Resources are consumed for processor only
when they are actually needed in the system.
Multiple soft processors can be included in
the FPGA when desired.
Embedded system design software tools
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Two main aspects to the software tools
 The creation of the system hardware
 The development of software that runs on the processors
included in the system.
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For creating the hardware circuitry, the tools allow the user to
build a system by making use of pre-designed building blocks for
processors, memory controllers, digital signal processing circuits
and various communication modules (such as UARTs).
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The software allows easy instantiation of these sub-circuits and
can automatically interconnect them on the FPGA chip.
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The Electronic Design Automation tools generate memory maps
for the system, allowing the processor(s) to access the system’s
hardware resources.
Embedded Software Design Flow for the
Nios II Processor
Ref [3]
Applications
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Applications of FPGAs include DSP, software-defined radio,
aerospace and defense systems, ASIC prototyping, medical
imaging, computer vision, speech recognition, cryptography,
bioinformatics, computer hardware emulation and a growing
range of other areas. They now find applications in any area or
algorithm that can make use of the massive parallelism offered by
their architecture.
Reconfigurable computing is computer processing with highly
flexible computing fabrics. The principal difference when
compared to using ordinary microprocessors is the ability to make
substantial changes to the data path itself in addition to the control
flow.
References
1.
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5.
6.
http://en.wikipedia.org/wiki/FPGA
http://en.wikipedia.org/wiki/Embedded_System_Desi
gn_in_an_FPGA
http://www.fpga4fun.com/WhatAreFPGAs.html
http://en.wikipedia.org/wiki/Reconfigurable_computin
g
http://www.qa-talk.com/news/alt/alt100.html
http://en.wikipedia.org/wiki/Vhdl
THANK YOU