Lecture 12
PicoBlaze Overview
ECE 448 – FPGA and ASIC Design with VHDL
Required reading
• P. Chu, FPGA Prototyping by VHDL Examples
Chapter 14, PicoBlaze Overview
Recommended reading
PicoBlaze 8-bit Embedded Microcontroller User Guide
for Spartan-3, Virtex-II, and Virtex-II Pro FPGAs
ECE 448 – FPGA and ASIC Design with VHDL
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Block diagram of a Single-Purpose Processor
(FSMD – Finite State Machine with Datapath)
ctrl
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Block diagram of a General-Purpose Processor
(Microcontroller)
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PicoBlaze
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PicoBlaze Overview
Register File of PicoBlaze
8-bit
Address
0
1
2
3
4
5
6
7
F
7
7
7
7
7
7
7
7
7
s0
s1
s2
s3
s4
s5
s6
s7
sf
0
0
0
0
0
0
0
0
0
16 Registers
Definition of Flags
Flags are set or reset after ALU operations
Zero flag - Z
Z=1
0
zero condition
if result = 0
otherwise
Carry flag - C
overflow, underflow, or various conditions
Example*
C=1
if
result > 28-1 or
result < 0
0
otherwise
*Applies only to addition or subtraction related instructions,
refer to following slides otherwise
Interface of PicoBlaze
KCPSM = constant (K) coded programmable state machine
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Interface of PicoBlaze
Name
Direction
Size
Function
clk
input
1 System clock signal.
reset
input
1 Reset signal.
address
output
10 Address of the instruction memory.
Specifies address of the instruction to be
retrieved.
instruction
input
18 Fetched instruction.
port_id
output
8 Address of the input or output port.
in_port
input
8 Input data from I/O peripherals.
read_strobe
output
1 Strobe associated with the input
operation.
out_port
output
8 Output data to I/O peripherals.
write_strobe
output
1 Strobe associated with the output
operation.
interrupt
input
1 Interrupt request from I/O peripherals.
interrupt_ack
output
1 Interrupt acknowledgment to I/O
peripherals
ECE 448 – FPGA and ASIC Design with VHDL
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Development
Flow of a
System
with PicoBlaze
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PicoBlaze Programming Model
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Syntax and Terminology
Syntax
Example
Definition
sX
s7
Value at register 7
KK
ab
Value ab (in hex)
PORT(KK)
PORT(2)
PORT((sX))
PORT((sa))
RAM(KK)
RAM(4)
Input value from port 2
Input value from port specified by register a
Value from RAM location 4
Addressing modes
Immediate mode
ADDCY s2, 08
s2 + 08 + C  s2
SUB
s7 – 7
s7, 7
 s7
Direct mode
INPUT s5, 2a
ADD
sa, sf
PORT(2a)  s5
sa + sf  sa
Indirect mode
INPUT s9, (s2)
PORT((s2))  s9
STORE s3, (sa)
s3  RAM((sa))
PicoBlaze ALU Instruction Set Summary (1)
PicoBlaze ALU Instruction Set Summary (2)
PicoBlaze ALU Instruction Set Summary (3)
Logic instructions
1.
AND
AND sX, sY
sX and sY => sX
AND sX, KK
sX and KK => sX
2. OR
OR sX, sY
sX or sY => sX
OR sX, KK
sX or KK => sX
3. XOR
XOR sX, sY
sX xor sY => sX
XOR sX, KK
sX xor KK => sX
CZ
IMM, DIR
0
IMM, DIR
0
IMM, DIR
0
Arithmetic Instructions (1)
CZ
Addition
IMM, DIR
ADD sX, sY
sX + sY => sX
ADD sX, KK
sX + KK => sX
ADDCY sX, sY
sX + sY + CARRY => sX
ADDCY sX, KK
sX + KK + CARRY => sX
Arithmetic Instructions (2)
CZ
Subtraction
SUB sX, sY
sX – sY => sX
SUB sX, KK
sX – KK => sX
SUBCY sX, sY
sX – sY – CARRY => sX
SUBCY sX, KK
sX – KK – CARRY => sX
IMM, DIR
Test and Compare Instructions
CZ
TEST
IMM, DIR
TEST sX, sY
C = odd parity of
sX and sY => none
TEST sX, KK
the result
sX and KK => none
COMPARE
COMPARE sX, sY
sX – sY => none
COMPARE sX, KK
sX – KK => none
IMM, DIR
Data Movement Instructions (1)
CZ
LOAD
IMM, DIR
LOAD sX, sY
sY => sX
LOAD sX, KK
KK => sX
--
Data Movement Instructions (2)
CZ
DIR, IND
STORE
--
STORE sX, KK
sX => RAM(KK)
STORE sX, (sY)
sX => RAM((sY))
DIR, IND
FETCH
FETCH sX, KK
RAM(KK) => sX
FETCH sX, (sY)
RAM((sY)) => sX
--
Example 1: Clear Data RAM
;=========================================================
; routine: clr_data_mem
;
function: clear data ram
;
temp register: data, s2
;=========================================================
clr_data_mem:
load s2, 40
;unitize loop index to 64
load s0, 00
clr_mem_loop:
store s0, (s2)
sub s2, 01
;dec loop index
jump nz, clr_mem_loop
;repeat until s2=0
return
Data Movement Instructions (3)
CZ
INPUT
DIR, IND
--
DIR, IND
--
INPUT sX, KK
sX <= PORT(KK)
INPUT sX, (sY)
sX <= PORT((sY))
OUTPUT
OUTPUT sX, KK
PORT(KK) <= sX
OUTPUT sX, (sY)
PORT((sY)) <= sX
Edit instructions - Shifts
*All shift instructions affect Zero and Carry flags
Edit instructions - Rotations
*All rotate instructions affect Zero and Carry flags
Program Flow Control Instructions (1)
JUMP AAA
PC <= AAA
JUMP C, AAA
if C=1 then PC <= AAA else PC <= PC + 1
JUMP NC, AAA
if C=0 then PC <= AAA else PC <= PC + 1
JUMP Z, AAA
if Z=1 then PC <= AAA else PC <= PC + 1
JUMP NZ, AAA
if Z=0 then PC <= AAA else PC <= PC + 1
Program Flow Control Instructions (2)
CALL AAA
TOS <= TOS+1; STACK[TOS] <= PC; PC <= AAA
CALL C | Z , AAA
if C | Z =1 then
TOS <= TOS+1; STACK[TOS] <= PC; PC <= AAA
else
PC <= PC + 1
CALL NC | NZ , AAA
if C | Z =0 then
TOS <= TOS+1; STACK[TOS] <= PC; PC <= AAA
else
PC <= PC + 1
Program Flow Control Instructions (3)
RETURN
PC <= STACK[TOS] + 1; TOS <= TOS - 1
RETURN C | Z
if C | Z =1 then
PC <= STACK[TOS] + 1; TOS <= TOS - 1
else
PC <= PC + 1
RETURN NC | NZ
if C | Z =0 then
PC <= STACK[TOS] + 1; TOS <= TOS - 1
else
PC <= PC + 1
Subroutine Call
Flow
Interrupt Related Instructions
RETURNI ENABLE
PC <= STACK[TOS] ; TOS <= TOS – 1;
I <= 1; C<= PRESERVED C; Z<= PRESERVED Z
RETURNI DISABLE
PC <= STACK[TOS] ; TOS <= TOS – 1;
I <= 0; C<= PRESERVED C; Z<= PRESERVED Z
ENABLE INTERRUPT
I <=1;
DISABLE INTERRUPT
I <=0;
Interrupt
Flow
ECE 448 – FPGA and ASIC Design with VHDL
PicoBlaze Development Environments
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KCPSM3 Assembler Files
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Directives of Assembly Language
Equating symbolic name
for an I/O port ID.
N/A
keyboard DSIN $0E
switch DSIN $0F
LED DSOUT $15
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Differences between Mnemonics of Instructions
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Differences between Mnemonics of Instructions
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Differences between Programs
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Example of
a function in the PicoBlaze
assembly language
ECE 448 – FPGA and ASIC Design with VHDL
Notation
a
Multiplicand
ak-1ak-2 . . . a1 a0
x
Multiplier
xk-1xk-2 . . . x1 x0
p
Product (a  x)
p2k-1p2k-2 . . . p2 p1 p0
Multiplication of two 4-bit unsigned
binary numbers
Partial Product 0
Partial Product 1
Partial Product 2
Partial Product 3
Unsigned Multiplication – Basic Equations
k-1
x =  x i  2i
p=ax
i=0
k-1
p = a  x =  a  x i  2i =
i=0
= x0a20 + x1a21 + x2a22 + … + xk-1a2k-1
Iterative Algorithm for Unsigned Multiplication
Shift/Add Algorithm
p = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 =
= (...((0 + x0a2k)/2 + x1a2k)/2 + ... + xk-1a2k)/2 =
k times
p(0) = 0
p(j+1) = (p(j) + xj a 2k) / 2
j=0..k-1
p = p(k)
Iterative Algorithm for Unsigned Multiplication
Shift/Add Algorithm
p = a  x = x0a20 + x1a21 + x2a22 + … + x7a27
=
= (...((0 + x0a28)/2 + x1a28)/2 + ... + x7a28)/2 =
8 times
p(0) = 0
p(j+1) = (p(j) + xj a 28) / 2
j=0..7
p = p(k)
Unsigned Multiplication Computations
8 bits
8 bits
pL
pH
xj a
+
pL
>> 1
C
p(j)
+ xj a 28
pH
C
p
pL
pH
pH = s5
pL = s6
a = s3
x = s4
2 p(j+1)
p(j+1)
PicoBlaze Registers
Unsigned Multiplication Subroutine (1)
;=========================================================
; routine: mult_soft
; function: 8-bit unsigned multiplier using
;
shift-and-add algorithm
; input register:
; s3: multiplicand
; s4: multiplier
; output register:
; s5: upper byte of product
; s6: lower byte of product
; temporary register:
; s2: index j
;=========================================================
Unsigned Multiplication Subroutine (2)
mult_soft:
load s5, 00
; clear pH
load s2, 08
; initialize loop index
mult_loop:
sr0 s4
; shift lsb of x to carry
jump nc, shift_prod ; x_j is 0
add s5, s3
; x_j is 1, pH=pH+a
shift_prod:
sra s5
; shift upper byte pH right,
; carry to MSB, LSB to carry
sra s6
; shift lower byte pL right,
; lsb of pH to MSB of pL
sub s2, 01
; dec loop index
jump nz, mult_loop
;repeat until i=0
return
Edit instructions - Shifts
*All shift instructions affect Zero and Carry flags