1 CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen 10/15/2013 DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE UNIVERSITY, WILBERFORCE, OH Review 2 Last Class Binary Integers Representation of MIPS Instructions R-format I-format This Class Conditional Instructions Unsigned, Signed, Signed Extension slt Branch Addressing Next Class Procedure Instructions for Making Decisions 3 High-level programming language C/C++: if … else … (conditional) goto (unconditional) for, while, until (loops) Assembly Languages MIPS: beq (branch if equal) bne (branch if not equal) j (unconditional jump) Conditional Operations 4 Branch to a labeled instruction if a condition is true Otherwise, beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if continue sequentially (rs != rt) branch to instruction labeled L1; j L1 unconditional jump to instruction labeled L1 Compiling If Statements 5 C code: if (i==j) f = g+h; else f = g-h; Compiling If Statements 6 C code: if (i==j) f = g+h; else f = g-h; f ($s0), g ($s1), h($s2), i($s3), j($s4) Compiled MIPS code: bne add j Else: sub Exit: … $s3, $s4, Else $s0, $s1, $s2 Exit $s0, $s1, $s2 Assembler calculates addresses Compiling Loop Statements 7 C code: while (save[i] == k) i = i+1; i in $s3, k in $s5, address of save in $s6 Flowchart? Compiling Loop Statements 8 C code: while (save[i] == k) i = i+1; i in $s3, k in $s5, address of save in $s6 Compiled MIPS code: Loop: sll add lw bne addi j Exit: … $t1, $t1, $t0, $t0, $s3, Loop $s3, 2 $t1, $s6 0($t1) $s5, Exit $s3, 1 Basic Blocks 9 A basic block is a sequence of instructions with No embedded branches (except at end) No branch targets (except at beginning) A compiler identifies basic blocks for optimization An advanced processor can accelerate execution of basic blocks More Conditional Operations 10 Less than Greater than Combination of logical operations More Conditional Operations 11 Set result to 1 if a condition is true Otherwise, slt rd, rs, rt if (rs < rt) rd = 1; else rd = 0; slti rt, rs, constant if set to 0 (rs < constant) rt = 1; else rt = 0; Use in combination with beq, bne slt $t0, $s1, $s2 bne $t0, $zero, L # if ($s1 < $s2) # branch to L Exercise 12 Convert the following C++ statement into MIPS if (i>j and i<k) { a++; } Assume i in $s0, j in $s1, k in $s2, a in $s3 Exercise 13 if (i>j and i<k) { a++; } Assume i in $s0, j in $s1, k in $s2, a in $s3 L: slt $t0, $s1, $s0 slt $t1, $s0, $s2 and $t0, $t0, $t1 beq $t0, $zero, L addi $s3, $s3, 1 … Better Solution 14 if (i>j and i<k) { a++; } Assume i in $s0, j in $s1, k in $s2, a in $s3 L: slt $t0, $s1, $s0 beq $t0, $zero, L slt $t0, $s0, $s2 beq $t0, $zero, L addi $s3, $s3, 1 … Branch Instruction Design 15 Why not blt, bge, etc? Hardware for <, ≥, … slower than =, ≠ Combining with branch involves more work per instruction, requiring a slower clock All instructions penalized! beq and bne are the common case This is a good design compromise Signed vs. Unsigned 16 Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example $s0 = 1111 1111 1111 1111 1111 1111 1111 1111 $s1 = 0000 0000 0000 0000 0000 0000 0000 0001 slt $t0, $s0, $s1 # signed –1 < +1 $t0 = 1 sltu $t0, $s0, $s1 +4,294,967,295 # unsigned > +1 $t0 = 0 Branch Addressing 17 Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward op rs 6 bits or backward rt 5 bits constant or address 5 bits 16 bits PC-relative addressing Target address = PC + offset × 4 PC already incremented by 4 by this time Jump Addressing 18 Jump (j and jal) targets could be anywhere in text segment Encode op address 6 bits full address in instruction 26 bits (Pseudo)Direct jump addressing Target address = PC31…28 : (address × 4) Target Addressing Example 19 Loop code from earlier example Assume Loop: sll Loop at location 80000 $t1, $s3, 2 80000 0 0 19 9 2 0 add $t1, $t1, $s6 80004 0 9 22 9 0 32 lw $t0, 0($t1) 80008 35 9 8 0 bne $t0, $s5, Exit 80012 5 8 21 2 19 19 1 addi $s3, $s3, 1 80016 8 j 80020 2 Exit: … Loop 80024 20000 Branching Far Away 20 If branch target is too far to encode with 16-bit offset, assembler rewrites the code Example L2: beq $s0,$s1, L1 ↓ bne $s0,$s1, L2 j L1 … Addressing Mode Summary 21 Summary 22 Conditional Instructions beq bne j slt, slti sltu, sltui Converting a C Program to MIPS Branch Addressing What I want you to do 23 Review Chapter 2 Prepare for assignment 4