VLSI DESIGN LAB INTRODUCTION
By: Engr.Irshad Rahim Memon
irshad.memon@isra.edu.pk
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OUTLINE
Recommended Literature
 Difference between VLSI & VHDL
 Introduction to FPGA
 Introduction to VHDL

 Design
•
•
•
EDA Tools
VHDL
VHDL Code Structure
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RECOMMENDED BOOK

Circuit Design With VHDL
By: Volnei A. Pedroni
e-copy available on
electronics106.jimdo.com
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DIFFERENCE BETWEEN VLSI AND VHDL
VHDL is a programming language that is used
to test the functionalities or design of a circuit
verilog is also a different language
 VLSI is a technology to miniaturization of chip,
reducing power dissipation and timing delay.
 All these can be tested through software and
FPGA implementation.
 VHDL is one of them so its necessary to go for
VLSI in today's world.

CONTINUED….
VHDL is a part of VLSI and these are
interrelated to each other using VHDL
supporting software you can develop your
hardware
 Its a hardware description language
 so u must prefer for both VHDL and VLSI

WHAT IS HARDWARE DESCRIPTION
LANGUAGE?

A hardware description language or HDL is any
language for description and design of electronic
circuits, and most commonly, digital logic.

It can describe the circuit's operation, its design
and organization, and tests to verify its operation
by means of simulation.
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WHAT IS HARDWARE DESCRIPTION
LANGUAGE?

There are two primary purposes for hardware
description languages

Modeling of Digital Circuits: Having a model of the
circuit allows for simulation and testing of the
design for proper operation.
 Hardware
description languages are used as one
of the first steps in creating large digital integrated
circuits.
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HDLS FOR ANALOG CIRCUIT DESIGN
Abbreviation
Name
Use
AHDL
Analog Hardware Descriptive an open analog hardware
Language
description language
Verilog-AMS
Verilog for
Mixed-Signal
Analog
and an
open
standard
extending Verilog for
analog
and
mixed
analog/digital simulation
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HDLS FOR DIGITAL CIRCUIT DESIGN

The two most widely-used and well-supported HDL varieties used
in industry are Verilog and VHDL.
Abbreviation
ABEL
Name
Use
Advanced Boolean Expression Hardware
description
Language
language for implementing
Boolean expressions
AHDL
Altera HDL
a
proprietary
from Altera
language
Verilog
verification logics
most widely-used and wellsupported HDL
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HDL FOR PRINTED CIRCUIT BOARD (PCB)
DESIGN
Abbreviation
PHDL
Name
PCB HDL
Use
a free and open source HDL
for defining printed circuit
board connectivity
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WHAT IS FPGA?


An FPGA is a device that consists of thousands or even
millions of transistors connected to perform logic
functions. They perform functions from simple addition
and subtraction to complex digital filtering and error
detection and correction. Aircraft, automobiles, radar,
missiles, and computers are just some of the systems
that use FPGAs
Xilinx, Altera, are just a few companies that
manufacture FPGAs. Even though there are several
FPGA manufacturers, they all share the same basic
architecture concept. It consists of three basic
capabilities: input/output (I/O) interfaces, basic building
blocks, and interconnections
NEXYS2 BOARD (XILINX SPARTAN 3E FPGA)
FPGA DESIGN FLOW
Simulation with
ISM simulator
Behavioral
Simulation
Entering
VHDL
code
Design
Synthesis
Design
Implementation
Functional
simulation
Physical
Realization
DESIGN FLOW


Design Entry:
The design entry is the process of entering Digital logic expression
or the Behavioral expression of desired statement or desired process. With the
advance in technologies so many newer methods of designing entry are used for
simplicity and faster designing. Xilinx ISE supports many different varieties of
design entry, of which some are listed as:
 State machines
 Flow charts
 Block diagram/ interface based design (IBD)
 Hardware description languages (HDL) etc.
Simulation:
Simulation is the process of testing the logical or processing
functionality of designed logic. Several kinds of Software and hardware Tools
to provide this functionality. With Xilinx ISim Simulator you can simulate your
design by writing “Test benches” and/or by assigning Manual wave flows to
inputs and check functionality of outputs after simulation.
CONTINUED….


Synthesize:
Synthesis is a process by which an abstract form of desired
circuit behavior (typically register transfer level (RTL)) is turned into a
design implementation in terms of logic gates. Synthesis is one aspect of
electronic design automation.
With Xilinx ISE Design Suite user can convert the HDL
(hardware description language) or other kinds of designs created with
Design entry tool into the Gate level design for any FPGA family.
Physical Realization
To physically implement the design in a CPLD or FPGA
chip, a development kit is necessary. The development kit must be
connected to a PC running ISE in order for the chip to be programmed.
EDA TOOLS

There are several EDA (Electronic Design
Automation) tools available for circuit synthesis,
implementation, and simulation using VHDL.

Some tools (place and route, for example) are
offered as part of a vendor’s design suite (e.g.,
Altera’s Quartus II, which allows the synthesis of
VHDL code onto Altera’s CPLD/FPGA chips, or
Xilinx’s ISE suite, for Xilinx’s CPLD/FPGA chips).
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XILINX ISE DESIGN SOFTWARE:
Introduction
The ISE® software controls all
aspects of the design flow. Through the Project
Navigator interface, you can access all of the
design entry and design implementation tools.
You can also access the files and documents
associated with your project.
PROJECT NAVIGATOR INTERFACE:
WHAT IS VHDL?

The “V” in VHDL is short of yet another acronym:
VHSIC or Very High-Speed Integrated Circuit. The
HDL stands for Hardware Description Language.

VHDL is a programming language that allows one
to model and develop complex digital systems in a
dynamic environment.

VHDL is intended for circuit synthesis as well as
circuit simulation.
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WHAT IS VHDL?

A fundamental motivation to use VHDL (or its competitor,
Verilog) is that VHDL is a standard, technology/vendor
independent language, and is therefore portable and
reusable.

The two main immediate applications of VHDL are in the
 field of Programmable Logic Devices (including CPLDs
and FPGAs)
 and in the field of ASICs (Application Specific
Integrated Circuits).
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WHAT IS VHDL?

Once the VHDL code has been written, it can be used
either to implement the circuit in a programmable
device (from Altera, Xilinx, Atmel, etc.) or can be
submitted to a foundry for fabrication of an ASIC chip.

Currently, many complex commercial chips
(microcontrollers, for example) are designed using
such an approach.
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TRANSLATION OF VHDL CODE INTO A CIRCUIT

A VHDL code
ARCHITECTURE.
consists
of
ENTITY
and

ENTITY is description of I/O pins (ports) of the
circuit.

ARCHITECTURE describes how the circuit
should function.
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TRANSLATION OF VHDL CODE INTO A CIRCUIT
From the VHDL code a physical circuit is
inferred.
 However,
there are several ways of
implementing the equations described in the
ARCHITECTURE.
 The
actual circuit will depend on the
compiler/optimizer being used and, more
importantly, on the target technology.

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TRANSLATION OF VHDL CODE INTO A CIRCUIT

For instance, if our target is a programmable
logic device (PLD or FPGA) then two possible
results (among many others) for cout are
illustrated in following figures.
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TRANSLATION OF VHDL CODE INTO A CIRCUIT

On the other hand, if our target technology is an
ASIC, then a possible CMOS implementation, at the
transistor level, is that of following figure.
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VHDL CODE STRUCTURE

As depicted in following figure, a standalone piece
of VHDL code is composed of at least three
fundamental sections:
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VHDL CODE STRUCTURE: LIBRARY
DECLARATION

Contains a list of all
libraries to be used in the
design. For example: ieee,
std, work, etc.

A LIBRARY is a collection
of commonly used pieces
of code. Placing such
pieces inside a library
allows them to be reused
or shared by other
designs.
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VHDL CODE STRUCTURE: LIBRARY
DECLARATION

To declare a LIBRARY (that is, to make it visible to the
design) two lines of code are needed, one containing
the name of the library, and the other a use clause, as
shown in the syntax below.

At least three packages, from three different libraries,
are usually needed in a design:



ieee.std_logic_1164 (from the ieee library),
standard (from the std library), and
work (work library).
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VHDL CODE STRUCTURE: LIBRARY
DECLARATION

Their declarations are as follows:
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VHDL CODE STRUCTURE: ENTITY

An ENTITY is a list with specifications of all input and output
pins (PORTS) of the circuit. Its syntax is shown below.

The mode of the signal can be IN, OUT, INOUT, or BUFFER.

IN and OUT are truly unidirectional pins, while INOUT is
bidirectional. BUFFER, on the other hand, is employed when
the output signal must be used (read) internally.

The type of the signal can be BIT, STD_LOGIC, INTEGER, etc.
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VHDL CODE STRUCTURE: ENTITY

Finally, the name of the entity can be basically any name, except
VHDL reserved words.

Let us consider the NAND gate. Its ENTITY can be specified as:

The meaning of the ENTITY above is the following:

The circuit has three I/O pins, being two inputs (a and b, mode IN) and
one output (x, mode OUT). All three signals are of type BIT. The name
chosen for the entity was nand_gate.
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VHDL CODE STRUCTURE: ARCHITECTURE

The ARCHITECTURE is a description of how the circuit should
behave (function). Its syntax is the following:

An architecture has two parts: a declarative part (optional),
where signals and constants (among others) are declared,
and the code part (from BEGIN down).
The name of an architecture can be basically any name
(except VHDL reserved words), including the same name as
the entity’s.

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VHDL CODE STRUCTURE: ARCHITECTURE

Let us consider the NAND gate again.

The meaning of the ARCHITECTURE above is the following:


the circuit must perform the NAND operation between the two input
signals (a, b) and assign (‘‘<=’’) the result to the output pin (x). The
name chosen for this architecture was myarch.
In this example, there is no declarative part, and the code
contains just a single assignment.
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