An Effective Floorplanning Algorithm in Mixed
Mode Placement Integrated with RectilinearShaped Optimization for Soft Blocks
Changqi Yang, Xianlong Hong, Hannah Yang
EDA Lab, Tsinghua University
Strategic CAD Labs, Intel Corporation
Content

Motivation
 Outline of the Floorplan Algorithm RSF
 Experimental Results
 Summary
Motivation
Mixed Mode Placement

Mixed Mode Placement (MMP) problem can be
successfully solved by combining floorplanning
and cell based placement according to circuit's
hierarchy.
– Partition
– Floorplan
– Placement
Motivation
Floorplanning is the Key
Stage in MMP

Floorplanning is the key phase during the
whole design stages of MMP because the
shorter wire length of floorplanning can
reduce the final wire length after global /
detailed placement.
 Restricting virtual blocks’ shapes to be fixed
or be rectangular will limit the quality of
floorplanning.
Motivation
Previous Works

Soften virtual blocks by changing their width and height
– 2000, Ma, “VLSI floorplanning with Fixed Topology”

L/T shaped floorplanning
– 2001, Ma, "Floorplanning with Abutment Constraints ..."

Grid-based floorplanning algorithm to optimize the
shape of virtual blocks
– 2000, Dinesh P. Mehta, "On the Use of Flexible, ..."

Lagrange Relaxation method to modify the shapes and
dimensions of modules to fill up the unused area of a
preliminary floorplanning
– 2002, F.Y.Young, "Non-rectangular shaping and sizing ..."
Motivation
Virtual Block
c
g
b
g
C
b
e
B
a
f
A
c
e
B
d
A
C’
f
’
d
a

Virtual blocks are composed by standard cells.
 Virtual blocks’ features:
– They can expand their area
– They can be transformed into rectilinear-shape.
– They connect to other blocks through virtual pins.
Outline of Algorithm
Main Flow
Normal Floorplan
Change the
topology
Rectilinear-Shaped
Optimization (RSO)
Output the
optimum value
Back to
Rectangle
evaluation
Outline of Algorithm
RSO

MBB - Minimal Bounding Box
– The half-perimeter of this bounding box is corresponding to
the minimal wire length of the net in half-perimeter mode

MBBI – Minimal Bounding Box Intersection
– The virtual pin can be allocated at the point of intersection
between the MBB and the virtual block which the virtual pin
belongs to

DSA – Dead Space Attachment
– RSO can reduce the wire length if it can result in the smaller
MBB of nets. It starts from searching DSB during the
packing and then attaches the DSB to the virtual blocks
properly.
Outline of Algorithm
MBB & MBBI
virtual block
MBB
MBB candidate
(a)

(b)
(c)
The minimal wire length of a net is:
Max( Max( X ilb )  Min( X irt ), 0)  Max( Max(Yi lb )  Min(Yi rt ), 0)

Draw a MMB according to the formula
 MBB would retrogress to be a line
 Find MBB with rectilinear-shaped block by enumerating all
MBB candidates among sub blocks and selecting the one with
minimal perimeter.
Outline of Algorithm
Find the Dead Space
g
DSB
g
d
c
b
a

d
f
f
c
b
e
a
e
CBL is adopted as the representation of blocks’
topology.
 In CBL, all the dead-space blocks can be found
during the process of packing.
Outline of Algorithm
DSA
a
Virtual block
2
b
DSB
1
c
(a)
MBB
(b)

Gain:
 Potential Gain:
max( HP( MBB( L))  HP( MBB ' ( L)), 0)

max( MM (b, MBB( L))  MM (b ' , MBB( L)), 0)

G (b ' , b) 
LNL ( b )
G ' (b' , b) 
LNL ( b )
Outline of Algorithm
DSA Algorithm


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

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
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Algorithm DSA()
DS: the set of DSB in packing
{
construct DS during packing according to lemma 3;
for each D in DS do
for each attachment do
calculate G according to formula (2);
calculate G' according to formula (3);
end for
select an attachment A with maximal G;
if G(A)>0 then
complete this attachment;
else
select an attachment A with maximal G';
if G'(A) > 0 then
complete this attachment;
end if
end if
end for
}
Experimental Results
Results on MCNC Cases
Virtual #
20%
Virtual
#50%
Virtual #100%
WireLen
Min/Ave
r
Min/Aver
Impr (%)
Min/Aver
Impr (%)
Min/Aver
Impr (%)
ami33
39.431/
48.947
38.189/
40.657
3.2/
16.9
32.427/
33.781
17.8/
30.9
19.911/
22.903
49.5/
53.2
ami49
710.220/
775.551
730.156/
757.099
-2.8/
2.4
667.203/
689.463
6.1/
11.1
444.975/
480.984
37.3/
37.9
apte
194.950/
202.830
160.227/
209.284
17.8/
-3.2
160.68/
177.243
17.6/
12.6
74.187/
113.626
61.9/
43.9
xerox
403.466/
533.916
347.719/
411.925
13.8/
22.8
303.507/
365.3
24.8/
31.6
192.323/
237.822
52.3/
55.5
Name
Experimental Results
Results on MMP
Circuits
#cells
#macro
blocks
#nets
Block area (average)
/cell area(average)
block2
7094
2
10049
2045
block6
5996
6
10049
872
block8
5662
8
10049
695
block9
5895
9
10049
751
block10
5151
10
10049
676
Experimental Results
Results on MMP (2)
Name
HMMP
WireLen
MMP
WireLen
Impr(
%)
HMMP
RTime(s)
MMP
RTime(s)
block 2
1.692e6
1.608e6
5.0
358
320
block 6
2.029e6
1.435e6
29.3
382
335
block 8
2.022e6
1.409e6
30.3
405
314
block9
2.345e6
1.552e6
33.8
388
295
block 10
2.131e6
1.240e6
41.8
388
356
Summary
Summary

The floorplanning algorithm integrated with
rectilinear-shaped optimization is effective.
 It can achieve good floorplanning quality
when virtual blocks exist.
 The MMP involving the algorithm as its
floorplanning stage can obtain better
performance in final placement results
Thank you!!!