Diagnostic Test Pattern Generation and Fault Simulation for Stuck-at and Transition Faults Committee: Vishwani D. Agrawal Adit Singh University Reader: Sanjeev Baskiyar, CSSE Victor P. Nelson Bogdan M. Wilamowski Student: Yu Zhang Auburn University, Auburn, Alabama 36849 USA Mar. 21, 2012 Zhang: PhD Defense 1 Purpose • Identification of fault is useful in the characterization phase of design. • Present ATPG tools emphasize only fault detection. • There is an accepted measure for fault detection coverage but none for diagnostic coverage. • Diagnosis must deal with non-classical faults, not just single stuck-at faults. Mar. 21, 2012 Zhang: PhD Defense 2 Outline • Purpose (motivation) • Introduction & Background • Diagnostic ATPG System – Diagnostic Fault Simulation – Exclusive Test Generation – Equivalence Identification • Exclusive test for transition fault • Experimental results • Conclusion Mar. 21, 2012 Zhang: PhD Defense 3 Diagnostic ATPG Problem • Given a circuit and a fault model, find: – Test vectors to distinguish between all, or most, fault-pairs. – Measure diagnostic coverage of vectors. • Present contributions: – A new diagnostic coverage metric. – A diagnostic ATPG system using new algorithms and conventional stuck-at fault detection tools. – A diagnostic ATPG system for transition faults using new algorithms and available fault-detection tools Mar. 21, 2012 Zhang: PhD Defense 4 Introduction Basic testing flow. Test Patterns/ Vectors ---00 ---01 ---11 --- ---- ---- ----10 Stored expected output response Circuit under Test (CUT) Output Responses Comparator Mismatch Faulty Circuit Mar. 21, 2012 10--01---- ---- ---- --11--- Match Good Circuit Zhang: PhD Defense 5 Fault Detection and Diagnosis 1 Fault D 0 CUT Fault D 1 • Fault detection: Need at least one vector that detects a target fault. • Fault diagnosis: Need at least one vector that produced different responses for every pair of faults. Mar. 21, 2012 Zhang: PhD Defense 6 Introduction* Fault detection test generation: Find an input vector such that faulty response differs from fault-free response. C0 C1 = 1 Detection test vector CUT with fault f1 C1 sa0 Fault free CUT C0 * Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. International Test Conf., Nov 2010. Mar. 21, 2012 Zhang: PhD Defense 7 Introduction Exclusive test: A test that detects only one Simplified: fault from a fault-pair. (C0 C1) (C0 C2) = 1 Exclusive test vector Exclusive test vector CUT with fault f1 C1 ⇒ CUT with Fault free faultC0f1 CUT CUT with fault f2 C1 C2 = 1 C1 C2 CUT with fault f2 C2 Fault free CUT Mar. 21, 2012 sa0 sa0 C0 Zhang: PhD Defense 8 Diagnostic Test Generation System Conventional ATPG 1. Structurally collapsed fault set 2. ATPG system for detection fault coverage Functionally equivalent fault-pair No Undiagnosed fault-pair Adequate diagnostic coverage? Yes Mar. 21, 2012 4. Exclusive test generator Detection vectors Exclusive vectors Test vectors 3. Diagnostic fault simulator Stop Diagnostic ATPG Zhang: PhD Defense 9 Diagnostic Fault Simulator* • Given a set of vectors and a set of faults, find: – Diagnostic coverage – Identify undiagnosed fault groups with two or more faults – Eliminate the need to target all n(n – 1)/2 fault pairs * Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation,” Proc. 11th IEEE Latin-American Workshop, March 2010. Mar. 21, 2012 Zhang: PhD Defense 10 Diagnostic Fault Simulation 1. For an input test vector find detected faults. 2. Group faults with same syndrome (detection pattern at primary outputs). 3. Calculate/update diagnostic coverage (DC). 4. Continue steps 1 through 3 with next test vector until no vectors left. Mar. 21, 2012 Zhang: PhD Defense 11 Diagnostic Fault Simulation Original fault set Simulate t1 G0 Simulate t2 G0 fa G4 G3 G2 G2 G5 fb G7 Simulate t3 Simulate tn Mar. 21, 2012 fc fd fe Zhang: PhD Defense G5 12 Diagnostic Fault Coverage (DC)* • Diagnostic coverage (new) • Fault coverage (conventional), Where g0 is the set of undetected faults. * Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric,” 15th IEEE European Test Symp., May 2010. Mar. 21, 2012 Zhang: PhD Defense 13 DC vs. Fault-Pair Coverage – C432 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1000 900 800 700 600 500 400 300 DC 200 Distin. FP/Total FP 100 No. of Un. FP 1 11 21 31 41 0 51 61 Number of Undistinguished Fault Pairs Coverage as fraction Diagnostic Coverage Number of ATPG Vectors Mar. 21, 2012 Zhang: PhD Defense 14 Diagnostic Fault Simulation Take ISCAS85 benchmark circuit c17 as an example: 1 10 3 20 2 16 5 6 14 11 15 7 Mar. 21, 2012 22 Zhang: PhD Defense 21 23 19 15 Diagnostic Fault Simulation • 22 collapsed fault in c17 (f1~f22): f1: 22 sa1 f2: 10 sa1 f3: 22 sa0 f4: 16->22 sa1 f5: 3->10 sa1 f6: 1 sa1 f7: 3 sa0 f8: 3 sa1 f9: 16 sa1 f10: 16 sa0 f11: 11->16 sa1 Mar. 21, 2012 f12: f13: f14: f15: f16: f17: f18: f19: f20: f21: f22: Zhang: PhD Defense 2 sa1 11 sa0 3->11 sa1 11 sa1 6 sa1 23 sa1 19 sa1 23 sa0 16->23 sa1 11->19 sa1 7 sa1 16 Diagnostic Fault Simulation Test vector set for c17 (generated by our diagnostic ATPG system): t1: t2: t3: t4: t5: t6: t7: t8: 00000 10110 11101 01110 10011 00111 11000 01010 Mar. 21, 2012 00 10 11 00 01 00 11 11 1 10 3 2 6 22 20 14 5 11 7 Zhang: PhD Defense 15 16 21 19 23 17 Diagnostic Fault Simulation Fault simulation without fault dropping: test 1: 00000 00 f1: * 10 f2: 00 Fault free f3: 00 response f4: 00 for test 1 f5: 00 f6: 00 * indicates f7: 00 detected faults f8: 00 f9: 00 f10: * 11 f11: 00 Mar. 21, 2012 Zhang: PhD Defense f12: f13: f14: f15: f16: f17: f18: f19: f20: f21: f22: * 11 00 00 00 00 * 01 00 00 00 00 * 01 18 Diagnostic Fault Simulation Faults can be grouped according to syndromes (syndromes of t1): Groups Faults Syndrome t1 G1 f1 10 G2 f10,f12 11 G3 f17,f22 01 G0 All other faults 00 In syndrome, ‘1’ represents a mismatch with fault free response. ‘0’ means match. f1 will be dropped from further simulation. Mar. 21, 2012 Zhang: PhD Defense 19 Diagnostic Fault Simulation Mar. 21, 2012 Groups Faults Syndrome t1 G1 f1 10 G2 f10,f12 11 G3 f17,f22 01 G0 All other faults 00 Zhang: PhD Defense 20 Diagnostic Fault Simulation Fault simulation with t2: test 2: 10110 G2: f10: * 11 f12: 10 G3: f17: * 11 f22: 10 Mar. 21, 2012 G0: f2: * 00 f3: * 00 f4: 10 f5: 10 10 f6: 10 f7: * 00 Fault free f8: 10 response f9: 10 f11: 10 f13: 10 G0 contains f14: 10 undetected f15: 10 faults. f16: 10 After test2 f2, f3, f18: 10 and f7 will leave f19: 10 G0. f20: 10 f21: 10 Zhang: PhD Defense 21 Diagnostic Fault Simulation After applying t2: Groups G2 G4 G3 G5 G0 G6 Faults Syndrome t2 f10 01 f12 00 f17 01 f22 00 All other faults 00 f2, f3, f7 10 f10, f12, f17, f22 are dropped from further simulation Mar. 21, 2012 Zhang: PhD Defense 22 Diagnostic Fault Simulation Groups G2 G4 G3 G5 G0 G6 Mar. 21, 2012 Faults Syndrome t2 f10 01 f12 00 f17 01 f22 00 All other faults 00 f2, f3, f7 10 Zhang: PhD Defense 23 Dictionary Construction This is a fault dictionary constructed after applying t2. It can be used for cause-effect diagnosis ‘X’ means don’t care or unknown Faults Syndrome t1 Syndrome t1 Syndrome t3 ~ t8 f1 10 X … f10 11 01 … f12 11 00 … f17 01 01 … f22 01 00 … f2, f3, f7 00 10 … All other faults 00 00 … Mar. 21, 2012 Zhang: PhD Defense 24 Diagnostic Fault Simulation Continue to apply test vectors to all groups, and divide faults into sub groups. After t1: f1 is dropped G1: f1 (10) G2: f10, f12 (11) G0: f1, f2, f3,…f22 (no test applied) G0: G3: All other f17, f22 (01) faults (00) Mar. 21, 2012 Zhang: PhD Defense 25 Diagnostic Fault Simulation After t2: G2: f10, f12 G2: f10 (01) G5: f12 (00) Single fault groups are dropped. Mar. 21, 2012 Zhang: PhD Defense 26 Diagnostic Fault Simulation Similarly for G3: G3: f17, f22 G3: f17 (01) G6: f22 (00) Single fault groups are dropped. Mar. 21, 2012 Zhang: PhD Defense 27 Diagnostic Fault Simulation For G0: G0: f2~f9, f11, f13~f16, f18~f21 G7: f2, f3, f7 (10) Mar. 21, 2012 No faults are dropped hereG0: all other undetected faults (00) Zhang: PhD Defense 28 Diagnostic Fault Simulation • For c17 after applying all 8 test vectors, we get 22 fault groups with only one fault in each group. Mar. 21, 2012 Zhang: PhD Defense 29 Fault Dropping • Each group contains faults that are not distinguished from others within that group, but are distinguished from those in other groups. • During simulation once a fault is placed alone in a single-fault group, it is dropped from further simulation. Mar. 21, 2012 Zhang: PhD Defense 30 Diagnostic Fault Simulation Summarize: Original fault set Simulate t1 G0 Simulate t2 G0 fa G4 G3 G2 G2 G5 fb G7 Simulate t3 Simulate tn Mar. 21, 2012 fc fd fe Zhang: PhD Defense G5 31 Summary for Fault Simulation • Diagnostic coverage metric defined. • Diagnostic fault simulation has similar complexity as conventional simulation with fault dropping. Mar. 21, 2012 Zhang: PhD Defense 32 Exclusive Test* Generation • An exclusive test for fault-pair (f1, f2) distinguishes between the two faults. • If no exclusive test exists, then the two faults cannot be distinguished from each other and form an equivalent fault-pair. * V. D. Agrawal, D. H. Baik, Y. C. Kim, and K. K. Saluja, “Exclusive Test and its Applications to Fault Diagnosis,” Proc. 16th International Conf. VLSI Design, Jan. 2003, pp. 143– 148. Mar. 21, 2012 Zhang: PhD Defense 33 Exclusive Test Generation Need two copies of circuit New model:model: Previous Exclusive Exclusive testtest vector vector X Sa0 or Sa1 y Mar. 21, 2012 C1 C2 = 1 C1 C1 CUT with CUT with fault fault f1 f1 sa0 0 CUT with with CUT fault f2 f2 fault C2 C2 Zhang: PhD Defense 1 G(X,y) 34 Exclusive Test Generation Single circuit copy ATPG: find a test vector to distinguish fault f1 (line x1 s-a-a) from fault f2 (line x2 s-a-b) PO PI line x1 line x2 Mar. 21, 2012 s-a-a s-a-b Zhang: PhD Defense 35 New Diagnostic ATPG Model • Two-copy ATPG model with C1 and C2: • Substitue: • Single-copy ATPG model with C: Mar. 21, 2012 Zhang: PhD Defense 36 Single Copy Exclusive Test Generation Consider exclusive test for x1 s-a-a and x2 s-a-b y PO x1 PI x1’ a x2 CUT C Mar. 21, 2012 G x2’ b Zhang: PhD Defense 37 A Simplified Model Suppose a is 0 and b is 1, the model can be simplified: y x1 x1’ PO PI x2’ x2 CUT C Mar. 21, 2012 Zhang: PhD Defense 38 Exclusive Test Generation Example ISCAS85 c17 benchmark circuit: 1 10 3 sa0 20 2 22 16 5 6 14 11 15 7 21 23 19 sa1 t1: 00000 00 t2: 10110 10 Mar. 21, 2012 Seven test vectors generated by ATPG; 100% fault coverage but some fault-pairs not distinguished Zhang: PhD Defense 39 Exclusive Test Generation 1 0 0 1 1 6 0 10 3 20 2 22 1/0 16 14 11 21 15 19 23 7 y Sa0 or Sa1 Mar. 21, 2012 t8: 10010 00 Zhang: PhD Defense 40 0/1 Advantages of Exclusive Test Algorithm • Reduced complexity: Single-copy ATPG model is no more complex than a single fault ATPG. • No need for especially designed diagnostic ATPG tools that try to propagate different logic values of two faults to POs. • Can take advantage of various existing fault detection ATPG algorithms. Mar. 21, 2012 Zhang: PhD Defense 41 Experimental Results Detection test Generation Circuit No. of faults c17 Diagnostic test Generation Det. Vect. FC % CPU s* DC % Excl. Abort Equv. Vect. pairs pairs DC % CPU s* 22 7 100.0 0.03 95.5 1 0 0 100.0 0.03 c432 524 51 99.2 0.03 92.0 18 13 13 100.0 0.03 c499 758 53 100.0 0.03 97.4 0 12 12 100.0 0.03 c880 942 60 100.0 0.05 92.6 10 55 55 100.0 0.05 c1355 1574 85 100.0 0.05 58.9 2 740 740 100.0 0.13 c1908 1879 114 99.9 0.05 84.7 20 300 277 98.8 0.07 c2670 2747 107 98.8 0.11 79.1 43 494 466 98.9 0.34 c3540 3428 145 100.0 0.13 85.2 29 541 486 97.2 0.42 c6288 7744 29 99.6 0.22 85.3 108 842 977 99.5 7.60 c7552 7550 209 98.3 0.39 86.0 87 904 1091 99.4 2.18 * Core 2 Duo 2.66GHz 3GB RAM Mar. 21, 2012 Zhang: PhD Defense 42 Need for Equivalence Identification • Some fault-pairs are functionally equivalent; not found in structural collapsing. • Exclusive test ATPG may leave many undiagnosed fault pairs as aborted faults. • Many techniques have been proposed for fault equivalence identification: – Structural analysis – Exhaustive enumeration – Learning & implication – Branch & bound – Circuit transformation & symmetry identification Mar. 21, 2012 Zhang: PhD Defense 43 Equivalence Identification* sa1 Extract a small logic block Faults are functionally equivalent if, exclusive test impossible, or faulty circuits identical. Dominator gate for both faults sa0 * M. E. Amyeen, W. K. Fuchs, I. Pomeranz, and V. Boppana, “Fault Equivalence Identification in Combinational Circuits Using Implication and Evaluation Techniques,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 7, Jul. 2003. Mar. 21, 2012 Zhang: PhD Defense 44 Summary of Test Generation • New diagnostic test generation algorithm uses conventional tools: – Diagnostic fault simulation drops diagnosed faults; similar complexity to conventional fault simulators. – Exclusive test generation requires only single fault detection. – Fault equivalence checking is important for DC; requires effective algorithm. Mar. 21, 2012 Zhang: PhD Defense 45 Exclusive Test Gen. For Tran. Faults • Introduction and background • Representing a transition fault as a single stuck-at fault • Exclusive test patterns for transition faults – One and two time frame models • Experimental Results • Summary Mar. 21, 2012 Zhang: PhD Defense 46 Purpose • Many modern design failures behave as non-classical faults. • Most failures are timing related. • Transition fault model is widely used due to its simplicity. • There exist a need for diagnosis using the transition fault model. Mar. 21, 2012 Zhang: PhD Defense 47 Problem Statement and Contribution • Modeling and test generation for transition faults: – Detection of single transition faults – Exclusive tests for fault-pairs • Contribution: – A diagnostic ATPG system for transition faults using conventional fault-detection tools. Mar. 21, 2012 Zhang: PhD Defense 48 Examples of Transition Fault * Mar. 21, 2012 Zhang: PhD Defense 49 Transition Fault Test with Scan Combinational Logic Scan out SFF Scan enable SFF Scan in Mar. 21, 2012 Zhang: PhD Defense 50 Two Time-Frame Model • There are 2 possible ways to model a transition fault with a single stuck-at fault: – First, since most digital designs are sequential, we can use a 2-time-frame circuit. PI PO line x1 line x1 1st time frame Mar. 21, 2012 2nd time frame Zhang: PhD Defense 51 Detection Test Generation Detection test for xx’ slow-to-rise Useful for equivalence identification Two-time-frame Model (Simplified): PI PO x x x’ x’ y Mar. 21, 2012 s-a-1 Zhang: PhD Defense 52 Representation of a Transition Fault 1 0 Clock Slow to rise x’ x MFF Model: x x’ MFF init. 1 Mar. 21, 2012 Zhang: PhD Defense x x’ 00 00 01 00 10 10 11 11 53 Detection Test Generation Using MFF Model: PI x 0 1 MFF init. 1 x’ PO s-a-1 y Test for y sa1 is also a test for xx’ slow to rise Mar. 21, 2012 Zhang: PhD Defense 54 Detection Test Generation PI x x’ PO MFF init. 1 s-a-1 y Test for y sa1 is also a test for xx’ slow to rise Mar. 21, 2012 Zhang: PhD Defense 55 Single Copy Exclusive Test Generation Exclusive test for x1x1’ slow-to-fall and x2x2’ slow-to-rise: PO PI 0 1 x1 MFF init. 0 y s-a-0/1 Mar. 21, 2012 x2 MFF init. 1 Zhang: PhD Defense 0 1 x 1’ x 2’ 56 Single Copy Exclusive Test Generation Simplified version: PO PI x1 MFF init. 0 s-a-0/1 x2 Mar. 21, 2012 MFF init. 1 Zhang: PhD Defense x 1’ x 2’ 57 DC vs. Fault-Pair Coverage – s27 Coverage as fraction 1.2 50 45 1 40 35 0.8 30 0.6 25 20 0.4 DC 15 0.2 Distin. FP/Total FP 10 No. of Un. FP 5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Number of Undistinguished Fault Pairs Diagnostic Coverage Number of ATPG Vectors Mar. 21, 2012 Zhang: PhD Defense 58 Experimental Results Detection test Generation Circuit No. of faults s27 Diagnostic test Generation Det. Vect. FC % UnFlt Grp DC % Excl. Vect. 46 11 100.0 12 52.2 18 1 2 97.8 s298 482 44 79.9 62 62.4 34 39 4 70.1 s382 616 51 80.8 82 64.1 24 58 4 68.5 s1423 2364 102 92.9 280 79.3 106 182 5 84.1 s5378 6589 205 91.2 400 82.0 472 85 7 90.0 s9234 10416 377 92.8 1219 75.8 597 754 8 82.1 s13207 14600 480 89.1 1707 70.0 543 1392 11 74.1 s15850 17517 306 87.6 1961 71.2 486 1565 7 74.3 s35932 52988 75 99.0 3737 88.3 725 2867 4 90.2 s38417 47888 244 98.4 4090 87.5 1336 2883 8 91.0 s38584 56226 395 95.7 4042 86.7 1793 2440 7 90.3 Mar. 21, 2012 Zhang: PhD Defense UnFlt Large Grp st Grp DC % 59 Experimental Results • Results compared to a recent work* Detection test Generation s38584 No. of faults Diagnostic test Generation Det. Vect. FC % UnFlt DC % 1000 2120 -- 14197 97.16* 583 This work 56226 395 95.7 4042 86.7 1793 Previous Excl. UnFlt Vect. DC % CPUs 12881 97.42* 174649 2440 90.3 14841 * Y. Higami, Y. Kurose, S. Ohno, H. Yamaoka, H. Takahashi, Y. Takamatsu, Y. Shimizu, and T. Aikyo, “Diagnostic Test Generation for Transition Faults Using a Stuck-at ATPG Tool,” in Proc. International Test Conf., 2009. Paper 16.3. Mar. 21, 2012 Zhang: PhD Defense 60 Future Work • Implement 2-time frame model to get higher DC. • Targeting mixed/multiple fault models. • Test set compaction using DATPG and diagnostic fault simulation: – E.g. reverse/random order simulation of generated vector set, if no new faults are detected AND no new fault groups are formed, the vector in simulation can be dropped. – Combined with ILP for further compaction. Mar. 21, 2012 Zhang: PhD Defense 61 Future Work • Example of exclusive test generation for a stuck-at fault and a bridging fault: a b d e c a a’ 0 1 1 d b c1 1 y Mar. 21, 2012 1 0 s-a-0 e’ e c’ Zhang: PhD Defense 62 Future Work Fault dictionary for previous example: Test Syndrome Faults 010 011 100 110 111 a sa0 0 0 0 1 0 a sa1 1 0 0 0 0 b sa1 0 0 1 0 0 c sa0 0 1 0 0 0 c sa1 1 0 1 0 0 e sa0 AND bridge (a, c) 0 1 0 1 1 0 1 0 1 0 Mar. 21, 2012 Zhang: PhD Defense 63 Summary • A diagnostic coverage metric is proposed. • A new diagnostic ATPG system for stuck-at fault is constructed. • Experimental results show their effectiveness. • Extend the DATPG system for transition fault. • Experimental results show improved DC. • Only conventional tools are used. Mar. 21, 2012 Zhang: PhD Defense 64 References for Some Figures Used • Acknowledgement: * http://courses.ece.uiuc.edu/ece543/docs/ DelayFault_6_per_page.pdf (Slide 49) * http://www.sciencephoto.com/media/347881/ enlarge (Slide 47) * http://www.ami.ac.uk/courses/topics/0268_wb/ index.html (Slide 47) * http://materials.usask.ca/images/photos/SEM6LevelCuChipP98.GIF (Slide 2) Mar. 21, 2012 Zhang: PhD Defense 65 Publications • Y. Zhang and V. D. Agrawal, “Reduced complexity test generation algorithms for transition fault diagnosis,” in International Conference on Computer Design (ICCD), Oct. 2011, pp. 96 -101. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. International Test Conf., 2010. Paper 12.3. • Y. Zhang and V. D. Agrawal, “Diagnostic Test Generation and Fault Simulation Algorithms for Transition Faults” in Proc. 20th North Atlantic Test Workshop, May, 2011 • Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation,” in Proc. 11th IEEE Latin-American Workshop, 2010. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. 19th North Atlantic Test Workshop, May, 2010. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric,” in 15th IEEE European Test Symp., May 2010. • Y. Zhang and V. D. Agrawal, “On Diagnostic Test Generation for Stuck-at Faults,” in preparation. • Y. Zhang and V. D. Agrawal, “A Diagnostic ATPG System Targeting Multiple/Mixed Fault Models,” in preparation. Mar. 21, 2012 Zhang: PhD Defense 66 Mar. 21, 2012 Zhang: PhD Defense 67