Synopsys Sentaurus Tutorial
- For EE130/230A Project
Manish Raje
Peng Zheng
Fall 2013
EE130/230A 2013 Fall
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CONFIDENTIAL INFORMATION
– The following material is being disclosed to you
pursuant to a non-disclosure agreement between
UC Berkley and Synopsys. Information disclosed
in this presentation may be used only as permitted
under such an agreement.
LEGAL NOTICE
– Information contained in this presentation reflects
Synopsys plans as of the date of this presentation.
Such plans are subject to completion and are
subject to change. Products may be offered and
purchased only pursuant to an authorized quote
and purchase order. Synopsys is not obligated to
develop the software with the features and
functionality discussed in the materials.
EE130/230A 2013 Fall
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Suggestion
• Study this tutorial along with the video
(you can download it from the course
webpage) to learn how to use
Sentaurus.
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Outline
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•
•
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Software Setups and Configurations
Introduction to Sentaurus TCAD
Basic Sentaurus Operations
Project Tips
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Software Setups
• You can work on the project in the Cory 199 Lab
which has Windows operating systems.
• For working at home via Windows, you will need to
install Xming, Putty and WinSCP.
• Users working on Macs (or Linux) must make sure
that they have X-11 forwarding enabled (such as by
using Xquartz). You can then ssh into the servers via
terminal and work on the project.
• For those who want to work from home: The
connection speed is going to be SLOW. Thus, it is
best to work on campus!
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Install Xming
• An X11 Forwarding Software such as Xming (or
Exceed) is needed.
Successful running will display a
task bar on your desktop
Xming helps you forward the
GUIs from Unix system to your
PC
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Software Setups
• You may also use Xming that is loaded on the
computer lab (1st floor of Cory Hall).
• Putty
Putty is a remote login software, will
help you to log into Unix system
from a PC (Windows)
• WinSCP
WinSCP can be downloaded online,
for free, and is used to transfer files
from your PC to the Unix.
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Servers and Performance
• Instructional servers (login with the instructional
accounts):
 bcom18.eecs.berkeley.edu
 bcom20.eecs.berkeley.edu
 icom1.eecs.berkeley.edu
 hpse-(9-15).eecs.berkeley.edu (hpse-9 through hpse-15)
• Only the above servers should be used since they have
the latest versions of software.
 Do not wait until the last day!
 We have prepared 10 servers for you, so pick one with
fewer users logged in.
• Once again, since the simulations take time, it is best to
work on campus!
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Transfer of Project Folder to the
server side
• Download the project folder from the class
webpage and unzip it.
• Copy the unzipped project folder to the
instructional server by using WinSCP. Basically,
you just need to drag the folder into the home
directory on the instructional server (see next
page for details).
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Once you have logged in,
you can view the files in both
your PC and the home
directory of the server
Log in using your
instructional account!
Just select the files/folder
from your PC and copy to
the server
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Running Sentaurus
The first step is to use WinSCP to transfer the project file
which is downloaded from the EE130/230A course page.
- Once the file transfer is complete
• Start Xming (or Exceed)
• Start putty
 Select the server you want to run your simulation
 Log on the server
 Input your Account name and Password
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Please check here !
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Opening the project using Sentaurus
-After the file transfer, open Putty and log in to
one of the servers using your ee130 class
account.
-In the home directory use the command swb,
this will open Sentaurus.
-When asked to choose the STDB directory,
select the path that the project file is placed in
(remember to always make this same selection)
-The Sentaurus workbench will now open.
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Sentaurus Workbench
• Graphical user interface to unify all simulation tools
into a single experiment project flow
• Used to organize projects and set up experiments
for both structure generation and device simulation
Technology Computer-Aided-Design Tools
Parameter row
Experiment column
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Unlocking Workbench
• Double click 20nm-NMOS: the simulation modules
will show up on the work bench
• If you cannot edit the value in the cell, then Right
click 20nm-NMOS→ project→unlock :This will
unlock the project for modification of values.
Technology Computer-Aided-Design Tools
Parameter row
Experiment column
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Sentaurus Structure Editor
• Structure Editor (1) generates the device
structure (including the doping profiles) (2)
Defines the electrical contact and (3)
generates the meshing for numerical
simulations.
Parameters you may need to change/optimize for this project
•Spacer length (Lsp, Units: um)
•Channel Doping Concentration (ChanDoping, Units: cm-3)
•Source/Drain extension depth (XjExt, Units: um)
•MOSFET gate length (Lgate, Units: um) onlyfor Vt roll off
curve.
• EE230A only: Surface Doping Concentration NS, Body
Doping Concentration NB and Peak Doping Position TSi
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Sentaurus Device
• Sentaurus Device simulates the device
performance by solving multiple, coupled
physical equations based on the meshing.
• Inputs: gate voltage (Vgs), drain voltage
(Vds), workfunction value
Common Physical models:
•Si band structure (Ec/v, Nc/v and bandgap narrowing)
•Fermi-Dirac Statistics
•Poisson equation, continuity equation
•Band-to-band tunneling, R-G current
•Drift-Diffusion current, carrier mobility, velocity saturation
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Sentaurus Inspect
• Used to automatically extract critical
device performance parameters such as:
Vt_lin
Id_lin
Vt_sat
Id_sat
I_OFF
• Also used to plot the Id-Vg and Id-Vd
curves
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Simulation Status
• Start Sentaurus, first select from the left project
column, right-click to “preprocess”.
• Then you will find the nodes will display different
colors, suggesting they have different properties.
Here is a summary. Only colorful nodes will give
you the simulation output.
• “Ready” means the current tool is free of syntax
errors (You should see this since you are not
allowed to modify the scripts).
• Right-click a certain Ready nodes to run, after a
short period of time, you will find it changes to
“done” or “failed”.
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Basic Operations for the project
• Before running simulations, right click and preprocess nodes
(repeat every time after changing any values)
• Run the Xjext node.
• To obtain values for Ion and Ioff, first run the Id-Vg_sat
SDEVICE node (n 13 for EE130, n 16 for EE230A).
• After the SDEVICE node has completed, run the INSPECT node
to extract values of Ioff, Ion.
• For further information regarding the different operation go
to
http://www.synopsys.com/Tools/TCAD/CapsuleModule/cmos
cha.pdf
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Basic Operations for
Sentaurus Structure Editor
• Now you can view your simulation results if the nodes
are done.
• Right-click the last node in Structure editor, select
Visualize → Sentaurus Visual(Select File) and choose
msh.tdr file to view your device structure.
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Basic Operations for
Sentaurus Visual (S-visual)
• This slide help you familiarize the usage of Sentaurus
Visual, this tool is for the visualization and
profiles/contours extraction purposes.
Parameters
shown in plot
zoom-in tool
Precision
Cuts
Slice-cutting
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Export the results from SVisual:
Use export
plot to save
the plot as
an image
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To get the data field,
first zoom into the
region 0.002um below
the Si-SiO2 interface.
Use precision cut along
the desired y axis.
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To export the values of the doping
concentration obtained in the plot,
select the data curve, the go to Data
and select export XY data. The values
obtained are stored in a csv file which
can be transferred back to the user
side and viewed with excel.
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Basic Operations for
Sentaurus Device
• Right-click the “done” node in Structure Device,
select Visualize → Svisual (Select File) and choose
des.tdr file to view your device performance
contours (vector fields).
Current Density
Linear region
Saturation region
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Basic Operations for
Sentaurus Device Cont.’d
• Right-click the “done” node in Structure Device,
select Visualize → Inspect (Select File) and choose
IdVg_des.plt file to view your device performance
curves.
Device
Terminals
Choose Log Y or
Linear Y here
Most common plot
combination is “gate:
OuterVoltage”
Outputs
Use cursors to read
the data value along
“drain: TotalCurrent”
the curve
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Project Tips
• Typical Performance Figure-of-Merits
• Performance Specifications for this Project
• Performance Optimization Hints for a
Short-Channel MOSFET
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Idsat, Ilin and IOFF
Vds=VDD
Idsat
Vds=20mV
Ilin
IOFF, Idsat and Idlin
are
extracted
automatically
IOFF
VDD
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Threshold Voltage (Vt)
Constant current definition
of threshold voltage
It = 100nA · W/Lgate
W has default value of 1um for
2-dimensional device simulation
Vth
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Vtlin and Vtsat are
extracted
automatically
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DIBL and SS
DIBL is defined as the threshold
voltage difference divided by the
drain bias between linear and
saturation region .
Sub-threshold Swing
You are required to extract S
and DIBL manually, from
EE130/230A your
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Performance Specifications
• For students taking EE130, your goal is for the HighPerformance(HP) technology; and you have to meet the
following specs (at 20nm node):
- IOFF should be smaller than 100 nA/um.
- ION should be larger than 1.3 mA/um.
• For students taking EE230A, your goal is for the Low-Standby Power (LSTP) technology; and you have to meet the
following specs (at 20 nm node):
- IOFF should be smaller than 10 pA/um.
- ION should be larger than 360 uA/um.
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Hints for Your Optimizations
• Impacts of channel doping concentration (Nch): Increasing
Nch generally helps to reduce IOFF, until it touches the bandto-band tunneling limits. On the other hand, high Nch will
degrade the carrier mobility values, resulting in a low ION.
• Impacts of Junction Depth (Xj): smaller extension Xj helps
to reduce IOFF, however it will result in a larger Source/Drain
series resistance value to degrade ION.
• Impacts of SiN spacer width (Lsp): Wider spacer helps to
reduce the impact from deep Source/Drain regions;
however it will also result in the larger series resistance
problem.
 So as you can see, there exist trade-offs to optimize
ION/IOFF ☺
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Project Hints
• Since our performance targets are mainly for ION and IOFF,
so you should start working on the saturation-region
device simulation first.
• Once you are able to meet the specs, then you should
perform the linear-region device simulation to get the
current and threshold voltage values, as well as to measure
the DIBL value.
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Project Hints (Con’d)
• The next task is to study the Short-Channel Effect, by
changing the gate length ONLY. Perform the simulations in
both linear and saturation regions, and then plot the
threshold voltage values vs. gate length.
• Lastly, you should run the last SDevice component, to
generate the Ids vs. Vds curves under 4 Vgs values. Then
take a look at the I-V curves to decide whether your device
performance is limited by the “pinch-off” or the carrier
velocity saturation.
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