Deadlock Detection and Resolution for

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Deadlock Detection and Resolution in the Real-Time Control of
Flexible Manufacturing Cells
Srilakshmi Venkatesh
Applied Materials Inc.
2151 Mission College Blvd. M/S 2554
Santa Clara, CA 95054
Jeffrey S. Smith
Department of Industrial Engineering
Texas A&M University
College Station, TX 77843-3131
Abstract (version 6.0)
We present a deadlock detection and resolution scheme that effectively captures deadlocks in
manufacturing cells with alternate part routings. The deadlock scheme is based on a bipartite
graph model of the part-machine relationship in the manufacturing cell. Previous deadlock
detection and resolution schemes do not consider alternate part routings in handling deadlock and,
hence, can restrict the allowable flexibility in a manufacturing cell. We propose two controller
commands that facilitate the dynamic preparation of the deadlock graph, and encapsulate the
controller directives required to detect and resolve deadlocks. A distinction is made between
permanent-deadlocks and transient-deadlocks. Permanent-deadlock depicts a manufacturing
system state where parts are irrevocably blocked, whereas transient-deadlock indicates that there is
a potential for the deadlock to be resolve itself in time. To recover from deadlocks, we suggest
either resolving permanent-deadlocks or resolving both permanent and transient-deadlocks in the
manufacturing cell. Under both these strategies we show that it is sufficient to resolve any cycle
in the set of deadlocked parts to resolve the deadlock. In addition, experimentation suggests that it
may be appropriate to resolve both permanent and transient-deadlocks if the material transfer
times are low relative to the processing times in the manufacturing cell.
1. Introduction
System deadlock is an indication of coordination problems in discrete time systems. Deadlock studies
have been reported in various areas of computer science, such as, database systems [18, 30], operating
systems [5, 12, 13], and communication systems [23]. Deadlocks in manufacturing systems occur when
two or more parts request machines held by other parts, and cannot return the machines they hold until
they are granted the requested machines. The phenomenon of deadlock has been observed in the control
of manufacturing systems by a number of previous researchers [3, 4, 22, 28, 31,35, 36]. We present a
deadlock detection and resolution scheme for the real-time control of a fully automated flexible
manufacturing cell (FMC).
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Researchers have identified three standard approaches to manage deadlock situations: prevention,
avoidance, and detection and resolution. Deadlock prevention is a static server allocation approach, and
averts deadlock by ensuring that the necessary conditions for deadlock cannot occur. Examples of
preventive measures in a manufacturing system include uni-directional batching of jobs and providing a
large number of in-process buffers [4, 20, 31, 35, 36]. Deadlock avoidance is a dynamic server allocation
approach that prevents the sufficient conditions for deadlock from occurring [3, 4, 20, 28, 31, 35, 36].
We present a graph-theoretic detection and resolution procedure in a manufacturing cell with alternate
part routings. In deadlock detection and resolution, the manufacturing cell is allowed to enter a deadlock
state, and the resolution procedure resolves the consequent deadlock [4, 20, 22, 35, 36]. This assumption
mandates that one buffer space be “reserved” exclusively to perform the resolution procedure [36].
Previous detection and resolution schemes that are developed in the control of manufacturing systems [4,
20, 22, 35, 36] do not consider alternate part-routings while handling deadlocks. Alternate part routing
allows flexibility in the process plan and, thus, any restriction can constrain the processing flexibility of
the manufacturing system.
We recognize two types of deadlocks. The first type of deadlock is called permanent-deadlock, and
occurs when a set of machines and parts are irrevocably blocked [3, 4, 20, 31, 35, 36]. In addition, we
introduce a second type of deadlock called transient-deadlock in manufacturing control. Transientdeadlock can occur due to the presence of alternate machines for a particular processing step. In case of
transient-deadlock, there is a potential for the deadlock to resolve itself. However, the parts in transientdeadlock can incur a time penalty due to the resulting wait. Deuermeyer et al. [6] and Venkatesh et al.
[34] introduce the concept of transient-deadlocks in the context of discrete simulation systems.
We propose two control policies in manufacturing systems to resolve the detected deadlock: (1) resolve
just permanent-deadlocks and (2) resolve both permanent and transient-deadlocks, as and when they
occur. The proposed detection and resolution procedure runs in linear-time in the adjacency list
representation of the deadlock graph. Deadlock detection is based on a linear-time search algorithm by
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Deuermeyer and Friesen [6] and the resolution is based on a linear-time procedure from Itai and Rodeh
[16]. One of objectives of the proposed deadlock scheme is to recognize, categorize, and resolve different
types of deadlocks in manufacturing control systems.
We propose two controller commands to aid us in preparing and updating the deadlock graph. The
controller commands are executed as a part in the manufacturing cell obtains and frees machines, called
capture and relinquish, respectively. The commands algorithmically encapsulate the directives required
by the real-time controller to automatically recognize and resolve deadlocks that occur in the
manufacturing system. The development of the controller commands is motivated by our deadlock
research in the area of discrete simulation systems [7, 33, 34]. The commands capture the evolutionary
and dynamic nature of deadlocks in a manufacturing system, and hence, can be easily integrated in a realtime controller for the purposes of deadlock detection and resolution.
2. Literature Review
Deadlock prevention and avoidance approaches ensure that deadlock will never occur in the flexible
manufacturing cell. Consider the manufacturing cell shown in Figure 1. Here, deadlock occurs when part
p1 resident on machine m1 and part p2 on machine m2, do not relinquish control of their current machines
until the other machine is available for processing. A deadlock avoidance scheme would allow the use of
only one of the equipment, if the other equipment has a part with a conflicting routing [3, 4, 20, 28, 31,
35, 36]. Depending on the relative process times, this can under-utilize the equipment. Further, the
deadlock avoidance problem has been shown to be NP-hard [1, 9]; this implies that one needs to sacrifice
system performance in developing avoidance policies [28].
A deadlock preventive strategy such as uni-directional batching of jobs would restrict the flexibility of the
manufacturing system [35]. Also, a strategy of using sufficient buffer spaces to prevent deadlock would
require an appropriate manufacturing design. Here, with significant material transfer times (compared to
the process times), the system performance can suffer [36]. Clearly, the selection of an appropriate
deadlock handling strategy depends on system requirement. And, no particular deadlock handling
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strategy can satisfy the requirement of all manufacturing systems. In this paper, we present a detection
and resolution methodology for handling deadlocks in manufacturing cells with alternate part-routing.
An instance of where deadlock detection and resolution is appropriate are semiconductor cluster tools.
Deadlocks have been reported in cluster tools by a number of researchers [7, 27, 19]. Cluster tools are
example stand-alone flexible manufacturing cells capable of multiple processing steps that allow a clean
environment and a flexible wafer (part) routing for the wafers [2]. Avoidance is usually not appropriate
due to the expensive nature of cluster tools, and the resulting under-utilization of the associated
equipment under this strategy. Likewise, reasons exist why prevention is not always an option, such as, a
lack of sufficient buffer space. Extra buffer space requires a wafer elevator in the cluster tools, which can
introduce particles in ultra-high vacuum processes and, consequently, reduce product yield [17].
The deadlock detection problem has been studied extensively by previous researchers [4, 5, 7, 13, 14, 15,
20, 23, 22, 24, 29, 32, 33, 34, 35, 36]. Holt [14] formalized the notion of deadlocks in terms of a graph
theoretical model. A directed bipartite graph is used to represent the relationship between customers and
servers. Holt [14] identifies a knot as the sufficient condition for deadlock detection under the single-unit
request conditions. By definition, a vertex v is in a knot if, for every vertex w that is reachable through a
series of directed edges from vertex v, then vertex v is also reachable from vertex w. In this paper, we use
these conditions in developing the deadlock detection model.
We develop the constructs necessary to automate the preparation of the deadlock graph in manufacturing
control systems. Previous deadlock researchers in manufacturing control systems prepare the graph each
time the deadlock scheme is invoked [4, 20, 35, 36], which can be an additional computational burden.
Using an adjacency representation of the deadlock graph, and assuming a O(1) time to insert or delete an
edge or a vertex in a graph, building the deadlock requires O(V+E) time each time a part moves.
However, the constructs designed in this research capture the evolutionary nature of deadlocks and,
thereby, exploit the dynamic evolution of the deadlock graph. By this procedure, we are required to add
or delete a vertex and just the incident and emanating edges each time a part moves. The defined graph-
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theoretic model also facilitates the use of a linear-time algorithm for deadlock detection purposes [6].
Previous deadlock detection algorithms in manufacturing control, without alternate part-routing [4, 20,
35, 36], have been non-linear in the representation of the graph.
An associated problem of detection and resolution is deadlock recovery. The resolution procedure in
computer applications typically chooses a set of customers to be aborted and restarted or partially rolledback in order to break the deadlock [5, 14, 30]. For example, an operating system would resubmit a job
or a database system would abort a set of transactions to be restarted later. In manufacturing control
systems, abortion of parts as a resolution approach does not necessarily reflect the true behavior of the
manufacturing system. This would imply scrapping of the part(s) in deadlock. In a manufacturing
system, an appropriate resolution technique would be to move the deadlocked part from the machine to a
temporary buffer and reallocate the released machine to a waiting part [36].
In this paper, appropriate resolution schemes are presented to handle the identified deadlocks with
alternate part-routings. It is well known that scheduling problems in job-shops, such as flexible
manufacturing cells belong to the class of NP-hard problems [8, 10]. Specifically, we note that resolving
deadlocks optimally is known to be NP-hard; that is, selecting the least-cost set of parts to resolve the
deadlock is a combinatorial problem [11, 21]. With this background, we develop heuristic-based
approaches to resolve deadlocks, and note that performance related issues are beyond the scope of this
paper, requiring further research. We show that a cycle is sufficient to resolve the detected deadlock in
the manufacturing system.
3. Motivation of Approach and Assumptions
For the purposes of describing the deadlock behavior, we are primarily concerned with the part-machine
(PM) relationship which is modeled using a time-dependent graph Gt, for t0. The index t belongs to the
set of non-negative integers that define the events that alter the part-machine relationship (and, hence, the
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PM graph). In this section we describe the evolution of the PM graph leading to deadlock through an
example and the assumptions we make for the flexible manufacturing cell in this study.
3.1 Graph Theory and Notation
A directed graph G=(V,E) has a vertex set V and an edge set E, where (u,v)E means there is an edge
directed from uV to vV. The in-degree of a vertex vV is the number of edges in G such that (u,v)E;
the out-degree of a vertex vV is the number of edges in G such that (v,u)E. A directed edge (u,v)E is
said to be incident on vertex vV and emanate from vertex uV. A vertex vV is called a root vertex
(source) of V, if there is no uV for which (u,v)E; the in-degree of a root vertex is zero. A vertex vV
is called a leaf vertex (sink) of V, if there is no uV such that (v,u)E; the out-degree of a leaf vertex is
zero. A vertex is called an interior vertex if both the in-degree and out-degree are non-zero. An isolated
vertex has both in-degree and out-degree of zero. A directed path is a list of vertices v1, v2, ..., vkV and
edges (v1, v2), (v1, v2), ..., (vk-1, vk)E such that the vertices v1, v2, ..., vkV are distinct. Vertices v1 and vk
are called the origin and terminus, respectively, and v2, ..., vk-1 are called the internal vertices. A cycle,
denoted by C, is a directed path of more than one vertex such that the origin and the terminus are the
same. A directed edge (u,v)E is incident on cycle C, if vertex vC and vertex uC. A directed edge
(u,v)E emanates from cycle C, if vertex uC and vertex vC.
A directed graph G' is a subgraph of G if G'=(V',E'), V'  V and E'  E. Let V'  V, and let G' be
constructed by letting E'  E, where (u,v)E' for all u,vV' and (u,v)E. The subgraph G' is said to be
induced by V'. V' is called a strongly connected component (SCC) if for all vertices u and v V', there is a
directed path in G' connecting u to v, and another path connecting v to u. Let V' be an SCC and G' its
induced subgraph, then V' is said to be a closed strongly connected component (CSCC) if there is no edge
in G directed out of V'. Note that a CSCC is same as a knot as defined in Holt [14].
In the illustrations that follow, we use rectangles to represent machines and circles to represent parts. We
represent the ith part by pi and the jth machine by mj. A machine assignment to a part is depicted with a
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directed edge from the machine to the part (Figure 2a), while a machine request is depicted with a
directed edge from the part to the machine (Figure 2b). We assume that a request for a machine that can
be satisfied changes immediately to an assignment edge. Hence, there is no need to represent a request
from a part to a machine that can be satisfied. In text, we use the notation (p,m) to represent a request to
machine m by part p, and (m,p) to represent an assignment of machine m to part p.
3.2 Example Deadlock
Consider the manufacturing cell shown in Figure 1, with unit-capacity machines m1 and m2, that require a
transfer device for loading and unloading of parts. A possible evolution of deadlock in the manufacturing
system depicted in Figure 1 is presented in Figure 3. In item (a) of this figure, part p1 is being processed
on machine m1 while part p2 is being processed on the machine m2. In item (b), part p2 has finished
processing on machine m2, and requests machine m1, which creates a new edge from p2 to m1. In item (c),
part p1 has finished processing on machine m1 and requests the services of machine m2. This event creates
an edge from to p1 to m2. Since neither part will relinquish the machine that it controls until its respective
request has been granted, the manufacturing system is deadlocked and the two jobs will wait indefinitely.
Furthermore, any other part requesting either of the machines will also wait indefinitely in the
input/output port. The manufacturing system as shown in item (c) is said to be in permanent-deadlock.
Continuing with the above example, suppose there is an additional unit-capacity machine (m3) that is
identical to machine m1 in processing capabilities in the manufacturing cell (Figure 4). And, further let
machine m3 be currently assigned to part p3. This is depicted in the figure by an edge from m3 to p3. Part
p2 can now be processed by either machine m1 or m3. The routing alternative is shown in the figure by
arcs from p2 to m1 and m3. It is conceivable that this deadlock would eventually resolve itself if part p3
finishes processing on machine m3 and leaves the manufacturing system (and p2 is subsequently granted
access to m3 and p1 is granted access to m2). However, it is also possible that the deadlock does not
resolve itself and instead becomes permanent (i.e., p3 requests m1 or m2). We denote this situation as
transient-deadlock. Unlike the permanent-deadlock case, it is not clear whether or not the transient-
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deadlock should be resolved. It might be appropriate to resolve the transient-deadlock by exchanging
machines m1 and m2 between parts p2 and p1, respectively, since this simple exchange can allow processing
to continue. However, if the remaining processing time for part p3 on machine m3 is shorter than the
deadlock resolution time, it might be appropriate to allow the system to continue operation. This simple
example demonstrates the need to balance the effect of competing constraints, such as the waiting period
in transient-deadlock, differing capabilities of the alternate machines, the duration of the resolution
procedure, and the consequent time penalty incurred by the parts involved in the deadlock. In this paper,
we propose a heuristic-based approach to resolve the different categories of deadlocks.
A transition diagram of the deadlock states is shown in Figure 5. The vertices in the figure represent
possible deadlock states in the natural evolution of a manufacturing system and the edges define feasible
state transitions. Initially, the manufacturing system starts in a deadlock-free state and can move through
the different deadlock states as machine requests and assignments are made. Since the transient-deadlock
state is self-resolvable, these deadlocks may disappear by natural events without external intervention.
Note that once the manufacturing system enters the permanent-deadlock state, external intervention is
required for the deadlocked machines and parts to be freed.
3.3 Manufacturing Assumptions
The FMC that we employ in the study consists of a number of machines attended by a single-partcapacity material handling device, such as a robot or an automated guided vehicle. Also, there are a
number of finite-capacity direct-access buffer spaces where the parts are held. One buffer space is always
“reserved” to resolve deadlocks that may occur, and no empty machine is used as a buffer space for
resolution purposes [4, 22, 35, 36]. It should be noted that after a part finishes processing on the current
machine, then if the subsequent machine is unavailable, the part can either be transferred to a buffer space
or wait on the current machine, depending on the control policy.
We assume that each part has one or more potential process sequences. The routing is not predetermined
but, instead, is determined by the controller at the time a part finishes the current process and requests for
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the next machine. Each machine can accommodate a single part at a time and there is no preemption. We
assume that each part requires a single machine to complete processing at any step. Thus, even though
there could be alternate machines that can perform the processing at a particular step, a machine has to be
selected at the beginning of each processing step before the part is loaded. We assume that the MHD
does not pick up a part from the current position unless there is a position available at the destination.
This restriction is to avoid trivial deadlocks, wherein, a MHD has a part that needs to be loaded onto a
machine which already has a part that needs to be unloaded.
4. Graph Preparation
We introduce two controller commands that are used to update the PM graph as parts obtain and free
machines and buffer space. These commands are capture and relinquish. The primary motivation to
develop these commands is to algorithmically encapsulate the controller directives required to
automatically detect and resolve deadlocks in a manufacturing cell. The controller executes a capture
command every time a part requests a machine or a buffer space. Likewise, the controller executes a
relinquish command when a part frees a machine or buffer space. In the case of alternate part routings,
we assume that the controller makes the appropriate part/machine selection before executing the part
movement. The deadlock scheme developed in this research does not depend on how these part/machine
selections are made. We note that the proposed scheme assumes that the controller can uniquely identify
the individual parts, machines, and buffer spaces in the FMC.
We represent the PM relationship by the directed bipartite graph Gt = (Vt, Et), for t0. The PM graph
changes configuration only at the instant a capture or relinquish command is executed. We take the
convention that this process is right continuous, that is, Gt denotes the PM graph after the execution of the
command. The vertex set contains all the machines and buffer spaces of the system as well those parts
resident on a machine/buffer space at t. Beginning with the configuration G0, where V0 is the set of all
machines and E0 is empty, Gt changes over time due to the execution of a series of capture and
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relinquish commands in the controller. Note that any part in the system necessarily owns a machine or a
buffer space, and that idle machines or empty buffer spaces are represented as isolated vertices.
It is assumed that the request of a part p is for any one of the machines mM, where M denotes the set of
requested machines. Implicitly included in the set M is the buffer. Note that the machines mM
determine the alternatives for a particular process, and this might differ depending on the part type and the
particular processing step. In the descriptions that follow we use the commands insert and delete to
modify arbitrary lists of objects. The insert command places a specified element in the list. The delete
command removes and destroys a specified element from the list. Also, we use QUEUEt[m] to represent
the set of parts in the queue at machine m. The notation BUSYt[m] is a Boolean variable indicating
whether machine m is currently occupied. We drop the index (t) wherever appropriate.
Figure 6 defines the capture command. Lines 1-2 add part p to the vertex set if part p currently owns no
machine. Lines 3-9 check to see if any machine mM is available to accommodate the request by part p.
If so, part p is added to the PM graph with edge (m,p). Otherwise, part p is added with an edge (p,m) for
each mM. Note that the capture command does not introduce a request edge from part p to buffer b if a
buffer space is not available. The significance of this requirement will become clear as deadlock
resolution is presented in Section 6.
Figure 7 defines the operation of the relinquish command. Lines 1-2 remove the assignment edge (m,p)
from the PM graph and update the busy state of machine m. Lines 3-5 update the PM graph when part p
leaves the system. Here Ms defines the set of machines required for the subsequent operation. The
designation “output port” in line 3 (Figure 7) indicates that the (completed) part leaves the manufacturing
cell. Lines 6-12 assign the next part waiting for the machine. Here, the function select (line 7) chooses
the appropriate part from all those waiting for the machine depending on the operational rule of the
machine.
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We can thus completely describe the dynamic behavior of the PM graph by appropriately updating Gt
after the execution of each capture or relinquish command. The sequence of capture and relinquish
command executions is determined by the part-routing of the parts processed by the FMC. We next
present the conditions necessary for the various forms of deadlock to exist based on the conditions of the
PM graph Gt.
5. Deadlock Detection
Beginning with G0, which is free from deadlock we track the evolution of the PM graph. The existence
of an SCC in the PM graph Gt implies that a deadlock is present. If there is a directed path from the SCC
leading to a sink vertex, then the situation is termed to be in transient-deadlock. It should be noted that,
since a machine request that can be satisfied changes immediately to an assignment edge, any sink vertex
in the PM graph is necessarily a part vertex. At time t, a sink vertex is necessarily a part vertex that is not
waiting for any machine and, consequently, can free the machine in its possession. Thus, a directed path
to a sink vertex in the PM graph represents a potential sequence of executions (of the relinquish
command) that could eventually satisfy the machine requests of all the parts in the SCC. If the SCC is
closed, then the deadlock situation is termed permanent. Here, every part in the CSCC is waiting for a
request within the CSCC. Therefore, there is no potential for any part in the CSCC to free a machine.
We use the following definitions to detect deadlock.
Definition 1 (Permanent-Deadlock): A PM graph is said to be in permanent-deadlock at any t>0 if the
graph contains a CSCC.
Definition 2 (Transient-Deadlock): A PM graph is said to be in transient-deadlock at any t>0 if the graph
contains an SCC, but no CSCC.
Definition 3 (Deadlock-free): A PM graph is said to be deadlock-free if there does not exist an SCC in the
graph.
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We check for the existence of a CSCC in the PM graph. If such a closed component is discovered, we
know that the PM graph is in permanent-deadlock. On the other hand, if we find an SCC that is not
closed we know that the PM graph is in transient-deadlock. We use the depth-first search based algorithm
adapted from the work of Deuermeyer and Friesen [6], developed to classify states of a finite Markov
chain. The algorithm runs in linear-time of the maximum of the number of edges and vertices in the
graph (O(max |V|, |E|)).
6. Recovery from Deadlocks
We suggest two alternate control policies to resolve deadlocks in an FMC. Clearly, if a permanentdeadlock occurs in an FMC, then it should be resolved. In the case of transient-deadlock, parts in
deadlock may needlessly wait for a machine for which they may or may not ever obtain access.
Consequently, the deadlocked parts can incur a time penalty if the transient-deadlock is not resolved. In
order to decide whether to resolve transient-deadlocks, or allow them to possibly evolve to a permanentdeadlock, one needs to balance a number of competing issues. Some of these issues were described in the
example transient-deadlock in Section 3. Such considerations seem to depend on the part-routing
complexity (including all future part-routings, as in deadlock avoidance) and the configuration of the
manufacturing system. These considerations are system dependent and can not be easily generalized. We
note that both the least-cost deadlock avoidance problem [1, 9] and the deadlock resolution problem [11,
21] have been shown to be NP-hard. In view of the above discussion, we suggest two heuristic
approaches to resolve deadlocks: (1) either resolve only permanent-deadlocks or (2) resolve both
permanent and transient-deadlocks, as and when they occur (i.e., continuously).
Working under either of the two control alternatives, we need to identify the closure of an SCC or the
creation of a new SCC (or CSCC). A successful machine request at a capture command necessarily
creates a new sink vertex in the PM graph, and hence does not create an SCC (or CSCC). Further, the
execution of a relinquish command also cannot create a CSCC if we continuously detect and resolve
permanent-deadlocks. By the same rationale, we do not need to check for the creation of an SCC after the
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execution of a relinquish command if we continuously detect and resolve both permanent and transientdeadlocks. Therefore, it is sufficient to invoke the detection scheme after every unsuccessful machine
request under either of the above control policies. The enhanced definition of the capture command
incorporating the deadlock invocation is shown in Figure 8 (line 9-10).
6.1 Preliminaries
Our intent, under either of the two control alternatives, is to resolve deadlock the instant it is discovered.
This guarantees that the PM graph contains a single deadlocked component at the execution of each
capture command. We work under the premise that as the resolution process begins, the controller
assigns the MHD to resolving the deadlock before redirecting it for any other kind of part movement. We
note that as soon as a deadlock is detected in the capture command, the controller precludes the
execution of any other capture or relinquish commands until the completion of the resolution process.
Essentially, the resolution procedure consists of a set of deadlocked parts exchanging their machines so as
to be able to continue processing. We begin with an explanation of the resolution procedure using a
cycle. In the following section, we will demonstrate that it is sufficient for parts in an arbitrary cycle in
the deadlocked component (SCC or CSCC) to exchange their machines. This will eliminate deadlock in
the general PM graph under either of the two manufacturing control policies.
Let C be a deadlocked cycle in the PM graph. Let m1, p1, m2, p2, ..., mk, pk be the list of vertices in cycle
C, and (m1, p1), (p1, m2), ..., (mk, pk), (pk, m1)E be the list of edges in cycle C. The result of the parts in
cycle C exchanging control of their machines is to delete edges (m1, p1), (p1, m2), ..., (mk, pk), (pk, m1), and
introduce edges (m2, p1), (m3, p2), ..., (m1, pk) in the PM graph. This mechanism clearly resolves the
deadlock since each part vertex p1, p2, ..., pk is now a sink vertex, thereby destroying cycle C. And so, as
parts p1, p2, ..., pk-1, pk gain access to machines m2, m3, ..., mk, m1, respectively, and they can begin
processing. This is assured by construction as each vertex m in the resolved cycle C is necessarily a
machine vertex, since no buffer-request edges were introduced by the controller (line 7, Figure 6). For
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example, in the case of the deadlock shown in Figure 1, parts p1 and p2 exchange the control of machines
m1 and m2 using a “reserved” buffer space to effect resolution.
Before proceeding further, notice that if request edges were introduced to the buffer, then it would be
possible that the resolution scheme may not be able to resolve the deadlock completely. For example,
consider the deadlock situation shown in Figure 9a. Here, b refers to a unit-capacity buffer space that is
currently occupied by part p3. Note that an additional unit of buffer space, which is not shown in the
figure, is assumed to be available for resolution purposes. Parts p1 and p2 are currently resident on
machines m1 and m2, respectively. The deadlock situation is created by the introduction of the edge (p1,
m2) in the PM graph, that creates three alternate cycles for resolution purposes. The deadlocked cycles
are: (1) (p1, m2), (m2, p2), (p2, m1), (m1, p1); (2) (p1, b), (b, p3), (p3, m1),(m1, p1); and (3) (p1, m2), (m2, p2),
(p2, b), (b, p3), (p3, m1), (m1, p1).
Clearly, only the first cycle resolves the deadlock without re-introducing a new deadlock. To see this,
suppose the cycle chosen for deadlock resolution is: (p1, b), (b, p3), (p3, m1),(m1, p1). The result of the
resolution causes the deletion of the edges (p1, b), (b, p3), (p3, m1),(m1, p1) from the PM graph, but reintroduces the edges (p1, m2), (m2, p2), (p2, b), (b, p1) in the PM graph. This creates a new deadlock by
creating the cycle (p1, m2), (m2, p2), (p2, b), (b, p1). The result of this resolution is shown in Figure 9b. At
the conclusion of resolution, the part (for example, part p1 above) moved to the a buffer space, unlike the
one on a machine, re-introduces the original machine-request edges into the PM graph, except now the
source vertex of the request edge is the buffer space. Realize that addition of the request edges can create
a SCC and, consequently, a deadlock.
6.2 Deadlock Resolution
To effect resolution in the PM graph we choose a cycle in the deadlocked component (CSCC or SCC).
Consequent to resolution the request and assignment edges of parts (q) in cycle C are deleted from the PM
graph. And new assignment edges are introduced in the PM graph corresponding to the new machine
assignments after the resolution. We need to show that this procedure is sufficient to destroy the deadlock
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component and, hence, the deadlock in the PM graph. In the rest of this section, we use p to denote the
part that initiated and detected the deadlock, and q to denote all parts (including p, depending if pC) in
cycle C, i.e., qC.
Realize that during a machine request more than one edge can be introduced into the graph by part p, as
depicted in lines 7-8 of function capture (Figure 6). This can introduce more than one edge in the PM
graph and, consequently, can create an SCC with multiple cycles in the PM graph. However, by
construction and by the assumption of continuous detection and resolution, the SCC (or CSCC)
discovered with part p is necessarily the deadlocked component.
If the control policy is to detect and resolve just permanent-deadlocks, we are guaranteed that there exists
only a single CSCC. Note that the PM graph may contain a number of SCCs, but no other CSCC. If we
detect and resolve both permanent and transient-deadlocks, by the same rationale, we are assured that
there exists a single SCC. Since, the PM graph previous to this detection invocation is free from
deadlocks and, consequently, any other SCCs. We next identify a cycle C in the deadlocked component
(CSCC or SCC) and resolve the cycle to break the deadlock. By the definition of a CSCC (or SCC), we
are always assured of finding a cycle in the CSCC (or SCC) that created the deadlock.
6.2.1 Resolve just Permanent-Deadlocks
If the control policy is to continuously detect and resolve just permanent-deadlocks, then we pick a
deadlocked cycle C in the CSCC. Note that depending on the choice of cycle C, part p may or may not be
in cycle C. We utilize the fact that edges that emanate from and are incident on cycle C are necessarily
machine requests. This fact is established in the following lemmas. Note the resolution procedure deletes
the machine requests that emanate from cycle C, and new edges that are introduced into the graph are
necessarily assignment edges.
Lemma 1: Let (u,v)Et, where uvVt at instant t>0 in the PM graph Gt. Assume there is an SCC in Gt
such that uSCC and vSCC. Then u is a part vertex and v is a machine vertex in Gt.
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Proof: Follows from the fact that the out-degree of a machine vertex is unity.
Lemma 2: Let (u,v)Et, where uvVt at instant t>0 in the PM graph Gt. Assume there is an SCC in Gt
such that uSCC and vSCC. Then u is a part vertex and v is a machine vertex in Gt.
Proof: Follows from the fact that the in-degree of a part vertex is unity.
The exchange of machines held by each part q in cycle C will creates a new set of sink vertices (part
vertices). By Lemma 2 we are assured that edges that are incident on cycle C are request edges by parts
that are not contained in the cycle and, therefore, are not destroyed. Likewise, the only edges that are
deleted are request edges that emanate from the vertices in cycle C (Lemma 1). By the definition of a
CSCC, any vertex in the CSCC that is not resident on the resolved cycle C should have a path leading to
some vertex in cycle C. This is true since only the (q, m) edges that emanate from cycle C are deleted
(Lemma 1), and no (q, m) edge incident on cycle C are deleted (Lemma 2). Thus we are assured that after
the exchange mechanism every vertex in the CSCC has a path leading to a sink vertex and, hence, no new
CSCC is created by the exchange. By the assumption of continuous detection and resolution, the PM
graph contains no CSCC at the conclusion the resolution procedure.
6.2.2 Resolve both Permanent and Transient-Deadlocks
If the control policy is to continuously detect and resolve of both permanent and transient-deadlocks, once
again we choose a cycle in the SCC. By continuous detection and resolution we know that the SCC
created is the only SCC in the PM graph. Since, part p created the SCC, then we see that part p is
contained in every cycle of the newly created SCC. This fact is established in Lemma 3.
Lemma 3: Let Gs and Gt be the manufacturing system PM graph at instants s>0 and t>0, respectively,
such that s<t. Also, let (p,m)Es and (p,m)Et for each mM, such that Es  (p,m)Et. If Gs is not in
deadlock (permanent or transient) and Gt is in deadlock (permanent or transient) then part p is contained
in every cycle in the PM graph Gt.
Proof: If p is not contained in every cycle in the SCC in Gt, then Gs contains an SCC (a contradiction).
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The resolution procedure consists of identifying a cycle C, and exchanging the machines held by parts in
C. We can see that executing the exchange mechanism on any cycle will remove all the cycles in the
SCC. This is true because part p is contained in every cycle in the PM graph (Lemma 3), and the result of
the exchange mechanism will delete all (p, m) edges for all mM in the PM graph, thus making part p a
sink vertex. Also, realize that each part q in the deadlock cycle C is now a sink vertex, consequent to the
exchange process. Since, part p is contained in every cycle in the SCC (Lemma 3) and all the newly
added assignment edges lead to a sink vertex, the resolution scheme destroys all cycles and thereby the
SCC in the PM graph, and hence, any deadlock.
6.3 Resolution Implementation
Based on the discussion above, exchanging the parts and machines in cycle C would clear the deadlock in
the PM graph. Here, CSCC (or CSCC) is an arbitrary cycle in the deadlocked component (CSCC or
SCC) in the PM graph. As each part q in cycle C is moved by the controller from the current machine in
cycle C (maC), the incident and emanating edges of part q are deleted (Figure 10, Lines 1-3). Line 4
assigns to part q, the requested machine in cycle C (mrC). In our implementation, we adapt the breadthfirst search based algorithm developed by Itai and Rodeh [16] to choose the deadlocked cycle C in the
deadlocked component (SCC or CSCC). The algorithm identifies the parts and machines in the chosen
cycle C that are to be exchanged during resolution. The algorithm runs in linear-time in the adjacency-list
representation of the graph (O(|E|)).
7. Experiments and Performance
The deadlock detection and resolution scheme developed in this research was implemented in software
for experimentation purposes. A simulation model in SIMAN [26] is developed to mimic the workings of
an FMC. The deadlock handling procedures developed in this research is implemented in the C
programming language, which interacts with the SIMAN simulation model to detect and resolve
deadlocks in the FMC.
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Two approaches have been developed to resolve manufacturing system deadlocks: either resolve
permanent-deadlocks or resolve both permanent and transient-deadlocks. Venkatesh [32] describes fully
the set of experiments that are developed to compare the performance of the two proposed deadlock
control strategies with a conventional method of deadlock handling. In the conventional mode of control,
deadlock is prevented by providing sufficient buffer space in the FMC. Here, if the machine for the next
processing step is not available, there is always a buffer space available to move the part. Consequently,
deadlock is always prevented in the conventional mode of control. In the case of detection and resolution
no buffer space, other than the “reserve” space, is available in the FMC. Parts after processing remain on
the current machine until the subsequent machine is available. In this section we present a summary of
the experimental results.
We experiment using two manufacturing cell configurations: a 3-machine system and a 5-machine
system. The performance of the FMC under the three different control alternatives is measured using
makespan of the system in question. Preliminary experiments indicate that there is a difference in the
performance of the FMC with varied material transfer times under different control policies. The
experiments were designed to test if there is a significant difference in the performance of the FMC under
the three control alternatives with varying travel times. To accomplish this, a two-factor factorial
arrangement of treatments in a completely randomized experimental design is used. The two factors in
the experiment design are the control alternative and the material transfer time.
For experimentation purposes, we choose a cycle that passes through the part that created the deadlock.
We assume that all the machines (mM) in the set of alternatives (M) for a particular processing step for a
part to be of identical capability. Also, we assume that the travel times between the different machines
and the buffer spaces are identical for simplicity. We note that the experimental parameters are primarily
motivated by the workings of a radial semiconductor cluster tool. A radial cluster tool consists of a
number of processing modules (machines) that are arranged at about equi-distance from each other,
around a centrally placed MHD [2].
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Process times in the experiments are randomly generated based on sample processing times in a cluster
tool. The material transfer times are derived as a percent of the average of the overall process times.
Four levels of material transfer times are used in the experimentation that are equally distributed between
0 and 100 percent. Part-routing is randomly generated. A total of 1200 replications were executed over
all the different treatment combinations in the experiment design. Each replicate is a terminating
simulation that is required to process 24 parts, a typical batch of wafers.
7.1 Experimental Results
The experimental data was analyzed using the analysis of variance technique. The purpose of the analysis
was to identify the effect due to the different control alternatives with varying transfer times on
makespan. This analysis was performed separately for the 3-machine and the 5-machine systems.
Figures 11 and 12 show the relative difference in the makespan compared to the conventional method of
control for the 3-machine system and the 5-machine system, respectively. The relative difference is
calculated by dividing the difference in the makespan by the makespan due to conventional control, to
normalize the difference. Each observation denotes the average makespan over 5 randomly generated
part-routing configurations.
Based on the experiments, it was noticed that there is an increase in makespan with increased transfer
times. In the case of the conventional method of control, the increase in the makespan is larger when
compared to the two deadlock control strategies. This is because, in the case of conventional control, the
material transfers are more frequent and, therefore, with increased transfer times, makespan tends to
worsen compared to the two deadlock handling schemes. By the same rationale, at low transfer times,
conventional control tends to perform at least as good as the two deadlock control strategies. This is
because under low transfer times, frequent material transfers are no longer penalized and, consequently,
conventional control does not perform any worse than the two deadlock control strategies. In fact, at zero
transfer times, conventional control performed at least as good as the two deadlock handling schemes.
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This is true of both the 3-machine and the 5-machine systems. Yang [36] shows similar experimental
results without alternate part-routings in FMCs.
Further analysis was conducted to identify if there is a significant difference in the various control
strategies at a particular material transfer level. Assuming the mean square of errors from the ANOVA
table as the best estimate of the error of variance, the following comparison tests were conducted:
Duncan’s multiple range test, the least significant difference method, and the Tukey’s test, all at  = 0.05
significance level was conducted [25]. The null hypothesis of no significant difference between two
average response was rejected only if all of the above tests indicated that there exists a significant in the
two average responses.
It was also noticed that, in both the 3-machine and the 5-machine systems, there is significant interaction
between the two main factors. In the case of the 3-machine system, there was no significant difference
between the three control strategies up to the 33% transfer level. As the transfer times increased beyond
the 33% transfer level makespan worsened. However, the response under conventional control was
significantly worse beginning at the 66% transfer level. No significant difference was detected between
the two proposed deadlock control strategies in the 3-machine system at any transfer level.
In the case of the 5-machine system at zero transfer times, it was found that both conventional control and
the strategy of resolving both permanent and transient-deadlocks performed better than resolving only
permanent-deadlocks. There was no significant difference detected between conventional control and the
strategy of resolving both permanent and transient-deadlocks. Here, we believe that the reason for the
better performance while resolving both permanent and transient-deadlocks (or, for that matter, by using
conventional control) is the following. Obviously, there is a trade-off between the time a part waits for
the next machine by either resolving or not-resolving the transient-deadlock. This depends on a number
of factors, such as: (1) the time it takes for the transient-deadlock to resolve itself, or (2) the time it takes
to resolve the transient-deadlock by deliberate external intervention, or (3) the time it takes for the
transient-deadlock to evolve to a permanent-deadlock and the consequent resolution of the permanent-
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deadlock. The processing times of the parts involved in the deadlock and the material transfer times
affect this. At very low transfer times, when frequent transfers are not penalized, this wait is dominated
by the processing times of the parts on the machines. Therefore, it is not surprising that resolving both
permanent and transient-deadlocks yield better response than just resolving permanent-deadlock. A
possible reason why there was no such significant difference was identified in the case of the 3-machine
system, maybe due to the relatively smaller size and, consequent, lower part-routing complexity of the 3machine deadlock graph.
In the case of the 5-machine system, as with the 3-machine system makespan increased with increased
transfer times. Once again, the performance of the manufacturing cell was far worse under conventional
control, when compared to the two proposed deadlock control strategies as transfer times increased.
Makespan under conventional control was significantly worse beginning at the 33% transfer level. It was
also detected that the strategy of resolving both permanent and transient-deadlocks performed
significantly worse than resolving just permanent-deadlock at the 100% transfer level. As before, this is
because of a trade-off between the transfer times and the process times. The number of material transfers
under the strategy of resolving both permanent and transient-deadlocks is higher than the number of
transfers when resolving only permanent-deadlock. At the 100% transfer level, this trade-off is
dominated by the transfer times, when detecting and resolving only permanent-deadlocks is more
advantageous. However, even at the 100% transfer level the makespan by resolving both permanent and
transient-deadlock makespan is significantly lower, compared with the makespan due to the conventional
mode of control.
8. Conclusions
Deadlock detection and resolution can be performed automatically by providing the controller in an FMC
with proper data structures and algorithms. In this paper, we develop a deadlock handling procedure that
allows for flexible part-routing in a manufacturing cell. We proposed two controller commands called
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capture and relinquish that can dynamically generate the deadlock graph. The proposed deadlock
handling scheme uses this graph to detect and resolve deadlocks.
We recognize permanent and transient-deadlocks in manufacturing cells. Two heuristic approaches were
proposed to resolve deadlocks: (1) resolve permanent-deadlocks and (2) resolve both permanent and
transient-deadlocks. In both cases, it was shown that it is sufficient to resolve any cycle in a deadlock
component by exchanging the parts with the requested machines in the cycle. This is physically
accomplished using a buffer that is used exclusively for the purposes of the deadlock resolution. A lineartime scheme to detect [6] and resolve [16] the identified deadlocks is also presented.
Based on the experiments, it can be seen that there is a significant interplay between the transfer times
and the process times in the FMC. The dominance of one, or the other, factor can affect the performance
of the FMC and, consequently, the choice of the deadlock control strategy. At low transfer times,
compared to the process times, it is appropriate to select a conventional method as the mode of control if
sufficient buffer space is available. However, if there no buffer space is available (except for at least a
solitary buffer space to resolve any deadlocks), then resolving both permanent and transient-deadlocks is
appropriate. In case the transfer times are significantly larger compared to the process times, it is more
appropriate to resolve deadlocks than to resort to the conventional mode of control.
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9. References
[1]
Araki, T., Y. Sugiyama, and T. Kasami, 1977, Complexity of the Deadlock Avoidance Problem,
2nd IBM Symposium on Mathematical Foundations of Computer Science, Tokyo, Japan, 229-257.
[2]
Bader, M. E., R. P. Hall, and G. Strasser, 1990, Integrated Processing Equipment, Solid State
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[3]
Banaszak, Z. A., and B. H. Krogh, 1990, Deadlock Avoidance in Flexible Manufacturing Systems
in Concurrently Competing Process Flows, IEEE Transactions on Robotics and Automation 6:6,
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[4]
Cho, H., T. K. Kumaran, and R. A. Wysk, 1995, Graph-Theoretic Deadlock Detection and
Resolution for Flexible Manufacturing Systems, IEEE Transactions on Robotics and Automation
11:3, 413-421.
[5]
Coffman, E. G., M. J. Elphick, and A. Shoshani, 1971, System Deadlocks, ACM Computing
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[6]
Deuermeyer, B. L., and D. K. Friesen, 1984, A Linear Time Algorithm for Classifying the states of
a Finite Markov Chain, Operations Research Letters 2:6, 297-301.
[7]
Deuermeyer, B. L., G. L. Curry, A. D. Duchowski, and S. Venkatesh, 1997, An Integrated
Approach to Deadlock Detection and Resolution in Discrete Simulation Systems, INFORMS
Journal on Computing 9:2, 195-203.
[8]
Garey, M., and D. Johnson, 1979, Computers and Intractability, W. H. Freeman and Company,
New York.
[9]
Gold, E., M., 1978, Deadlock Prediction: Easy and Difficult Cases, SIAM Journal of Computing
7:3, 320-336.
[10] Graves, S. C., 1981, A Review of Production Scheduling, Operations Research 29:4, 646-675.
[11] Gray, J. N., 1979, Notes on Database Operating Systems, in Operating Systems: An Advanced
Course, Lecture Notes in Computer Science 60, R. Bayer, R.M. Graham, and G. Seegmuller (eds.),
Springer-Verlag, New York.
[12] Habermann, A. N., 1969, “Prevention of System Deadlocks, Communications of the ACM 12:7,
373-377.
[13] Holt, R. C., 1971, Comments on Prevention of System Deadlock, Communications of the ACM
14:1, 36-38.
[14] Holt, R. C., 1972, Some Deadlock Properties of Computer Systems, ACM Computing Surveys 4:3,
179-196.
[15] Howard, J. H., 1973, Mixed Solutions for the Deadlock Problem, Communications of the ACM
16:7, 427-435.
[16] Itai, A., and M. Rodeh, 1977, Finding a Minimum Circuit in a Graph, Proceedings of the Ninth
Annual ACM Symposium on Theory of Computing, Boulder, Colorado, May, 1-10.
[17] Korczynski, E., 1996, Design Challenges in Vacuum Robotics, Solid State Technology 39:10, 6270.
[18] Knapp, E., 1987, Deadlock Detection in Distributed Databases, ACM Computing Surveys 19:4,
303-328.
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[19] Krishnaswamy, S., and N. Ghiya, 1993, Design Optimization of Spin Apply Clusters using
Simulation at the Packaging Plant in IBM, East Fishkill, New York, SEMATECH 7th Operational
Modeling Workshop, Austin, Texas, May.
[20] Kumaran, T., W. Chang, H. Cho, and R. Wysk, 1994, A structured Approach to Deadlock
Detection, Avoidance, and Resolution in Flexible Manufacturing System, International Journal of
Production Research 32:10, 2361-2379.
[21] Leung, J. Y. -T., and E. K. Lai, 1979, On a Minimal Cost Recovery from System Deadlocks, IEEE
Transactions on Computing 28:9, 671-677.
[22] Leung, Y. T., and G. Sheen, 1993, Resolving Deadlocks in Flexible Manufacturing Cells, Journal
of Manufacturing Systems 12:4, 291-304.
[23] Natarajan, N., 1986, A Distributed Deadlock Scheme for Detecting Communication Deadlock,
IEEE Transactions on Software Engineering 12:4, 531-537.
[24] Obermark, R., 1980, Deadlock Detection for All Resource Classes, Research Report RJ 2955, IBM
Research Laboratory, San Jose, California.
[25] Montgomery, D. C., 1984, Design and Analysis of Experiments, 2ed, John-Wiley, New York.
[26] Pegden, C. D., R. E. Shannon, and R. P. Sadowski, 1995, Introduction to Simulation Using SIMAN,
McGraw-Hill, New York.
[27] Pierce, N. G., and M. J. Drevna, 1992, Development of Generic Simulation Models to Evaluate
Wafer Fabrication Cluster tools, Proceedings of the 1992 Winter Simulation Conference, Arlington,
Virginia, December, 874-878.
[28] Reveliotis, S. A., and P. M. Ferreira, 1996, Deadlock Avoidance Policies in Automated
Manufacturing Cells, IEEE Transactions on Robotics and Automation 12:5, 1-13.
[29] Shoshani, A., and E. G. Coffman, 1970, Prevention, Detection, and Recovery from System
Deadlocks, Proceedings of the Fourth Annual Princeton Conference on Information Sciences and
Systems, Princeton, New Jersey, March, 355-360.
[30] Singhal, M., 1989, Deadlock Detection in Distributed System, IEEE Computer 22:12, 37-48.
[31] Viswanadham, N., Y. Narahari, and T. L. Johnson, 1990, Deadlock Prevention and Deadlock
Avoidance in Flexible Manufacturing Systems Using Petri Net Models, IEEE Transactions on
Robotics and Automation 6:6, 713-723.
[32] Venkatesh, S., 1996, Deadlock Detection and Resolution of Discrete Simulation Systems and
Flexible Manufacturing Cells, Unpublished Doctoral Dissertation, Texas A&M University, College
Station, Texas.
[33] Venkatesh, S., J. Smith, B. L. Deuermeyer, and G. L. Curry, 1994, Deadlock Properties in Discrete
Simulation Systems, Proceedings of the 1994 IEEE International Conference on Robotics and
Automation, San Diego, California, May, 2563-2568.
[34] Venkatesh, S., J. Smith, B. L. Deuermeyer, and G. L. Curry, 1997, Deadlock Detection and
Resolution for Discrete Simulation Systems: Multiple-Unit Seizes, Forthcoming in IIE
Transactions.
[35] Wysk, R. A., N. S. Yang, and S. Joshi, 1991, Detection of Deadlocks in Flexible Manufacturing
Systems, IEEE Transactions on Robotics and Automation 7:6, 853-859.
[36] Yang, N. S., 1989, Resolution of System Deadlocks in the Real-time Control of Flexible
Manufacturing Systems, Unpublished Doctoral Dissertation, Pennsylvania State University, State
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10. Figures
p1
LEGEND
p2
*
m2
m1
*
*
*
*
I/O
p1, p2 - parts
m1, m2 - machines
I/O - input/output port
m1 to m2 - routing for part p1
m2 to m1 - routing for part p2
Figure 1. An example manufacturing cell.
p
(a)
m
m
: part
p
machine m
assigned to part p
(b)
p
: machine
m
part p waiting
for machine m
Figure 2. Part-machine relationship scheme - (a) assignment edge, (b) request edge.
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(a)
m2
p2
m
1
p1
(b)
m2
p2
m
1
p1
(c)
m2
m
1
p1
p2
Figure 3. Evolution of a deadlock in a manufacturing cell.
m2
p2
m3
p3
m1
p1
Figure 4. An example transient-deadlock in a manufacturing cell.
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Deadlock
Free
TransientDeadlock
PermanentDeadlock
Deadlock
Free State
Self-resolvable
Deadlock State
Nonself-resolvable
Deadlock State
Figure 5. Transition diagram of deadlock states.
capture(p,M) - Part p requests a machine m from the set of alternate machines M.
Assume (V,E) is the state of the PM graph upon entry. V and E are modified.
1.
2.
3.
4.
5.
6.
7.
8.
9.
if p V then
insert(V,p);
if  mM such that BUSY[m] is false then
insert(E,(m,p));
BUSY[m] = true;
else
for all mM such that m is not “buffer space” then
insert(E,(p,m));
endif
Figure 6. The capture command logic.
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relinquish(p,m) - Part p frees the current machine m is resident on. Assume (V,E)
is the state of the PM graph upon entry. V and E are modified.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
delete(E,(m,p));
BUSY[m] = false;
if Ms is “output port” then
delete(V,p);
endif
if QUEUE[m]   then
p = select(QUEUE[m]);
for all m such that (p,m)Et then
delete(E,( p,m));
insert(E,( m, p));
BUSY[m] = true;
endif
Figure 7. The relinquish command logic.
capture(p,M) - Part p requests a machine m from the set of alternate machines M.
Assume (V,E) is the state of the PM graph upon entry. V and E are modified.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
if p V then
insert(V,p);
if  mM such that BUSY[m] is false then
insert(E,(m,p));
BUSY[m] = true;
else
for all mM such that m is not “buffer space” then
insert(E,(p,m));
if deadlock(m) is true then
“Deadlock Detected”
endif
Figure 8. Enhanced capture command, with provision for deadlock detection.
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p3
p1
b
b
m1
m1
p2
p1
p2
p3
m2
(a)
m2
(b)
Figure 9. Example resolution including buffer space in an FMC.
update-part-PM-graph (qC) - for each deadlocked part q in the cycle C is currently resident
on machine maC, and is assigned machine mrC consequent to the resolution.
1. delete(E,(ma,q));
2. for all m such that (q,m)E then
3.
delete(E,(q,m));
4. insert(E,(mr, q));
Figure 10. Action of the resolution procedure on each individual deadlocked part.
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Percent difference
10
5
0
0
0.33
0.66
1
-5
R. Permanent
R. Both
-10
-15
Material transfer time/Average process time
Figure 11. Relative difference in makespan for the 3-machine system.
Percent difference
20
15
10
R. Permanent
R. Both
5
0
-5 0
0.33
0.66
1
-10
-15
Material transfer time/Average processing time
Figure 12. Relative difference in makespan for the 5-machine system.
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