CPSC 462 – Lab Manual
Microprocessor System Design
Using Coldfire Embedded Processor
Adapted By: Randy Jedlicka, Drew Larson, Josh Hudgins
Written By: Marshall Belew, Delilah Dabbs, Terry Dahlke
 2001 CPSC 483 - 501 Team 7
Table of Contents
LAB 1: INTRODUCTION TO THE COLDFIRE DEVELOPMENT ENVIRONMENT ................................... 1
1.1
1.2
1.3
1.4
1.5
OBJECTIVE...................................................................................................................................................... 1
INTRODUCTION ............................................................................................................................................... 1
DETAILS OF THE BLOCK DIAGRAM ................................................................................................................. 1
MONITOR/DEBUG SOFTWARE......................................................................................................................... 5
SETTING UP THE TERMINAL AND THE BOARD ................................................................................................. 9
1.5.1
Setup the Coldfire board ........................................................................................................................ 9
1.5.2
Setup the Terminal ................................................................................................................................. 9
1.5.3
Logging Output to a File ...................................................................................................................... 10
1.5.4
Transferring a file from the PC to the MCF5206eLITE ...................................................................... 10
1.6
PROCEDURE .................................................................................................................................................. 11
1.7
ASSIGNMENT ................................................................................................................................................ 13
LAB 2: ASSEMBLY PROGRAMMING ON THE MCF5206ELITE BOARD .................................................. 14
2.1
2.2
OBJECTIVE.................................................................................................................................................... 14
INTRODUCTION ............................................................................................................................................. 14
2.2.1
Assembly Commands .......................................................................................................................... 15
2.2.2
Writing a Program ............................................................................................................................... 16
2.2.3
Defining Constants .............................................................................................................................. 17
2.2.4
System Calls ........................................................................................................................................ 17
2.2.5
Assembling the Program ...................................................................................................................... 18
2.3
ASSIGNMENT ................................................................................................................................................ 18
LAB 3: C PROGRAMMING WITH EMBEDDED ASSEMBLY CODE ........................................................... 22
3.1 OBJECTIVE .............................................................................................................................................................. 22
3.2 INTRODUCTION ....................................................................................................................................................... 22
3.3 PROCEDURE ............................................................................................................................................................ 24
3.3.1 – Sample Code ............................................................................................................................................. 24
3.3.2 – Writing Two Useful Functions ................................................................................................................. 24
3.5 ASSIGNMENT .......................................................................................................................................................... 26
ATTACHMENT A - USING GCC FOR THE LAB ................................................................................................................ 27
LAB 4: MEMORY INTERFACE ........................................................................................................................... 28
4.1
4.2
4.3
INTRODUCTION ............................................................................................................................................. 28
SETTING UP DBUG....................................................................................................................................... 30
ASSIGNMENT ................................................................................................................................................ 32
LAB 5: INTERRUPT DRIVEN INPUT ................................................................................................................. 34
5.1 OBJECTIVE .......................................................................................................................................................... 34
5.2 INTRODUCTION ................................................................................................................................................. 34
5.2.1 INTERFACING HARDWARE................................................................................................................... 34
5.2.2 OVERVIEW ................................................................................................................................................ 34
5.3 PROCEDURE ........................................................................................................................................................ 34
5.3.1 Interface Design........................................................................................................................................... 34
5.3.2 Software Implementation ............................................................................................................................ 35
5.4 ASSIGNMENT .......................................................................................................................................................... 37
REFERENCES .......................................................................................................................................................... 38
ii
Lab 1: Introduction to the ColdFire Development
Environment
1.1
Objective
The purpose of this lab is to introduce the Coldfire Board and the Monitor/Debug Software.
Basic information about the hardware is covered, and an introduction to the dBUG Software is
given.
1.2
Introduction
The Coldfire board is a versatile single board computer based on the MCF5206 ColdFire
Processor. It may be used as a powerful microprocessor based controller in a variety of
applications. With the addition of a terminal and keyboard, it serves as a complete
microcomputer system for development/evaluation, training and educational use.
It is possible to expand the memory and I/O capabilities of this board by connecting additional
hardware via the 96 pin Expansion Bus, although it may be necessary to add bus buffers to
accommodate additional bus loading.
The board provides DRAM, Flash, RS232 and all the built-in I/O functions of the MCF5206 for
learning and evaluating the attributes of the MCF5206. The MCF5206 is a member of the
ColdFire family of processors. It is a 32-bit processor with up to 32 bits of addressing and 32
lines of data. The processor has eight 32-bit data registers, eight 32-bit address registers, a 32-bit
program counter and a 16-bit status register. A block diagram of the board is shown in figure 1
and a diagram of the board level system details is shown in figure 2. For more detailed
information about the processor, refer to the M5206 User’s Manual.
1.3
Details of the Block Diagram
Flash Rom
The board comes with one on board Flash, which is programmed with the debugger/monitor
firmware (dBUG). This AMD AM29F040B Flash is 8-bits wide and gives a total of 512 Kbyte
of Flash Memory. The first 128K are reserved by the Monitor Firmware, however remaining
384KB are available to the user. The chip-select signal (-CS0) that is generated by the board
enables this chip.
DRAM SIMM
The board is equipped with one 72-pin SIMM socket for DRAM. This socket supports DRAM
SIMM’s of 256Kx32 (16MB), 512Kx32 (32 MB), and 1Mx32. No special configurations are
needed, because the dBUG will detect the total memory installed when the board is powered-up.
Lab 1: Introduction to the Coldfire Development Environment
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1
THE SIMM Pin Assignment
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Signal Name
VSS
DQ0
DQ16
DQ1
DQ17
DQ2
DQ18
DQ3
DQ19
VCC
N.C.
A0
A1
A2
A3
A4
A5
A6
A10
DQ4
DQ20
DQ5
DQ21
DQ6
DQ22
DQ7
DQ23
A7
N.C.
VCC
A8
A9
-RAS3
-RAS2
N.C.
Pin No.
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
Signal Name
VSS
N.C.
PD4
PD3
PD2
PD1
N.C.
DQ15
DQ31
DQ14
DQ30
DQ13
DQ29
VCC
DQ28
DQ12
DQ27
DQ11
DQ26
DQ10
DQ25
DQ9
DQ24
DQ8
-N.C.
-W
N.C.
-RAS1
-RAS0
-CAS1
-CAS3
-CAS2
-CAS0
VSS
N.C.
UART
The board also comes with a UART that has an independent baud rate generator. The
debugger uses the UART in order to give the user access to the terminal. The signals for
channel one are passed through external Driver/Receivers to make the channel
compatible with RS-232. The “TERMINAL” baud rate is set at 19200.
Lab 1: Introduction to the Coldfire Development Environment
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2
96 Pin Connector
The 96 Pin Connector provides an interface to all the signals necessary for board
expansion.
1
D31
33
TCK
65
CS3
2
D30
34
SIZ1
66
CS2
3
D29
35
SIZ0
67
CS1
4
D28
36
R/W
68
CS0
5
D27
37
TS
69
WE3
6
D26
38
TEA
70
WE2
7
D25
39
TA
71
WE1
8
D24
40
RESET
72
WE0
9
D23
41
ATA
73
A23
10
D22
42
IPL2
74
A22
11
D21
43
IPL1
75
A21
12
D20
44
IPL0
76
A20
13
D19
45
BG
77
A19
14
D18
46
BD
78
A18
15
D17
47
BR
79
A17
16
D16
48
CTS2
80
A16
17
D15
49
RTS2
81
A15
18
D14
50
RXD2
82
A14
19
D13
51
TXD2
83
A13
20
D12
52
CTS1
84
A12
21
D11
53
RTS1
85
A11
22
D10
54
RXD1
86
A10
23
D9
55
TXD1
87
A9
24
D8
56
SDA
88
A8
25
D7
57
SCL
89
A7
26
D6
58
DRAMW
90
A6
27
D5
59
CAS3
91
A5
28
D4
60
CAS2
92
A4
29
D3
61
CAS1
93
A3
30
D2
62
CAS0
94
A2
31
D1
63
RAS1
95
A1
32
D0
64
RAS0
96
A0
The Pins on the connector start at 1 on the top left and end at 96 on the bottom right.
Lab 1: Introduction to the Coldfire Development Environment
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3
Registers and Memory Map
The MCF5206 has built in logic and 4 chip-select pins (-CS0 to –CS3) that are used to
enable external memory and I/O devices. In addition the DRAM uses two –RAS lines (RAS0 and –RAS1) as chip-selects. There are registers to specify the address range, type
of access, and the method of –TA generation for each chip-select. –TA is the
acknowledgment that is sent to indicate the presence of a new device. The registers are
then programmed by dBUG to map the external memory and I/O devices. In order to
declare user defined memory spaces you have to re-compile and up-load the dBUG
software. This concept is further explained in Lab 4: Memory Interface. The board uses
–CS0 to enable the Flash Rom. The following table is a memory map of the MCF5206,
which shows the address ranges that correspond to each signal and device.
M5206 Memory Map
FLASH_ADDRESS
(0xFFE00000)
DRAM_ADDRESS
(0x00000000)
IMM_ADDRESS
(0x10000000)
SRAM_ADDRESS
(0x20000000)
MC68901_ADDRESS
(0x30000000)
I2C Real
MC68901_IRQ I2C Bus
(0xF0) UART1
MCF5206e
Time Clock
U17
XCEIVER
U13
7 Segment
Display
Driver U14
FSRAM
256Kx32
8x GPIO
U5 & U6
U15GPIO
10x
lines
RS232
To Terminal
J9
7 Segment
Display
lines
Flash 1Mbit
512Kx16
U4
Asynchronous
DRAM
72pin SIMM
CN1
I/O PORTS
DATA BUS
ADDR BUS
CONTROL BUS
Expansion Connectors
Figure 1. Block Diagram of the Board
Lab 1: Introduction to the Coldfire Development Environment
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4
1.4
Monitor/Debug Software
The M5206 Computer Board has a resident firmware package that provides a self-contained
programming and operating environment. The firmware, named “dBUG”, provides the user with
monitor/debug, disassembly, program download, and I/O control functions.
dBUG is a resident firmware package for the Coldfire family of Computer Boards. The
firmware (stored in the Flash ROM device) provides a self-contained programming and
operating environment. The user interacts with dBUG through pre-defined commands that are
entered via an RS232 terminal.
The user interface to dBUG is the command line. A number of features have been implemented
to achieve an easy and intuitive command line interface.
dBUG assumes that an 80x24 character dumb-terminal is utilized to connect to the debugger.
For serial communications, dBUG requires eight data bits, no parity, and one stop bit, 8N1. The
baud rate is 19200 baud, which can be changed after power-up.
The command line prompt is “dBUG>”. Any dBUG command may be entered from this prompt
and it does not allow command lines to exceed 80 characters. It also echoes each character as it
is typed eliminating the need for any “local echo” on the terminal side.
In general, dBUG is not case sensitive. Commands may be entered either in upper or lower case,
depending upon the user’s equipment and preference. Only symbol names require that the exact
case be used.
Most commands can be recognized by using an abbreviated form of the name. For instance,
entering “h” is the same as entering “help”. Thus, it is not necessary to type the entire command
name.
The commands DI, GO, MD, STEP, and TRACE are used repeatedly when debugging.
Therefore dBUG allows for repeated execution of these commands with minimal typing. After a
command is entered, simply press <RETURN> to invoke the command again. The command is
executed as if no command line parameters were provided.
An additional function called the “TRAP 15 handler” allows the user program to utilize various
routines within dBUG. There are four TRAP #15 functions, which include OUT_CHAR,
IN_CHAR, CHAR_PRESENT, and EXIT_TO_dBUG.
OUT_CHAR – sends a character, which is in the lower 8
bits of D1, to the terminal.
IN_CHAR – return an input character from the terminal to
D1.
CHAR_PRESENT – checks if an input character is present
to receive.
Lab 1: Introduction to the Coldfire Development Environment
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5
EXIT_TO_dBUG – transfers the control back to the dBUG.
Examples of the TRAP #15 functions can be found on pages 34-36 of the M5206 on-line User’s
Manual.
After the system initialization, the board waits for a command-line input from the user terminal.
When a proper command is entered, the operation continues in one of the two basic modes. If
the command causes execution of the user program, the dBUG firmware may or may not be reentered depending on the operation of the user’s code. In the alternate case, the command entry
mode is entered.
For commands that accept an optional <width> to modify the memory access size, the valid
values are:
.B
8-bit (byte) access
.W
16-bit (word) access
.L
32-bit (long) access
When no <width> option is provided, the default width is .W.
The core ColdFire register set is maintained by dBUG. These are listed below:
A0 – A7
D0 – D7
PC
SR
All control registers on ColdFire are readable only via the supervisor-programming mode, and
thus not accessible via dBUG. User code my change these registers, but caution must be
exercised as changes may render dBUG useless.
A reference to “SP” actually refers to “A7”. The user memory is located at addresses $30020000
- $300FFFFF, $300FFFFF is the maximum FSRAM address of the memory installed on the
board. When first learning the system, the user should limit his/her activities to this area of the
memory map. Address range $30000000 - $3001FFFF is used by dBUG.
If a command causes the system to access an unused address, a bus trap error will occur. This
results in the terminal printing out a trap error message and the contents of all the MCF5206e
core registers. Control is then returned to the dBUG monitor.
Several keys are used as command line edit and control functions. These functions include:
<RETURN> - will enter the command line and cause processing to begin
<Delete> or CTRL-H – will delete the last character entered
CTRL-D – Go down in the command history buffer
CTRL-U – Go up in the command history buffer
CTRL-R – Recall and execute the last command entered
Lab 1: Introduction to the Coldfire Development Environment
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6
A list of the dBUG commands can be found in Table 1. For an individual description of each of
these commands, refer to pages 18-33 of the M5206 on-line User’s Manual located in Appendix
B of this manual.
Lab 1: Introduction to the Coldfire Development Environment
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7
Table 1. dBUG Commands
COMMAND
DESCRIPTION
MNEMONIC
AS
SYNTAX
ASSEMBLE
BLOCK COMPARE
AS <addr><instruction>
BC<FIRST><SECOND><LENGTH>
BLOCK FILL
BF<WIDTH>BEGIN END DATA
B
C
BF
BM
BS
BR
BLOCK MOVE
BLOCK SEARCH
BREAKPOINT
DATA
DI
DL
GO
GT
HELP
IRD
IRM
MD
MM
RESET
RD
RM
SET
SHOW
STEP
SYMBOL
TRACE
UPDBUG
UPUSER
VERSION
BM BEGIN END DEST
BS<WIDTH> BEGIN END DATA
BR ADDR <-R><-C COUNT>
<-T TRIGGER>
DATA CONVERT
DATA VALUE
DISASSEMBLE
DI <ADDR>
DOWNLOAD SERIAL
DL <OFFSET>
EXECUTE
GO <ADDR>
Go TILL BREAKPOINT
GT <ADDR>
HELP
HELP <COMMAND>
INTERNAL REGISTER DISPLAY IRD <MODULE.REGISTER>
INTERNAL REGISTER MODIFY IRM MODULE.REGISTER><DATA>
MEMORY DISPLAY
MD <WIDTH><BEGIN><END>
MEMORY MODIFY
MM <WIDTH>ADDR<DATA>
RESET
RESET
REGISTER DISPLAY
RD <REG>
REGISTER MODIFY
RM REG DATA
SET CONFIGURATIONS
SET OPTION<VALUE>
SHOW CONFIGURATIONS
SHOW OPTION
STEP(OVER)
STEP
SYMBOL MANAGEMENT
SYMBOL <SYMB><-a SYMB VALUE>
<-R SYMB><-C|L|S>
TRACE(INTO)
TRACE <NUM>
UPDATE DBUG
UPDBUG
UPDATE USER FLASH
UPUSER
SHOW VERSION
VERSION
Lab 1: Introduction to the Coldfire Development Environment
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8
1.5
Setting up the Terminal and the Board
Be sure to read the Assignment section below before proceeding so that you will know exactly
what is required. You will need to capture the output of the following steps into a file called
“debugger.txt”on your PC.
1.5.1 Setup the Coldfire board
Note: computer MUST be off when working with the parallel port connections.
 Plug serial connection from COM2 on computer to serial connection on
Coldfire.

Connect BDM ribbon cable into BDM connector on Coldfire.

Connect power to a 5 volt 1.5 amp source.

Power the computer, but leave the Coldfire board powered down for now.
1.5.2 Setup the Terminal
Go to Start->Accessories->Hyperterminal->Hyperterminal
Window: New Connection
For ‘Name’ use “Coldfire”
Click OK
Window: Connect To
For ‘Connect using’ select COM2
Click OK
Window: COM2 Properties
For ‘Bits per second’ select 19200
‘Data bits’
select 8
‘Parity’
select None
‘Stop bits’
select 1
‘Flow Control’ select Xon / Xoff
Power on the Coldfire board.
If the MCF5206eLITE is powered on and properly connected, hitting the ENTER key
should always give you the dBUG> prompt.
Hard Reset
FSRAM Size: 1M
Copyright 1997-1999 Motorola, Inc. All Rights Reserved.
ColdFire MCF5206 EVS Debugger v1.4.7 (Mar 2 1999 13:04:24)
Enter 'help' for help.
dBUG>
Lab 1: Introduction to the Coldfire Development Environment
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9
1.5.3 Logging Output to a File
Use the following steps to transfer the output of a program to a file.
1. Choose the “Capture Text” option from the “Transfers” menu.
2. Choose the file that you want to save to.
Warning: If you want to use a file that does not exist you can to
explicitly create one. To create a new file, right-click in the file
area and choose “New/Text Document”.
3. In order to stop the data transfer, go to the “Capture Text” option under the
“Transfer” menu and select “Stop”. This command will also allow you to pause
your data transfer.
4. Your new file can be viewed using Notepad.
The debugger command set has a help facility. If you want to see a list of all the available
commands, you can simply type “help” at the dBUG prompt. If you want specific help on
a particular command, you can type “help” followed by the command. For example,
“help rd” will give you the syntax of the register dump command.
1.5.4 Transferring a file from the PC to the MCF5206
There is a very simple way to load an assembly program in to memory. For the following
example, the file “text.asm” containing MCF5606e assembly code can be found on the C
drive of your computer.
1. Start a terminal session.
2. At the dBUG> prompt, type “dl 30020000” and press Enter. This tells the
assembler to store the instructions you input starting at memory location 30020000.
3. Now choose the “Send Text File” option from the “Transfers” menu. When the
dialog box appears, choose the appropriate drive, directory and file name then press
Enter. The program will automatically stop the transfer when it reaches the end of
the file. You will not see any indication that they file is being transferred. Also,
this may take a few minutes, so be patient.
4. To view the transferred data type “di 30020000” at the dBUG> prompt.
5. Compare the contents of “test.asm” with the disassembled code displayed in the
terminal window. Verify that the transfer was done correctly.
Lab 1: Introduction to the Coldfire Development Environment
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1.6
Procedure
1. Put the following assembly code into memory, starting at memory location 30020000, using
the assembler command (AS).
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
MOVE.L
TRAP
.
D0
D1
D2
D3
D4
D5
D6
D7
#$0000,D0
#15
2. Now type DI 30020000 to invoke the disassembler and verify the code that you just typed.
dBUG> di 30020000
30020000: 4280
30020002: 4281
30020004: 4282
30020006: 4283
30020008: 4284
3002000A: 4285
3002000C: 4286
3002000E: 4287
30020010: 203C 0000 0000
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
CLR.L
MOVE.L
D0
D1
D2
D3
D4
D5
D6
D7
#0x00000000,D0
3. Dump the register set.
dBUG> rd
PC: 00000000 SR: 2700 [t.Sm.111...xnzvc]
An: 0000FFFF 00000000 00000000 00000000 00000000 00000000 00000000 300FFFF0
Dn: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
4. Using the register modify command (RM), change the value of the program counter (PC) to
$30020000 and change the values of registers D0-D7 to $FFFF0000. Set the values of registers
A0 through A6 to $0000FFFF.
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
dBUG>
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
rm
pc
d0
d1
d2
d3
d4
d5
d6
d7
a1
a2
a3
a4
a5
a6
30020000
ffff0000
ffff0000
ffff0000
ffff0000
ffff0000
ffff0000
ffff0000
ffff0000
0000ffff
0000ffff
0000ffff
0000ffff
0000ffff
0000ffff
5. Dump the contents of the register set again.
dBUG> rd
PC: 30020000 SR: 2700 [t.Sm.111...xnzvc]
Lab 1: Introduction to the Coldfire Development Environment
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An: 0000FFFF 0000FFFF 0000FFFF 0000FFFF 0000FFFF 0000FFFF 0000FFFF 300FFFF0
Dn: FFFF0000 FFFF0000 FFFF0000 FFFF0000 FFFF0000 FFFF0000 FFFF0000 FFFF0000
6. Now, run the program that you input above (in Step 1) by typing the command “GO”. This
command begins execution at the memory address contained in the program counter.
7. Look at the register again and note the effect that your program has had on the registers.
dBUG> rd
PC: 30020018 SR: 2704 [t.Sm.111...xnZvc]
An: 00000000 0000FFFF 0000FFFF 0000FFFF 0000FFFF 0000FFFF 0000FFFF 300FFFE8
Dn: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
8. Using the memory modify command, enter the following words starting at address $30010000:
ADAD ADAD ADAD DADA 0000 FFFF F0F0 CCCC
dBUG> mm 30010000
30010000: [08EA]
30010002: [EF9F]
30010004: [CDC7]
30010006: [10D6]
30010008: [90F7]
3001000A: [B7CF]
3001000C: [8BE3]
3001000E: [8CA4]
30010010: [0A7F]
ADAD
ADAD
ADAD
DADA
0000
ffff
f0f0
cccc
.
9. Verify the data that you just entered by using the memory display command. Use the
parameters of the command to group the data as it is grouped above and display only the values
that you just typed in.
dBUG> md 30010000 30010010
30010000: ADAD ADAD ADAD DADA 0000 FFFF F0F0 CCCC ................
10. Using the memory modify command, write the string “CPSC462!” into the block of memory
beginning at address $30010000.
dBUG> mm.b
30010000:
30010001:
30010002:
30010003:
30010004:
30010005:
30010006:
30010007:
30010008:
30010000
[AD] 43
[AD] 50
[AD] 53
[AD] 43
[AD] 34
[AD] 36
[DA] 32
[DA] 21
[00] .
11. Use the memory display command to show the string you just typed in byte format. Once
again, set the arguments of the command to show only the data you have entered.
dBUG> md.b 30010000 30010007
30010000: 43 50 53 43 34 36 32 21 00 00 FF FF F0 F0 CC CC CPSC462!........
12. Invoke the assembler at memory location 30020000 and type in the following code:
MOVE.L #$7,D0
MOVE.L #$9,D1
Lab 1: Introduction to the Coldfire Development Environment
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ADD.L
loop:
D0,D1
BRA loop
13. Run the program you entered in the last step. If you entered the program correctly, your
board should get stuck in an infinite loop at memory address 30020000E.
Press the ABORT (s1) button on your board to interrupt the program's execution. Dump the
register set, and return to the dBUG prompt.
dBUG> go 30020000
Hard Reset
FSRAM Size: 1M
Copyright 1997-1999 Motorola, Inc. All Rights Reserved.
ColdFire MCF5206e EVS Debugger v1.4.7 (Mar 2 1999 13:04:24)
Enter 'help' for help.
dBUG> rd
PC: 00000000 SR: 2700 [t.Sm.111...xnzvc]
An: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 300FFFF0
Dn: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
14. Set the program counter to 30020000 and registers D0 and D1 to 0F00AAAA using any of
the commands you have already learned.
dBUG> rm pc 30020000
dBUG> rm d0 0F00AAAA
dBUG> rm d1 0F00AAAA
dBUG> rd
PC: 3005FFFF SR: 2700 [t.Sm.111...xnzvc]
An: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 300FFFF0
Dn: 0F00AAAA 0F00AAAA 00000000 00000000 00000000 00000000 00000000 00000000
15. Trace through the program one step at a time until you have crossed the branch instruction at
least three times.
1.7
Assignment
1. Demonstrate that you are able to transfer a file from the PC to MCF3206 memory and that
you are able to log the output of the dBUG to a file on the PC.
2. Turn in a printout of the file “debugger.txt”.
3. Give a brief (1-2 paragraph) summary of the each of the components listed in the Block
Diagram.
4. Use each of the following debugger commands and capture the output of each to a file. Turn
in a printout of this captured output and briefly explain how each of the commands works.
BM
BS
5. How can you specify the number of instructions to be traced by dBUG’s trace command?
Lab 1: Introduction to the Coldfire Development Environment
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13
Lab 2: Assembly Programming on the MCF5206 Board
2.1
Objective
The following exercises will introduce you to some of the basics of assembly language
programming on the M5206 microprocessor. Read through the lab in its entirety before you
begin. The 68000 assembly language instructions provided in your textbook are mostly identical
the MCF5206 instructions. If you need further explanation about certain assembly language
instructions, consult the ColdFire Microprocessor Family Programmer’s Reference Manual in
Appendix C.
2.2
Introduction
The ColdFire Family programming model consists of two register groups: User and Supervisor.
Programs executing in the user mode use only the registers in the user group. System software
executing in the supervisor mode can access all registers and use the control registers in the
supervisor group to perform supervisor functions.
Figure 2.1 illustrates the user programming model. The model is the same as for the M68000
Family microprocessors described in your textbook. It consist of the following registers:
 16 general purpose 32-bit registers (D0-D7,A0-A7)
 32-bit program counter(PC)
 8-bit condition code register (CCR)
31
15
7
0
DO
D1
D2
D3
D4
D5
D6
D7
DATA
A0
A1
A2
A3
A4
A5
A6
ADDRESS
REGISTERS
A7
PC
CCR
Figure 2.1 – User Programming Model
RE
GI
ST
ER
S
STACK
POINTER
PROGRAM
COUNTER
CONDITION
CODE
REGISTER
Each data register is 32 bits wide. Byte and word operands occupy the lower 8- and 16-bit
portions of integer data registers, respectively. Longword operands occupy the entire 32 bits of
integer data registers. Because address registers and stack pointers are 32 bits wide, address
Lab 2: Assembly Programming on the MCF5206eLITE Board
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14
registers cannot be used for byte-size operands. When an address register is a source operand,
either the low-order word or the entire longword operand is used, depending on the operation
size.
ColdFire supports a single hardware stack pointer (A7) for explicit references or implicit ones
during stacking for subroutine calls and returns and exception handling. The PC contains the
address of the currently executing instruction. The CCR is the least significant byte of the
processor status register (SR). Bits 4-0 represent indicator flags based on results generated by
processor operations.
4
X
3
N
2
Z
1
V
0
C




X – extend bit
N – negative bit; set if most significant bit of the result is set
Z – zero bit; set if the result equals zero
V – overflow bit; set if an arithmetic overflow occurs
 C – carry bit; set if a carryout of the MSB occurs for an addition
Full access to the SR is only allowed in supervisor mode. The following diagram is a layout of
the status register.
USER BYTE
CONDITION CODE REGISTER (CCR)
SYSTEM BYTE
15
T
14
0
13
S
12
M
11
0
10
I2
9
I1
8
I0
7
0
6
0
5
0
TRACE
ENABLE
4
X
3
N
2
Z
1
V
0
C
CARRY
OVERFLOW
Figure 2.2 – Status Register
ZERO
NEGATIVE
2.2.1 Assembly Commands
EXTEND
In order to complete this lab, you will need to familiarize yourself with some of the basic
assembly instructions. Four of them have been provided here, but a complete list of all the
available instructions can be found in Appendix C.
LEA (Load Effective Address) – Loads the effective address into the specified
address register. This instruction affects all 32 bits of the address register. A
more detailed description of this instruction can be found on page 4-44 of the
Programmer’s Reference Manual.
MOVE (Move Data from Source to Destination) – Moves the data at the source
to the destination location and sets the condition codes according to the data. The
size of the operation may be specified as byte, word, or longword. A more
Lab 2: Assembly Programming on the MCF5206eLITE Board
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detailed description of this instruction can be found on page 4-53 of the
Programmer’s Reference Manual.
CMPI (Compare Immediate) – Subtracts the immediate data from the destination
operand and sets the condition codes according to the result; the destination
location is not changed. The size of the operation and the immediate data is
specified as a longword. A more detailed description of this instruction can be
found on page 4-31 of the Programmer’s Reference Manual.
Bcc (Branch Conditionally) – If the specified condition is true, program execution
continues at location (PC) + displacement. The program counter contains the
address of the instruction word for the Bcc instruction, plus two. The
displacement is the two’s complement integer that represents the relative distance
from the current program counter to the destination program counter. Condition
code cc specifies one of the following conditional tests:
E
GE
GT
LE
LT
NE
=
>=
>
<=
<
!=
2.2.2 Writing a Program
First of all, it is important that every line that does not have a label begin with a TAB character.
Lines with labels should also have a TAB immediately after the label. Also, comment strings
should begin with the “*” character. It can be used on any line in the program and all text after a
“*” is ignored by the assembler.
Every assembly program needs to be located somewhere in memory. In the cross assembler this
is accomplished by the ORG statement. For example:
ORG $30020000
will locate a code section at the address $30020000. There can be several ORG instructions in a
program, one for each module. The only restriction is that the addresses are in increasing order
from the beginning of the program. ORG $30030000 followed by ORG $30020000 will not be
accepted.
The END instruction is needed to tell the assembler where to stop assembling. This also requires
an address argument. You can use the address of the first ORG as the argument to the END.
There should only be one END per program file.
Lab 2: Assembly Programming on the MCF5206eLITE Board
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2.2.3 Defining Constants
The assembler provides an EQU instruction for declaring constants much like the #define
directive in C. For example:
BUFFER EQU $30030000
Declares a constant called “BUFFER” which is equal to $30030000. Everywhere in the program
where “BUFFER” is referenced, the assembler will replace it with the constant value $30030000.
Note: The lack of a prefix indicates a decimal number, a percent sign (%)
indicates a binary number, and a dollar sign ($) indicates a hexadecimal
number.
To create data constants in memory, the assembly instruction DC is used. It can either be byte,
word or longword. For example:
PROMPT
DC.B $16
DC.B ‘Please enter a value: ‘
Creates a data constant named PROMPT that is set to “Please enter a value:”. You can also
declare space for variables with the DS instruction. For example:
INPUT
STRING
DS.L
DS.B
1
30
Declares space for 1 longword at the address of label “INPUT” and an array of 30 bytes at the
address of “STRING”.
2.2.4 System Calls
System calls are used to perform input/output functions that are already available through the
MCF5206eLITE hardware. For system calls on this cross assembler, you must use the TRAP
#15 instruction.
TRAP (Trap) – Causes a TRAP #<vector> exception. The
instruction adds the immediate operand (vector) of the instruction
to 32 to obtain the vector number.
The four TRAP functions were introduced in Lab #1. For example:
MOVE.L
TRAP
#$0013,DO
#15
Sends the character located in the lower 8-bits of D1 to the terminal. The codes associated with
OUT_CHAR, IN_CHAR, CHAR_PRESENT, and EXIT_TO_dBUG are #$0013, #$0010,
#$0014, and #$0000 respectively. A very thorough explanation of traps can be found on pages
463 – 465 of your textbook.
Lab 2: Assembly Programming on the MCF5206eLITE Board
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2.2.5 Assembling the Program
The cross-assembler software is located in the directory on the C: drive of the PC’s. After you
write your program in a DOS text file, save it with the filename extension “.x68” in this
directory. This will enable the cross-assembler to find the program. At the DOS prompt change
the directory to:
c:\Program Files\i2demo\68k\
Then assemble the program by typing:
c:x68k -L filename
If this is successful it will create a .BIN and .LIS listing.
Uploading and Running the M5206
Once you have assembled the program successfully, you will need to upload it to the M5206
board. In order to upload your file to the board you will need to create an s-record. You do this
by typing the following:
c:s68k filename
This will create a new file called filename.rec, which is created from the .BIN file. At the
dBUG> type di 3020000 then go to the "TRANSFER" menu and select "SEND TEXT FILE"
then select the file "filename.rec."
2.3
Assignment
1. Writing a Subroutine in Assembly
You will program a subroutine that starts at address $30021000 to copy a block of memory (in
bytes) from one location to another without using any extra memory for temporary storage. In
your program, assume that before entering the subroutine the following addresses are loaded into
the registers:
A0 = The starting address of the source block
A1 = The length of the block to be copied
A2 = The starting address of the destination block
For Example:
In order to copy a memory block of 8 bytes from location $30020000 to $30020024, the user
should only have to enter the starting address of the source block, the length of that block, the
starting address of the destination block, and type ‘GO’. Before you run the subroutine, you
want to dump the memory at both the source and destination address. Then Lines 2-4 will set
the registers A0, A1, and A2 to the starting address, length, and destination address
respectively. Line 5 will run your subroutine. After you run the subroutine, you want to
dump the memory at both the source and destination address to verify that the memory was
moved to the proper location. The following is an example of what your terminal screen
should look like when you are running the program.
Lab 2: Assembly Programming on the MCF5206eLITE Board
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1. dBUG> MD 30020000
30020000:
0534 00FF 1357 0031 FFFF 3210 0000 1111
30020010:
FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF
30020020:
FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF
2. dBUG>
3. dBUG>
4. dBUG>
5. dBUG>
6. dBUG>
30020000:
30020010:
30020020:
RM A0 30030000
RM A1 00000008
RM A2 30030024
GO
MD 30020000
0534 00FF 1357 0031 FFFF 3210 0000 1111
FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF
FFFF FFFF 0534 00FF 1357 0031 FFFF FFFF
Also, your subroutine should take care of all possible special cases.
The special cases are:
Case 1: (A0+A1) < A2
The subroutine should operate normally. Set the
carry bit to zero, and the negative bit to zero.
Case 2: A0 < A2 <= (A0+A1)
This will cause part of the data to be overwritten
before it is moved unless you find a way to move it
in a different order. Set the carry bit to one and the
negative bit to zero.
Case 3: A0 = A2
In this case, it should move nothing at all. Set both
the carry and the negative bit to one.
In order to set the carry and negative bits you have to use the MOVE statement. However,
you have to find a way to set just the carry and negative bits without changing the values of
the other CCR bits.
Lab 2: Assembly Programming on the MCF5206eLITE Board
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2. Integrating A Calling Function
Write a calling function that will set the values of A0, A1, and A2. Your calling function
should store these values onto the program stack (A7). Upon return, the values should be
popped off of the stack. The last value on the stack should be the information from the status
register.
You will modify your subroutine to read the address values from the stack. When the
subroutine is finished, it should return back to the main program. When branching to and
from the subroutine, you will need to use the BSR and RTS instructions. The statement: BSR
$30020500 will branch to the subroutine that is located at $30020500. When the subroutine
reaches a RTS statement is will return to the calling program.
SOLUTION
MAIN
MOVEMEM
EQU
EQU
$30020000
$30021000
LFROM
COPIED
LENGTH
LTO
EQU
EQU
EQU
$00000010
$30022006
$30022000
BEGINNING ADDRESS OF 16 WORDS TO BE
ENDING ADDRESS OF 16 WORDS TO BE COPIED
BEGINNING ADDRESS OF DEST. FOR 16 WORDS
ORG MAIN
BSR MOVEMEM
EXIT
MOVE.L
TRAP
#$0000,D0
#15
SELECT EXIT_TO_dBUG
MAKE THE TRAP CALL AND EXIT TO dBUG
*--------------------------------------------*
MOVEMEM SUBROUTINE
*--------------------------------------------ORG MOVEMEM
* INITIALIZE THE UPPER AND LOWER BOUNDS
LEA
LENGTH,A4
Move the length into A4
LEA
LFROM,A0
Load the beginning address into A0
MOVE.L
A0,D1
Move the beginning address into d1
ADD.L
A4,D1
Add the length to d1
MOVEA.L D1,A1
Move the ending address into A1
LEA
LTO,A2
Load the beginning copy to address into A2
MOVE.L
A2,D1
Move the beginning copy to address into D1
ADD.L
A4,D1
Add the length to d1
MOVEA.L D1,A3
Move the ending copy to address into A3
CLR.L
* CHECK RANGES
CMPA.L
BLT
D0 CLEAR D0 - USED FOR TEMPORARY MEMORY STORAGE
A2,A1
MOVEDOWN
*If a1 < a2 copy down
Lab 2: Assembly Programming on the MCF5206eLITE Board
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MOVEUP
CMPA.L
BLT
A0,A2
MOVEDOWN
MOVE.L
MOVE.L
SUBA.L
SUBA.L
CMPA.L
BGE
(A1),D4
D4,(A3)
#1,A3
#1,A1
A0,A1
MOVEUP
*elseif a2 <= a0 copy down
*else copy up
RTS
MOVEDOWN
MOVE.L
MOVE.L
ADDA.L
ADDA.L
CMPA.L
BLE
(A0),D4
D4,(A2)
#1,A0
#1,A2
A1,A0
MOVEDOWN
RTS
*--------------------------------------------*
DATA SEGMENT
*--------------------------------------------ORG LFROM
MOVE.L
MOVE.L
MOVE.L
MOVE.L
MOVE.L
MOVE.L
MOVE.L
MOVE.L
D0,D1
D1,D2
D2,D3
D2,D3
D2,D3
D2,D3
D2,D3
D2,D3
END MAIN
3. Demonstrate your program to the T.A.
4. Turn in a hard of your subroutine (Question 1) and the calling function (Question 2).
Lab 2: Assembly Programming on the MCF5206eLITE Board
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Lab 3: C Programming with Embedded Assembly Code
3.1 Objective
The focus of this lab will be to integrate assembly code into a C program. Microprocessor system
designers are starting to use high-level languages instead of assembly language to control
hardware interfaces. However the utilization of assembly still allows for much faster execution
for high-availability systems. This lab will introduce you to the basic concepts of using the highlevel language C for systems programming.
3.2 Introduction
From previous labs, you know that the M5206e family supports three basic data sizes: the byte
(8), word (16) and longword (32), which can either by signed or unsigned. However, the C
language supports four basic data types: int (integer), char (character), float (real), and double
(double-precision floating point). Just like the M5206e data types can be signed or unsigned, the
C data types can be signed, unsigned, longword (long) or word (short). Long and short indicate
the number of bits that will be assigned, which will be either 32 or 8 respectively. The following
table was taken from page 147 of your textbook. It gives a better description of the C data types.
Data Type
C name
Width
(bits)
Range
Integer
Int
16
-32,768 to 32,767
Short Integer
Short
int
8
-128 to 127
Long integer
Long int
32
-2,147,483 to
2,147,483,647
Unsigned integer
Unsigned
int
16
Character
Char
8
0 to 255
Single-precision
floating point
Float
32
10-38 to 10+38
Double-precision
floating point
Double
64
10-300 to 10+300
0 to
65,535
Once you have compiled the C code, it is converted into assembly. However, you can directly
embed assembly code into your program. The following C instruction will embed the assembly
instruction “MOVEA.L A0,A1” into a C program. The “__asm__” is a C directive that tells the
compiler the following text is an assembly instruction.
__asm__ (“MOVEA.L %A0,%A1”);
Also instead of directly embedding each line of assembly, you can write an assembly file and
link it to your C program. Then you can call your assembly subroutine like any other C
subroutine.
Lab 3: C Programming with Embedded Assembly Code
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22
Here is an example of a C program (test.c) that calls an assembly function (_writeme (P)) located
in testasm.s):
test.c
int _writeme(int *P);
int main(void) {
int *P=0x30010000;
_writeme(P);
return 0;
}
testasm.s
_writeme:
move.l
move.l
move.l
rts
4(%sp),%A0
#0xff013,%D0
%D0,(%A0)
.globl _writeme
The first line of the C program is a prototype for function ‘_writeme’. The underscore in the
name tells GCC that we are using an imported assembly function. The arguments of _writeme is
a pointer of type ‘int’. The main program declares the pointer, and assigns it to a memory
location. Note that in most programming practices, we do not assign pointers to absolute
memory locations. In systems programming, we can break this rule. The argument ’P’ passed to
_writeme is the absolute address that we are going to access from the assembly program.
The first line of the assembly program is a label. The compiler turns this label into an address
for use in a jump subroutine. The arguments from the calling C program are pushed onto the
program stack (sp). We do NOT pop the value from the stack, this is taken care of once the
procedure returns. We merely access it by copying a long word (0x30010000) into A0,
starting from the 5th byte of the stack pointer. The last line is a compiler directive that exports
_writeme to the compiler’s symbol list. _writeme from the C program will now be the same
_writeme in the assembly program.
Notice also that we have used the ‘%’ symbol in front of the register. This is a syntax used by
GCC for accessing all registers. GCC is capable of recognizing two different syntax variations:
MIT and Motorola. Motorola is the preferred and most widely used syntax for 68000 chipsets.
Refer to Appendix F for discrepancies.
The following code is the compiled version of test.c:
Lab 3: C Programming with Embedded Assembly Code
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23
test.c compiled version
.file "test.c"
gcc2_compiled.:
__gnu_compiled_c:
.text
.even
.globl main
main:
link.w %a6,#-4
jsr __main
move.l #805371904,-4(%a6)
move.l -4(%a6),-(%sp)
jsr _writeme
addq.l #4,%sp
clr.l %d0
jbra .L1
.even
.L1:
unlk %a6
rts
3.3 Procedure
3.3.1 – Sample Code
Copy and save test.c and testasm.s. Compile and link the files using the ‘make’ command with
the given makefile. See the TA for the makefile source code.
The output file is test.x. This is an s-record, much like lab 2’s .rec type of file. Upload this to
the board and execute it. Use the debugger to find the answer to question 1.
3.3.2 – Writing Two Useful Functions
For this lab you need to write two subroutines in assembly language that will function similarly
to printf and scanf statements. Then write a C program that calls these assembly subroutines.
The C program should prompt the user to input a word or a sentence, and then ask them to verify
their input by typing it again. Then the program should tell the user if their inputs match. Do not
worry about implementing %c, %d, %f type values. Assume all input is of type string. See
section 3.4 Question 4 for further instructions.
Example:
Enter a word:
prompt> hello
re-enter your word:
prompt> hello
Correct!
Enter a word:
prompt> hello
re-enter your word:
prompt> good-bye
Incorrect!
Lab 3: C Programming with Embedded Assembly Code
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Solution
mainprg.c
#include<stdio.h>
#include<stdlib.h>
#include<string.h>
void _printf(char *oput);
void _scanf(char *iput);
int main (void) {
char iput1[255],iput2[255],oput[255];
char a1[50], a2[50];
int i;
sprintf(a1,"%p\r\n",iput1);
_printf(a1);
sprintf(a2,"%p\r\n",iput2);
_printf(a2);
for(i=0; i<255; i++) iput1[i]=i;
for(i=0; i<255; i++) iput2[i]=255-i;
strcpy(oput,"Enter a word> ");
_printf(oput);
_scanf(iput1);
strcpy(oput,"\r\nRe-Enter your word> ");
_printf(oput);
_scanf(iput2);
if(0 == strcmp(iput1,iput2)) {
strcpy(oput,"\r\nCorrect!\r\n");
_printf(oput);
} else {
strcpy(oput,"\r\nIncorrect!\r\n");
_printf(oput);
}
return 0;
}
ioasm.s
*--------------- PRINT STRING -----------_printf:
*A0 = ADDRESS OF STRING TO PRINT
MOVE.L
4(%SP),%A0
Lab 3: C Programming with Embedded Assembly Code
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*MOVE ONE CHARACTER AT A TIME INTO D1
LOOP:
MOVE.B
(%A0)+,%D1
*TESTING FOR NULL
AND.L
CMPI.L
BEQ
*TRAP CALL = OUT_CHAR
MOVE.L
TRAP
BRA
ENDPRINTF:
#0x000000FF,%D1
#0x00,%D1
ENDPRINTF
#0x0013,%D0
#15
LOOP
RTS
*--------------- READ STRING -----------_scanf:
*ADDRESS TO WRITE INTO
MOVE.L
4(%SP),%A0
*Gets Char from Terminal, Store it in D1
RLOOP:
MOVE.L
#0x0010,%D0
TRAP
#15
*Sends Char in D1 to Terminal
MOVE.L
#0x0013,%D0
TRAP
#15
*CHECK FOR 'ENTER' = $D
CMPI.L
#0xD,%D1
BEQ
ENDSCANF
*Stores Input
MOVE.B
ENDSCANF:
%D1,(%A0)+
BRA
RLOOP
MOVE.B
RTS
#0x00,(%A0)+
.GLOBL
.GLOBL
_printf
_scanf
3.5 Assignment
1. What address does the first line of testasm.s get mapped to?
0x300200BC
2. We want to use the command ‘movea.l (a0)+,d0’ . How does this look in Motorola syntax?
MIT syntax?
movea.l (%a0)+,%d0
Lab 3: C Programming with Embedded Assembly Code
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26
movea.l %a0@(4),%d0
3. What are some reasons to use absolute addressing?
Memory Mapped IO.
Systems with no virtual memory.
4. From the assignment given in Section 3.3.4, turn in the following three files: your assembly
code (ioasm.s), your C code (mainpgr.c), and the modified makefile (makefile).
Attachment A - Using GCC for the lab
GCC stands for GNU C Compiler. GNU is pronounced “ganoo”, and cleverly stands for
“GNU’s Not UNIX”. It is a command-line driven compiler that is executed using a makefile. A
makefile is nothing more than a script that puts together command-line options. We will use
GCC to compile both C and assembly.
From an MS-DOS prompt, type ‘c:\coldfire\setenv.bat’. This will set up your path for using
GNU’s make command.
Three files are required to compile test.x: test.c, testasm.s, my5206elite.ld, and makefile. The
given makefile can be modified to work with any program to be uploaded to the 5206. The file
called my5206elite.ld is a text file that contains the memory map for the board. The board
comes with 1 megabyte of physical memory.
In the directory that contains these files, type ‘make test’. Make will first look at target ‘test’ and
check to see if the dependent targets are created:
test:
test.o testasm.o
$(CC) $(LDFLAGS) -o test.x test.o testasm.o
if not, it will then compile test.c and testasm.s into the two target object files test.o and testasm.o.
The output file is s-record test.x.
The memory map ensures that the program will start at user address 0x30020000.
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Lab 4: Memory Interface
4.1
Introduction
The MCF5206 board allows for memory and I/O expansion by connecting additional hardware
via the 96 pin connector. The pin assignments for that connector was given in Lab 1. Before
continuing with this lab it is recommended that you read the following pages from your
textbook:


Partial Address Decoding – P. 312 to P. 316
Address Decoding w/ m-line to n-line Decoders – P. 317 to P. 323
In order to use external devices, you have to map it onto the MCF5206 address space. You can
map individual devices or groups of devices that implement different blocks of memory. On the
connector you have 24 available address lines, however that many lines are not needed for most
external memory devices. Therefore, you have to come up with a way to decode the address
lines. There are three basic decoding strategies: full address decoding, partial address decoding,
and block address decoding.
Address Decoding Strategies
Full address decoding is when all of the microprocessor’s address lines must be used in order to
access a memory location on an external device. Every line that does not select a specific
location within a device should be decoded so that no two devices can be accessed
simultaneously. When some of the lines that are available for address decoding don’t take part
in the process, it is called partial address decoding. This method is the least expensive and the
simplest to implement. However when you take short cuts there is usually a consequence, so be
careful and make sure that partial address decoding really gives the results that you are looking
for. Then there is a combination of partial address decoding and full address decoding that is
called block address decoding. This method decodes blocks of memory in order to avoid the
inefficient use of memory space by partial address decoding. So that you can get the full effect
of address decoding, you will be fully decoding your address lines for this lab.
Decoder Design
There are four different ways to implement address decoding. They are random logic, m-line to
n-line decoders, PROMs, and programmable logic elements. An address decoding design that
uses random logic is composed of logic chips such as AND, OR, NAND, and NOR gates and the
use of inverters. This type of address decoding is very fast, but it not widely used because of the
high number of chips that are required in implementation.
The PROM or programmable read-only memory has m address inputs, p data outputs and a chipselect input. When the PROM is enabled the input will assert one of the output pins. Basically it
is just a table that contains your addresses, so it looks up your address based on the input and
asserts the appropriate output line.
Lab 4: Memory Interface
Page 28
28
The next group of devices are called the programmable logic elements because they are all
configured by programming. These include the FPGA (field programmable gate array), PLA
(programmable logic array) and PAL (programmable array logic). These new logic elements
give the designer the speed of the random logic and the flexibility of the ROM; therefore you get
the best of both worlds.
However due to the simplistic nature of the data decoder, that is what we are going to use for the
implementation of this lab. The use of data decoders are very popular for address decoding
techniques. There are several different m-line to n-line decoders that all have the same
functionality. So we are only going to work with the 74LS138 3-line to 8-line decoder that is
described in your textbook. This device decodes a 3-line input into one of eight active-low
outputs. The pin out and truth table for the 74LS138 decoder is shown in figure 4.1 and
Appendix E.
74LS138 Truth Table
Outputs
Inputs
E1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
E2
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
E3
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
C
X
X
0
0
0
0
1
1
1
1
X
X
X
X
X
X
B
X
X
0
0
1
1
0
0
1
1
X
X
X
X
X
X
1
2
3
4
A
X
X
0
1
0
1
0
1
0
1
X
X
X
X
X
X
Y0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
A
B
CFigure
E
Y1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
Y2
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
Vcc
Y0
4.1YY1
2
Y3
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
Y4
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
Y5
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
Y6
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
Y7
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
16
15
14
13
Y3
12
E
For this lab you will be using the574LS138
to partially
decode
and map two devices to the
Y4
6
11
E
MCF5206 address space. A very7 helpful exampleY5can be10found on page 322 of your textbook.
Y7
GND
8
Y6
9
For this lab you will also be using two 8K CMOS static RAM chips (IS61C64AH). Figure 4.2,
along with Appendix D, shows the pin configuration
74LS13
and truth table for this chip.
9
Mode
Disable
Read
Write
WE
H
H
L
Lab 4: Memory Interface
CE1
L
L
L
NC A12 A7 A6 A5 A4 A3 A2 A1 -
CE2
H
H
H
1
2
3
4
5
6
7
8
9
Truth Table
OE
I/O Operation
H
High-Z
L
DOUT
X
DIN
IS61C64AH
28
27
26
25
24
23
22
21
20
- VCC
- WE
- CE2
- A8
- A9
- A11
- OE
- A10
- CE1
Vcc Current
Icc
Icc
Icc
Page 29
29
Figure 4.2 – IS61C64AH Pin Configuration and Truth Table
4.2
Setting Up dBUG
The MCF5206 has built in logic and four chip-select pins (CS0 – CS3) that are used to enable
external memory and I/O devices. In addition there are registers that specify the address range,
type of access, and the method of –TA generation for each chip-select. The –TA signal is an
acknowledgement signal sent by the external device that indicates a new device is present. The
registers that are used have to be programmed by dBUG so that you can map the external
memory. This process is described later in this lab.
The chip-selects can be defined to map any memory location that is not already taken by the
board. For example, we have chosen to use location $30100000 - $30101FFF for this
demonstration.
As shown in the memory map, the internal module resisters are located from $10000000 $1000003FF. Address $10000000 is considered the base address and all of the registers are
located at an offset from that base. Table 4.1 lists the register offsets that correspond to each
chip-select. Use the MD command in dBUG to familiarize yourself with the setup of these
registers.
Lab 4: Memory Interface
Page 30
30
M5206 Memory Map
FLASH_ADDRESS
(0xFFE00000)
DRAM_ADDRESS
(0x00000000)
IMM_ADDRESS
(0x10000000)
SRAM_ADDRESS
(0x20000000)
MC68901_ADDRESS
(0x30000000)
I2C Real
MC68901_IRQ I2C Bus
(0xF0) UART1
MCF5206e
XCEIVER
U13
Time Clock
U17
RS232
To Terminal
J9
The chip selects are controlled by three registers, which are Chip Select
7 SegmentAddress Register
Displayand Chip Select Control
(CSAR0 – CSAR3), Chip Select Mask Register (CSMR0 – CSMR3),
Driver U14
Register (CSCR0
– CSCR3). The chip select address register is 16 bits wide and contains the
FSRAM
upper 16 bits of256Kx32
the address space that will be mapped to that particular chip select. For
example:
U5 & U6
mm 10000070 1010
Sets the starting address of CS1 to $10100000
Flash 1Mbit
512Kx16 chip select. For
The chip select mask register defines the address space for that particular
example:
U4
mm 10000074 0001
Sets the ending address of CS1 to $1011FFFF
Asynchronous
DRAM
corresponding
bit of
72pin SIMM
Since a 1 is in the lower 4 bits of CSMR1 it will set the
the address register
to 1 and then mask all of the lower bits to ‘F’. The smallest amount of space the you can map on
CN1
the MCF5206eLITE is 64k or ‘1FFF’.
DATA BUS
I/O PORTS
The chip select control register
controls
the acknowledge, alternate, masteralternate master
ADDR
BUS
CONTROL
BUS of the chip-selects. The following is the
support, port size, burst and activation features
of each
16 least significant bits of the Expansion
CSCR. Connectors
Figure 1. Block Diagram
CSCR (1-7)of the Board
15
0
14
0
13
WS3
0
12
WS2
1
11
WS1
1
10
WS0
0
9
BRST
0
8
AA
1
7
PS1
0
6
PS0
0
5
4
3
2
EMAA ASET WRAH RDAH
0
0
0
0
1
WR
1
0
RD
1
Using the given values for the CSCR register you will enable both the read and write cycles. AA
is also asserted so three wait states will be inserted before an internal transfer acknowledge is
generated. These are the standard values that you should always set your CSCR to be. For
example:
mm 1000007a
1903
Sets the CSCR1 to the standard value
Specifics about the CSCR can be found on page 8-32 of the MCF5206 User’s Manual in
Appendix A.
Lab 4: Memory Interface
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Table 4.1 – Chip Select Address Registers
Width
Name
Description
16
CSAR0
Chip Select 0 Address Register
32
CSMR0
Chip Select 0 Mask Register
16
CSCR0
Chip Select 0 Control Register
16
CSAR1
Chip Select 1 Address Register
32
CSMR1
Chip Select 1 Mask Register
16
CSCR1
Chip Select 1 Control Register
16
CSAR2
Chip Select 2 Address Register
32
CSMR2
Chip Select 2 Mask Register
16
CSCR2
Chip Select 2 Control Register
16
CSAR3
Chip Select 3 Address Register
32
CSMR3
Chip Select 3 Mask Register
16
CSCR3
Chip Select 3 Control Register
Offset
BASE + $64
BASE + $68
BASE + $6E
BASE + $70
BASE + $74
BASE + $7A
BASE + $7C
BASE + $80
BASE + $86
BASE + $88
BASE + $8C
BASE + $92
4.3
Assignment
1. Design an address decoding table to satisfy the following memory map:
RAM1 $30100000 – $30101FFF
RAM2 $30103000 – $30104FFF
Device Address Range
A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12
ROM1 30100000 - 30101FFF
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
X
ROM2 30104000 - 30105FFF
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
X
A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
2. Use the decoding table you designed in question 1 to draw the appropriate circuit. You may
use 3x8 decoders and 8K CMOS static RAM chips in your design. Turn in a hard copy of
your design.
3. Construct your design and demonstrate that your external memory works.
Write a statement to the Memory
Print this statement from the Memory
4. What is meant by the terms partial address decoding, full address decoding and block address
decoding.
Partial Address Decoding – Not all of the address lines are available for decoding. The
least number of lines that will uniquely identify a device are used.
Full Address Decoding – Each addressable location within a memory component
responds only to a single, unique address on the system.
Block Address Decoding – Compromise between partial and full address decoding.
Lab 4: Memory Interface
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5. When chip-select control registers (CSCR 1-7) are set to the value of “1903”, what does that
represent? Be sure to describe the meaning of each bit. The User’s Manual will be a helpful
reference for this assignment. It is located in Appendix A.
WS[3:0] – Wait States
BRST – Burst Enable
AA – Auto Acknowledge enable
PS[1:0] – Port Size
EMAA – Alternate Master Automatic Acknowledge Enable
ASET – Address Setup Enable
WRAH – Write Address Hold Enable
RDAH – Read Address Hold Enable
WR – Write Enable
RD- Read Enable
“1903” sets Write and Read enable and the Auto Acknowledge enable
which allows 3 wait states.
Lab 4: Memory Interface
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Lab 5: Interrupt Driven Input
5.1 OBJECTIVE
In many applications the CPU cannot poll an external device which may request service at any
given time. It is not always the most efficient or convenient way to perform I/O. A better way to
service an external device is to generate an interrupt for the CPU. In turn, the CPU will
acknowledge the external device and perform the service routine for it.
5.2 INTRODUCTION
In order to implement this lab, several modules on the MCF5206 must be used. This board
offers all the necessary pins to accomplish this lab through the 96 pin connector. It is also
necessary to understand how the ColdFire will process an interrupt from an external device.
5.2.1 INTERFACING HARDWARE
You will get the chance to build some external hardware for use as an input device. This will
consist of a simple keypad that will cause an interrupt whenever a key is pressed. A debounce
circuit will be needed to provide a reliable and consistent interrupt. An LCD will be used to
display a message based on the input from the keypad.
5.2.2 OVERVIEW
This lab will give you the opportunity to build the necessary hardware to interface with the
board, program an Interrupt Service Routine (ISR), and output the appropriate message from the
ISR to the LCD.
5.3 PROCEDURE
The hyperterminal can be used to display all of the output, but an Optrex LCD DMC20434 will
display some of the information.
5.3.1 Interface Design
The first step in implementing the LCD device is to figuring out how it will be interfaced with
the MCF5206 board. You will have to run the LCD in 4-bit mode, due to I/O constraints.
Lab 6: Serial Communication
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The following shows the difference between 11-bit method and 7-bit method.
 11-bit mode
8 I/O lines.
1 Enable line
1 Read/Write line
1 Register Select line
*This would have been possible had there been a 16-bit parallel port device attached to the
coldfire board.
 7-bit mode
4 I/O lines
1 Enable line
1 Read/Write line
1 Register Select line
Design an interface using the keypad and a debouncer circuit. You will need to connect some of
these control lines to the bus pins of connectors J1 and J2. Also, you will need to connect the
speaker to the appropriate Timer control signal.
5.3.2 Software Implementation
For the software implementation of this device you need to implement an LCD library written in
C, containing a set of abstract functions.
Lab 6: Serial Communication
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Basic Functionality:
 Set LCD mode
 Turn LCD ON/OFF
 Set Display Position
 Initialize LCD
 Display Characters and Strings to LCD
 Turn Cursor ON/OFF ; Blink ON/OFF
System Initialization
The first task is to set up the memory space so that you will be able to access the external
devices. The chip select initialization code sets the LCD at address $40000000-$4000FFFF with
autoacknowledged transfers using chip select 3.
The next initialization function is an assembly routine that creates a copy of the vector table at
$30000000, fills it default handlers, changes the vector base pointer (VBR) to point to it, and
puts the processor into supervisor mode. Write an assembly function to call a C function which
will place the address of each interrupt service routine (ISR) for the timer, A/D, and button into
the vector table. The Pin Address Register (PAR) is programmed to set the 3 external interrupt
lines to be non-encoded. The function also programs the appropriate Interrupt Control Registers
(ICR’s) to be autovectored. The Interrupt Mode Register (IMR) is then set to enable only the
interrupts needed.
Timer and LCD Programming
Once a device has a memory space, interrupt request line, and ISR associated with it, its
individual initialization routine can be run. The timer is programmed by writing to its control
registers. The countdown reference number and clock source are set which determine the
frequency of the timer events.
Interrupt Service Routines
The ISR will consist of an assembly wrapper function that immediately calls a C function to
service the interrupt. When the C function returns, the wrap per functions then issues an RTE
instruction and the program returns to normal execution.
Lab 6: Serial Communication
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5.4 Assignment
1. If a debouncing chip were not available, draw the circuit to debounce the keypad signals.
2. Demonstrate your circuit to the TA and turn in your code and schematics for the circuits.
BONUS
Implement the code to create a simplistic calculator using your LCD for output and Keypad for
input. Implement the following functions:
Add, Subtract, Divide, Multiply
Lab 6: Serial Communication
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References
1. Clements, Alan. “Microprocessor Systems Design,” Third Edition, PWS Publishing
Company, 1997.
2. Coldfire Microprocessor Family Programmer’s Reference Manual. Motorola
Revision 1.
3. MCF5206 Coldfire Integrated Microprocessor User’s Manual. Motorola 1997.
4. Motorola’s Coldfire HomePage - http://www.mot.com/coldfire
References
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