Reconfigurable Communication Equipment on SmartSat-1 Nozomu NISHINAGA Makoto TAKEUCHI Ryutaro SUZUKI Wireless Communications Department National Institute of Information and Communications Technology 4-2-1 Nukuikita, Koganei, Tokyo, 184-8795 Japan E-mail: {nisinaga,takeuchi,ryutaro}@nict.go.jp Abstract Expanding the capacity of satellite communication systems requires the use of onboard switching and regenerative relay techniques. However, there are obvious difficulties in applying new communication technology that has appeared since a launch if a new modem and baseband switch are required to be loaded on a satellite. Currently, the lifetime of a communications satellite in orbit is from 10 to 20 years, and it is impossible to exchange or upgrade mission equipment loaded on a satellite after its deployment in space. This paper describes reconfigurable communication equipment to be loaded on a small experimental satellite, “SmartSat-1”. The reconfigurable communication equipment includes an onboard software radio system that consists of reconfigurable devices. New functions can be added by installing new configurations sent from a ground terminal after launching. 1. Introduction As a result of the development of terrestrial digital-subscriber lines, the so-called broadband (1.5 Mbps according to the ITU definition) network has been deployed to numerous residences. However, the service area is limited for economic reasons. The issue then arises of constructing a complementary network system in areas where broadband service is not available. It is common knowledge that a satellite communication system has the potential to solve this issue of the so-called ‘digital divide’. To establish a wide-area digital-subscriber network, the satellite communication system must be capable of servicing many users, and thus it is essential to be able to enlarge the system’s capacity. Investigations of the technology required to expand the capacity of geostationary communication satellites have focused on multi-beam transponder, regenerative-relay, and onboard switching systems [1-4]. Regenerative-relay or onboard switching systems are generally used in combination with multi-beam transponder systems. The regenerative-relay system, which differs from a conventional bent–pipe transponder system, needs an onboard modem to regenerate baseband signals from signals (radio waves) transmitted from earth stations. The baseband sig- nals are re-modulated and sent to their destination (earth stations). The regenerative-relay system separates uplinks and downlinks completely, enabling flexible link design as well as a regenerative-relay gain (3 dB maximum). Demodulating signals into baseband signals enables links to be aggregated, and the system’s capacity and number of users connecting to the system simultaneously to be increased by statistical multiplexing effects. To establish broadband satellite links, Ka (20-30 GHz) and higher bands must be used. However, a large rain margin (to allow for signal attenuation caused by rain) is required to use these bands. An onboard multi-rate modem that accepts various rates of transmitting signals is required to keep the rain margin low. Therefore, constructing a broadband satellite communication system requires onboard communication payloads with high functionality. The dilemma in loading high-function payloads is that these payloads cannot, of course, keep up with paradigm shifts in terrestrial systems. In recent years, there has been a trend towards designing commercial satellites with a 10- to 20-year lifetime to reduce launch risks and costs. In general, payloads cannot be repaired and replaced during orbit. Onboard equipment thus often becomes an obsolete dead weight, or out- began in 2004. Some experimental items, [SmartSat-1b ] [ SmartSat-1a ] Figure 1: SmartSat-1 dated in terms of functionality and throughput before reaching the end of its expected lifetime (i.e. it drops from high to low functionality). However, if onboard payloads were reconfigurable, the value of their payloads could be continuously redefined and maintained at a high level. In this paper, we report the development of reconfigurable communication equipment (RCE) for a small experimental satellite, “SmartSat-1”. The RCE has five components: a transmitting antenna, receiving antenna, X-band transponder, X-band solid-state amplifier, and onboard software-defined radio (OSDR). The OSDR consists of reconfigurable gate arrays, and the configuration of these gate arrays is rewritable during orbit. 2. SmartSat project The SmartSat project is a space application-proofing program using small satellites; the National Institute of Information and Communications Technology (NICT) plays a central role in the project. As a first step in this project, the Smartsat-1 program is now in progress. Twin 150-kg (80-kg payload) small satellites will be launched in 2008; the bus system and payloads for these satellites are under development at present. Basic design (bread-board model) of the bus system and payloads was completed in 2003 and development of the engineering flight model including space-weather observation, orbital-maintenance, optical inter-satellite communication, and reconfigurable communication experiments, are planned. The latest configurations of SmartSat-1a and -1b are shown in Fig. 1. These satellites are designed on the assumption of a piggy-back launch and will be thrown into a geostationary transfer orbit. 3. Reconfigurable Communication Equipment 3.1. Objectives There are two objectives for the RCE. 1. Space-proofing onboard software defined radio technology 2. Space-proofing versatile mission equipment based on concepts of functional redundancy and graceful degradation The first objective is to launch an onboard modem with a flexible link design and large bandwidth capable of being adapted to the latest communication technology. By loading a versatile modem that can be reconfigured via software or hardware configurations on a satellite, optimum modulation and demodulation methods and type of error-correcting code can be selected according to link conditions. In addition, the latest communication technologies and protocols can be added to the onboard modem by uploading new software or hardware configurations after the satellite has been deployed in space. With these features, the problem of rain attenuation can be overcome by establishing a broadband link with a higher carrier frequency, and high interoperability with terrestrial communication systems can be maintained by uploading new technology. The second objective is to take advantage of the flexibility of software-defined radio to ensure the onboard modem system has the required reliability. The current approach to ensuring the relia- Figure 3: First-generation OSDR ciency can be reduced by reconfiguration during orbit and by constructing mission equipment that carries out its required function on time. Total system redundancy can be decreased by using reconfigurable, versatile mission equipment that still provides the same level of reliability. The concept of degrading gracefully means that equipment problems are not regarded as losses of function but rather as Figure 4: Second generation OSDR Figure 2: Configuration of RCE bility of conventional satellite mission equipment is to use stand-by or triple-module redundancy, which requires two or three times the level of system resources for one piece of equipment or function. Essentially, specific mission equipment is required only when that function of the mission is being operated. This means that with conventional methods, the weight of the equipment continues to consume system resources whether the equipment is required or not. However, it is the function rather than the equipment that is essential. This ineffi- reduced capability. The reuse of faulty equipment becomes a soft-fault rather than a hard-fault decision. Different levels of computational complexity are required to carry out various functions. Thus, by assigning a lighter load to a degraded piece of versatile mission equipment, satellite resources can be used more effectively. For example, demodulation processing and decoding forward error correction codes imposes higher computational costs than modulation processing and encoding codes. Thus, the lifetime of the whole system can be ex- tended by assigning modulation processing Figure 5: Block diagram of OSDR and encoding to degraded equipment and demodulation processing and decoding to high-functioning equipment. 3.2. The RCE Configuration The configuration of the whole RCE is shown in Fig. 2. As mentioned above it consists of five components: a transmitting antenna (TX-ANT), receiving antenna (RX-ANT), X-band transponder, X-band solid-state amplifier, and onboard software-defined radio (OSDR). To conserve system resources, two patch-type antennas are used as the TX-ANT and RX-ANT. The total weight of the RCE is about 16 kg (not including the support structure) and the electrical power consumption is about 80 W. At present, we are attempting to reduce these values. 3.3. Configuration of the OSDR An investigation of space proofing the OSDR began in 2001. As part of the experimental production of an OSDR, a pre-BBM model was manufactured (Fig. 3). In this model, three 100,000-gate-class FPGAs (field-programmable gate arrays) were used. One of the three was used to control the other two. Using an onboard analog-to-digital converter and digital-to-analog converter, inputted analogue signals were processed by two FPGAs, producing analogue processed signals. The main feature of this model was that two operating modes, a normal operating mode and a ‘degenerate’ operating mode, were imple- mented. In the normal mode, two FPGAs acted as a full-spec digital-signal processor (FIR filter). In the degenerate mode, we assumed that one of the two FPGAs had collapsed and that the collapsed FPGA had detached logically. In this mode, the signal-processing performance was half that of the normal mode (i.e. the cut-off rate was halved). Based on the results of designing and manufacturing the pre-BBM model, a second-generation OSDR model was manufactured in 2003, as shown in Fig. 4. In this model, a multi-rate QPSK modulation and demodulation function from 2 kbps to 2 Mbps is implemented using seven FPGAs. Each FPGA has about 500,000 gates (Xilinx XC2VP4). A block diagram of the model is shown in Fig. 5. It has two FPGA banks, each containing three FPGAs. The remaining FPGA is used to control the other FPGAs. In the flight model of the OSDR, the control FPGA will be changed to a non-volatile type to ensure space-radiation tolerance. The six FPGAs are symmetrically connected by a switch fabric configured in the control FPGA. The model has two service classes determined by the reliability and computational complexity required. The details are described in the next subsection. 3.4. OSDR operating modes The second-generation OSDR model has three operating modes. 1. triple-redundancy mode 2. daisy-chain mode 3. degenerate mode The configuration of the triple-redundancy mode is shown in Fig. 6. This operating mode is for missions that require high reliability. These missions include receiving a configuration stream uploaded from an earth station and writing the stream to the non-volatile memory installed onboard. The same configuration data is written to all the FPGAs belonging to the same bank; the triple-module-redundancy voter configured in the control FPGA detects differences in the output of FPGAs belonging to the same Figure 7: Daisy-chain mode Figure 8: Degenerate mode Figure 6: Triple-module redundancy mode banks. It is well known that the data stored in an FPGA can be changed by single-event upsets caused by space radiation and that not only stored data but also configuration data (i.e. the circuit itself) may be altered. In the worst case, a pin assigned as an input by the original configuration data will be assigned as an output by the single event, thus damaging the circuit. If the mutual comparison of all FPGA outputs shows a discrepancy, the configuration data of the non-conforming FPGA must be corrected immediately. The configuration of the daisy-chain mode is shown in Fig. 7. Although this operating mode provides high throughput, it is less reliable than the triple-redundancy mode. In this mode, all the FPGAs can be used independently, enabling about three times the number of gates to be used in comparison with the triple-redundancy mode. Since a single-event upset cannot be detected in this mode, all the configuration data must be inspected via a readback operation. Unfortunately, there is little information available on readback data and mask-data formats for the Xilinx Virtex II Pro series. The total amount of configuration data required for six FPGAs to carry out a mission is about 18 Mbits, and another 36 Mbits is needed for the readback inspection (mask data and expected readback data). Because these 54 Mbits are too large to store onboard, we considered using an on-the-fly decompression technique to reduce memory costs. To date, we have found that the mask-data stream can be divided into two parts, that is, configuration-dependent and configuration-independent parts (i.e. a base part) by hacking these binary streams. Each mask-data stream can be constructed using the configuration-dependent part and base part via a binary operation. In general, the density of “1” in the configuration-dependent part is relatively light and the base part consists of several types of fixed data chunks. It is therefore easy to achieve a high-compression ratio using a conventional compression algorithm. The expected readback stream can be constructed from the original configuration data by a result of hacking. Thus, these techniques reduce the total amount of memory required. The degenerate mode is shown in Fig. 8 In this mode, a collapsed FPGA is detached logically from use. A bank that includes a collapsed FPGA is assigned a modulation/encoding function that requires lighter computational complexity than a demodula- Cross Section (cm2/bit) 1.E-06 1.E-07 1.E-08 1.E-09 V2-Pro 1.E-10 V2 1.E-11 0 10 20 30 40 LET(MeV cm2/mg) 50 60 70 Figure 9: Results of block RAM tests 1.0E-08 2 Cross Section[cm /bit] 1.0E-07 1.0E-09 1.0E-10 V2-Pro V2 (iMPACT) N Kr Ne V2 (FIVIT) Kr( 35°) 1.0E-11 0 10 20 30 40 50 60 70 2 LET [Mev cm /mg] Figure 10: Results of testing memory configuration tion /decoding function. To decide whether an FPGA is collapsed or not, a readback inspection and triple-module redundancy check are used simultaneously. Needless to say, it is not possible to rescue the OSDR from every fault. Depending on the fault, other devices may also collapse as a result of the failure of a device and methods of preventing this sort of chain reaction are under consideration. 4. Radiation testing of commercial S-RAM-type FPGA To evaluate the effect of space radiation, a radiation test was carried out in November 2003 at TIARA in Takasaki, Japan. The device selected for testing was a Virtex II Pro (XC2VP7-5FG456). In the test, three heavy ions, nitrogen, neon, and krypton, were injected into the device and the number of single-event upsets was counted. The results of this test were compared with the results of Virtex II tests described elsewhere [5]. Figure 9 shows the results of testing the block RAM region. Fixed data were written to the block RAM via an external interface and the outputs of the RAM were compared with the original data outside the FPGA. The results of tests of the configuration memory region are shown in Fig. 10. A single-event upset can be detected through a JTAG interface. In these figures, the saturated cross section and threshold LET show no differences between the results of the Virtex II. 5. Summary In this paper, we reported the ongoing development of reconfigurable communication equipment (RCE) for a small experimental satellite, “SmartSat-1”. The RCE has five components: a transmitting antenna, receiving antenna, X-band transponder, X-band solid-state amplifier, and onboard software-defined radio (OSDR). The OSDR consists of reconfigurable gate arrays; the configuration of these arrays is rewritable in orbit. Engineering design of a flight model of the OSDR began this year. References [1] M. Melnick and P. Hadinger, “Enabling Broadband Satellites", Satellite Communications, July 2000. [2] M. Hahn, M. Mollenhoff, J. Mittermaier, G. Proner and G. Elsner, “On-Board Control Computer for Communications Satellite", AIAA ICSSC-19, Vol. 1 180, April 2001. [3] B. L. Combridge, P. Cornfield, A. D. Craig, C. K. Leong, P. C. Marston, A. Wishart, G. Garofalo, M. Hollreiser and M. Witting, “Broadband Digital Processor Developments for Advanced Regenerative Communications Satellite”, AIAA ICSSC-19, Vol. 1 248, April 2001. [4] M. Marinelli and R. Giubilei, “A Regenerative Payload for Satellite Multimedia Communications", IEEE Multimedia, pp. 31-37, Oct. 1999. [5] G. Swift, C. Yui, and C. Carmichael,” Single-Event Upset Susceptibility Testing of the Xilinx Virtex II FPGA,” MAPLD2002, paper P29.