References

[R001] http://ark.intel.com/products/49021/Intel-Core-i3-330UM-Processor-(3M-cache-1_20-GHz)

This web site accessed July 16, 2011

[R002] Andrew S. Tanenbaum, Structured Computer Organization , Pearson/Prentice–Hall,

Fifth Edition, 2006, ISBN 0 – 13 – 148521 – 0.

[R003] http://en.wikipedia.org/wiki/Blue_Screen_of_Death, accessed July 18, 2011

[R004] Rob Williams, Computer Systems Architecture: A Networking Approach,

Pearson/Prentice–Hall, Second Edition, 2006, ISBN 0 – 32 – 134079 – 5.

[R005] Jonathan G. Koomey, Stephen Berard, Marla Sanchez, & Henry Wong;

Assessing Trends in the Electrical Efficiency of Computation Over Time ,

Final Report to Microsoft Corporation and Intel Corporation, submitted to the IEEE Annals of the History of Computing on August 5, 2009.

[R006] Katherine Yelick, Multicore: Fallout of a Hardware Revolution .

[R007] David A. Patterson & John L. Hennessy, Computer Organization and Design:

The Hardware/Software Interface , Morgan Kaufmann, 2005,

ISBN 1 – 55860 – 604 – 1.

[R008] Bruce Jacob, Spencer W. Ng, and David T. Wang, Memory Systems: Cache,

DRAM, Disk , Morgan Kaufmann, 2008, ISBN 978 – 0 – 12 – 379751 – 3.

[R009] Betty Prince, High Performance Memories , John Wiley & Sons, Ltd.,

1999, ISBN 0 – 471 – 98610 – 0.

[R010] David A. Patterson, Reduced Instruction Set Computers , Communications of the

ACM, Volume 28, Number 1, 1985. Reprinted in IEEE Tutorial Reduced Instruction

Set Computers [R05], edited by William Stallings, The Computer Science Press,

1986, ISBN 0–8181–0713–0.

[R011] Vincent P. Heuring and Harry F. Jordan, Computer Systems Design and Architecture ,

Prentice-Hall, 1997, ISBN 0 – 8053 – 4330 – X

[R012] http://www.cpu-world.com/Sockets/Slot%201%20(SC242).html, August 5, 2011

[R013] http://en.wikipedia.org/wiki/Slot_1, August 5, 2011

[R014] http://en.wikipedia.org/wiki/Slot_2, August 5, 2011

[R015] http://en.wikipedia.org/wiki/Socket_370, August 5, 2011

[R016] http://en.wikipedia.org/wiki/CPU_socket, August 5, 2011

[R017] http://en.wikipedia.org/wiki/LGA_775, August 5, 2011

[R018] Carl Hamacher, Zvonko Vranesic, and Safwat Zaky, Computer Organization ,

McGraw Hill, 2002, ISBN 978 – 0 – 07 – 232086 – 2.

[R019] Kip R. Irvine, Assembly Language for x86 Processors , Prentice Hall,

2011, ISBN 978 – 0 – 13 – 602212 – 1.

[R020] Peter Abel, IBM Assembly Language and Programming , Prentice Hall,

2001, ISBN 0 – 13 – 030655 – X.

[R021] Andrew S. Tanenbaum, Modern Operating Systems , Pearson/Prentice Hall,

Third Edition, 2008, ISBN 978 – 0 – 13 – 600663 – 3.

[R022] Daniel P. Bovet & Marco Cesati, Understanding the Linux Kernel ,

O’Reilly & Associates, 2001, ISBN 0 – 596 – 0002 – 2.

[R023] Scott Andrew Maxwell, LINUX Core Kernel Commentary

Coriolis Technology Press, 2001, ISBN 1 – 58880 – 149 – 7

[R024] Jon Meyer & Troy Downing, Java Virtual Machine

, O’Reilly & Associates,

1997, ISBN 1 – 56592 – 194 – 1.

[R025] Tim Lindholm & Frank Yellin,

The Java™ Virtual Machine Specification

, Second

Edition, 1999, ISBN 978 – 0 – 20143294 – 7. This is available for download at http://java.sun.com/docs/books/jvms/

[R026] Inside Java

[R027] Digital Equipment Corporation, PDP 11 Peripherals and Interfacing Handbook , 1972

[R028] D. S. Malik, C++ Programming: From Problem Analysis to Program Design , Second

Edition, Thompson Course Technology, 2004, ISBN 0 – 619 – 16042 – X.

[R029] http://www-03.ibm.com/ibm/history/exhibits/storage/storage_350.html, accessed July 7, 2011.

[R030] http://www.programmerfish.com/from-10m-to-1gb-cost-of-memory-over-the-years, accessed June 28, 2011.

[R031] C. D. Mee and E. D. Daniel, editors. 1996. Magnetic Recording Technology ,

McGraw–Hill, 1996.

[R031] http://en.wikipedia.org/wiki/Hamming_code

[R032] James F. Kurose and Keith W. Ross, Computer Networking: A Top–Down Approach

Featuring the Internet , Third Edition,

Pearson / Addison–Wesley, 2005. ISBN 0 – 321 – 22735 – 2.

[R033] William Stallings, Computer Organization and Architecture: Designing for

Performance, Prentice Hall, 2010, ISBN 978 – 0 – 13 – 607373 – 4.

[R034] http://en.wikipedia.org/wiki/Prefetch_buffer, accessed July 3, 2011.

[R035] David Patterson, EECS 252 Graduate Computer Architecture (Lecture 4 – Memory

Hierarchy Review), 1/30/2006, http://www-inst.eecs.berkeley.edu/~cs252