Introduction
Nirmalya Choudhury
993-51-4806
9/27/01
This project was the first of many hardware labs formulated to give hands on experience in designing, building, and debugging simple logic circuits. There are two main goals of this lab. The first is to build, test, and debug a 1-bit half adder according to a given diagram in the lab document (figure 1-10). The second goal is to design, debug, and test a TTL 1-bit full adder from a given SOP implementation. Upon completion of these tasks, the experimenter will have the knowledge and experience to:

Put Boolean algebra, SOP implementations, and circuit layouts and put them in
physical form as combinational logic circuits

Construct a 1-bit half adder using a digital trainer board

Debug the half adder using a logic probe

Construct a 1-bit full adder using a digital trainer board

Debug the full adder using a logic probe

“Realize the sum and carry functions using TLL hardware
1 ”

“Write the Boolean algebraic expressions that characterize the sum and carry
functions for the full adder 1 ”
Experiment Results
Task 1: Build the 1-Bit Half Adder
Task Statement
“With the power off, build the half adder using the design given in Figure 1-10 on a digital prototyping board. Use switches to drive the inputs (A&B) of the circuit and
LED’s to view the output (SUM & CRY) voltages or digital logic levels. Be very careful that you have the circuit set up correctly and have the V
CC and GND connected correctly.
Also, be sure to use the effective wiring practices described in the document.
1 ”
Work Performed
Materials Needed:

Digital Trainer Board

The following integrated circuits: 7404 (Hex Inverters), 7408 (Quad 2-input
AND gate), 7432 (Quad 2-input OR gate).

Copper Wire
[1] D.J. Tylavsky, Digital Design for the Laboratory : Hardware & Simulation ( using Logic Works TM 4 ),
CentrePoint Publishing, Tempe AZ, 1999
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Nirmalya Choudhury
993-51-4806
9/27/01
Following the directives and the given circuit layout (Figure 1-10) in the task statement, I constructed a 1-bit half adder. I was very careful to connect each wire to the proper terminals, making sure each wire was firmly in place and uncluttered. I knew that if I were meticulously careful in initially constructing the half adder, I would have far less problems with the circuit when it was turned on.
What was Learned
At this point there was really no experimenting to be done so nothing was learned. This task was simply applying previous knowledge.
Task 2: Test the SUM & CRY of the 1-Bit Half-Adder with LED
Task Statement
“Now turn on the power, test each output (SUM & CRY) by trying all input combinations in the truth table (Figure 1-4), and record the results of your tests in your lab notebook. If it does not work as you expect, find the errors by debugging it as described in Hardware
Lab 0. When it does work as you expect, move on to the next task
1 .”
2

Work Performed
Nirmalya Choudhury
993-51-4806
9/27/01
Materials Needed:

Previously built half-adder (Task 1)

Logic Probe
As it told me to do in the task statement, I turned on the power, tested each output according to the corresponding truth table, and recorded the results in my lab notes. As I had hoped, my half-adder worked properly according to the truth tables. As a result, no debugging was needed at this time.
The half adder circuit -
A
0
1
0
1
B
My readings were as follows: -
A
0
0
B
0
1
1
1
0
1
What was Learned
1
0
SUM
0
1
CRY
0
0
0
1
0 1
3

Nirmalya Choudhury
993-51-4806
9/27/01
After I found that my circuit had no errors in it, I realize that it pays of a great deal to go through the initial construction with meticulous detail. Because I was so careful initially,
I saved myself considerable debugging time.
Task 3: Debugging
Task Statement
“Turn your back and have your lab partner introduce an error into the circuit. Practice finding the errors using the debugging techniques described previously. Be sure to record in your notebook how the circuit was changed and how you used the debugging techniques to discover those changes. Real world digital systems are complicated. The debugging skills you acquire here will serve you well throughout the rest of your education and career
1 .”
Work Performed
Materials Needed

Previously built half-adder (Task 1)
Since I did my lab alone, I asked the TA to change my circuit, without my knowing what he did. He found some way to tamper with the half-adder I had so carefully constructed.
When he informed me that he was done, I began to debug the circuit. I visually saw no problems with the circuit. I first checked the connections to V
CC
and GND to ensure that everything was powered. Everything was fine there. Next I checked the switches with the two given truth tables and found that the outputs did not correspond. Since my SUM output was incorrect, I knew that either my (A+B) input, or my (A’+B’) input had some errors. I was not sure which chip to test first. As a result I decided it might prove faster to simply check each wire with the given layout to see if the TA had simply switched a connection. I systematically checked each connection on the circuit and found that all terminals were connected in the correct order. So I figured that the problem had to be a loose wire. While going through the circuit I found one of the wires, specifically the output from (A+B), was unplugged slightly. I checked the outputs with the truth tables once again, after pushing the wire back in. Finally I had a working half-adder.
What was Learned
This long, drawn-out process just further justified the fact that it pays off to be extremely careful in first building a circuit. It was extremely frustrating to have to go through my entire half-adder and try to find a phantom problem. However, I did gain experience in debugging that will help me in later experiments.
Task 4: Completely Test your Half Adder Circuit Using a Logic Probe
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Task Statement
Nirmalya Choudhury
993-51-4806
9/27/01
“Using a logic probe, test each point in the circuit for different input combinations.
Satisfy yourself that every part of the circuit is working as you think it should, i.e., the functions SUM, CRY, and all intermediate outputs, M and N, are consistent with the truth tables shown in Figure 1-6 and Figure 1-7
1 .”
Work Performed
Materials Needed:

Previously built half-adder (Task 1)

Logic Probe
Much to my disappointment, I had to once again go through my masterpiece. Using the logic probe I tested each output on each of the integrated circuits. As I predicted, each of the outputs matched the given truth tables.
What was Learned
In this task I once again was reminded that debugging and testing is a tedious task.
However it was a relief to see that my circuit did in fact work as it was supposed to.
Task 5: Build, Debug, and Test a TTL 1-Bit Full Adder
Task Statement
“Build, debug and test a 1-bit full-adder circuit using the schematic shown in Figure 1-15.
Provide a complete description of your circuit schematic as part of your lab. This means identifying which pins of which TTL IC’s are used to implement each of the Boolean gates in your design. Select the measurements you make so that they can be used in your report to convince the reader that your circuit functions as a 1-bit full adder
1 .”
Work Performed
Materials Needed:

Digital Trainer Board

The following integrated circuits: 74LS86 (Quad 2-input exclusive OR gate),
74LS08 (Quad 2-input AND gate), and 74LS32 (Quad 2-input AND gate)

Copper Wire

Logic Probe
I began this task by evaluating the given SOP implementation (Figure 1-15) and created the following circuit schematic to match:
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Nirmalya Choudhury
993-51-4806
9/27/01
First I drew in the IC’s in the layout I would later put them onto the board. I then drew in where to connect the V
CC
and GND. Then I assigned three logic switches respectively to
A, B, and C in
. I then mapped out where to connect the A, B, and C in
signals to the IC’s.
These connections were as shown above. According to the above diagram, the 74LS86 was used to exclusively OR A and B (terminals 13 and 12) together. The output of that
(terminal 11) was then routed to terminal 10 to be added to C in
(Terminal 9). The output of that (terminal 8) was then routed to the LED I had assigned to SUM. So basically the
74LS86 IC was used to perform the following calculation:
A

B

C in
The 74LS08 was used to perform several AND calculations. First, terminals 13 and 12 were used to AND A and C in
together. The result was outputted to terminal 11.
Terminals 10 and 9 were used to AND B and A together. The result was then outputted through terminal 8. Terminals 1 and 2 were used to AND B and C in
together. The result was outputted through terminal 3. So basically, the 74LS08 IC was used to perform the following calculations:
AC in
AB and BC in
Finally, the 74LS32 was used to perform the final OR calculations in the circuit. First, terminals 13 and 12 were used to OR AB and AC in
together. The result was outputted through terminal 11. Terminals 10 and 9 were used to OR the output from terminal 11
(AB + AC in
) and BC in
. We had to do it in such a fashion because the IC 74LS32 had
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1
0
1
0
B
1
0
C
A
Nirmalya Choudhury
993-51-4806
9/27/01 only 2-input OR gates. The resulting output was then routed to the LED I had assigned to
CRY. So basically, the 74LS32 IC was used to perform the following calculation:
AB + AC in and (AB + AC in
) + BC in
After I had drawn the above diagram, a great deal of the work was finished. From this point I constructed a physical circuit on the trainer board to match the above diagram exactly. Once I finished constructing the 1-bit full adder, I checked all calculations with the truth tables given in the lab documentation (Table 1-1, Figure 1-11, and Figure 1-12).
After testing them all, I came to the conclusion that my circuit was working as it should.
To make sure the correct results were in fact as they should be, I carefully went through and tested each output on each of the IC’s. Once again, the circuit proved to be absolutely correct. I then concluded that I had in fact built a functional 1-bit full adder.
The full adder circuit –
0
0
7

My readings were as follows: -
C in
B A AB
Nirmalya Choudhury
993-51-4806
9/27/01
0
1
0
1
0
1
0
0
0
0
1
0
0
0
AC
0
0
0
0
0
1
0 in
BC
0
0
0
0
0
0
1 in
A
0
1
1
0
0
1
1

B A


C
B
(SUM)
0
1
1
0
1
0
0
AB +
AC in
+
BC in
(CRY)
0 0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
1
1 1 1 1 1 1 0 1 1
What was Learned
Out of the whole lab, this task is where I learned the most. I gained a great deal of experience from looking at a SOP implementation and transferring it to a circuit diagram of my own. I then gained a large understanding of how the IC’s perform the Boolean algebra in physical form.
Conclusion
I went in to this lab with a very limited level of knowledge towards the concept of building half and full adders. Frankly I really had no clue as to what they did and what the why they were used. After accomplishing all of the goals of this lab, I now feel that I have a firm grasp on building, debugging, and testing half and full adders. It was also very nice, for a change, to see the physical representation of what we had been doing mathematically in class. Overall this lab proved to be very useful in the world of electrical engineering.
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