ii. course contents

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F A T I H U N I V E R S I T Y

Faculty of Engineering

Department of Electronics Engineering

Course Information for

Electronic Circuits and Devices

I. COURSE DESCRIPTION

Course Code:

EEE 292

Course Name:

Electronic Circuits and Devices

Course Objectives:

The objectives of this course are to develop a basic understanding on: Circuit Theory and

Electronics. Topics covered include: Concept of voltage, current and power. Ohm's Law, KCL, KVL. Nodal and mesh analysis, Thevenin Equivalent circuits. Semiconductor diodes and diode applications. Transistor biasing and operation.

Operational amplifiers and applications.

Prerequisites: PHYS 104, MATH 113

Special Requirements:

None

Instructor:

Özgür Özdemir, Assist. Prof.

Office:

EA-502,

E-mail

: [email protected]

Office Hours:

Wednesday: 13:00-15:00, Thursday: 15:00-17:00

TA:

Selahattin Nesil

Textbooks:

1.

2.

Allan R. Hambley, Electrical Engineering Principles and Applications, 3 rd

Ed., Prentice Hall, New Jersey.

Robert L. Boylestad and Louis Nashelsky, Electronic Devices and Circuit Theory, 9 th

Ed., Prentice Hall, New

Jersey, 2006.

II. COURSE CONTENTS

1. Chapter 1

*

: Introduction – Week 1

Ideal sources, resistors and Ohm’s Law, KCL, KVL, dependent sources, and instantaneous power.

2. Chapter 2

*

: Resistive Circuits- Week 2 & 3

Nodal analysis, mesh analysis, and loop analysis. Thevenin’s theorem, Nortons theorem, and principle of superposition.

3. Chapter 1

**

: Semiconductor Diodes – Week 4

Semiconductor materials, energy levels, extrinsic materials: n-type and p-type, semiconductor diode, resistance levels, and diode equivalent circuits.

4. Chapter 2

**

: Diode Applications – Weeks 5 & 6

Load line analysis, series and parallel diode configurations, rectifier circuits, clippers and clampers, and Zener diodes.

5. Chapter 3

**

: Bipolar Junction Transistors – Weeks 7 & 8

Transistor construction and operation, common-base configuration, transistor amplifying action, common-emitter and common-collector configuration and limits of operation.

*

Allan R. Hambley, Electrical Engineering Principles and Applications, 3 rd

Ed., Prentice Hall, New Jersey.

**

R. Boylestad and L. Nashelsky, Electronic Devices and Circuit Theory, 9 th

Ed., Prentice Hall, New Jersey, 2006.

1

6. Chapter 4

**

: DC Biasing of BJTs – Week 9

Operating point, fixed-bias circuit, emitter bias, voltage-divider bias, dc-bias with voltage feedback, design operations, and transistor switching networks.

7. Chapter 5

**

: AC Analysis of BJTs - Weeks 10 & 11

Application in the ac domain, BJT transistor modeling, the r e

and the hybrid equivalent model, hybrid п model, CE fixed bias configuration, voltage divider bias, CE emitter-bias configuration, emitter-follower configuration, CB configuration, current gain calculation, and effect of load and source resistances.

8. Chapters 3

*

, 10

**

and 11

**

: Operational Amplifiers – Weeks 12, 13

Op-Amp basics, practical op-amp circuits, constant gain multiplier, voltage summing, voltage buffer, controlled sources, and instrumentation circuits.

III. LABORATORY EXPERIMENTS

week 1 11/2-15/2 week 2 week 3 week 4

18/2-22/2

25/2-29/2

3/3-7/3 no lab familiarizing with lab equipments experiment 1 DC Circuits experiment 2 Ohm's Law, Series and Parallel Connection of Resistors week 5 week 6 week 7 week 8 week 9

10/3-14/3

17/3-21/3

24/3-28/3

31/3-4/4

7/4-11/4 week 10 14/4-18/4 week 11 21/4-25/4 experiment 3 Voltage Divider in Load and No-load Operations , Wheatstone Bridge experiment 4

Thevenin’s Theorem experiment 5 Diode Characteristics experiment 6 Series and Parallel Diode Configurations experiment 7 Half Wave and Full Wave Rectification experiment 8 Bipolar Junction Transistors (BJT) Characteristics no lab week 12 28/4-2/5 week 13 5/5-9/5 week 14 12/5-16/5 experiment 9 Fixed and Voltage Divider Bias of BJT experiment 10 Op-Amp Circuits make up week week 15 19/5-20/5 no lab

IV. EXAM DATES, GRADING POLICY AND ATTENDANCE

Exam Dates

Midterm Exam-1:

Midterm Exam-2:

Final Exams:

Grading Policy

Homework: 10 %,

Laboratory Work: 20 %

Midterm Exam-1: 20 %,

Midterm Exam-2: 20 %,

Final Exam: 30 %.

Honor Code:

All work done on the exams will be done on your own and pledged. Students may discuss homework concepts and approaches, but the work will be done by the individual. Group or copied solutions are not permitted.

Homework is considered pledged simply by its receipt.

Late Work and Examinations:

Normally, homework is due one week from the assigned date, unless otherwise indicated or previous arrangements are made. Late homework will be accepted due to sickness only. Only selected homework problems may be graded from the set turned in. The others will be checked for completion.

Exams will be closed book. One A4 pages during the midterms and two A4 pages during the final exam will be allowed for writing formulas. Calculators with advanced memory are forbidden.

2

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