OPEN COURSE PROGRAM
IMEC ACADEMY
LECTURER
imec academy
Harry Veendrick (Bits on Chips)
BIOGRAPHY
OPEN COURSE PROGRAM
NANOMETER CMOS ICS
April 8th - April 12th 2013
COURSE ABSTRACT
The Nanometer CMOS ICs course has evolved from 30 years of training students (master and PhD) as well
as beginning and experienced professional engineers both in a scientific and industrial R&D environment. In
the industrial semiconductor research environment around 1980, there were separate courses available for
IC designers, for IC process engineers, for IC test engineers, etc. However, when a designer was interested
in process development, he had to subscribe to the process technology course, but was lost after the first
chapter, because he was overwhelmed by all the chemical reactions needed to deposit, e.g. a polysilicon layer.
The nanometer CMOS ICs course was developed to bridge the gap between the various semiconductor
disciplines:design,layout,test,lithography,processdevelopment,productdesign,packageengineering,etc.aseach
of these disciplines can no longer be working fully independent of the others. Students, PhDs and professionals
must understand the full development chain of an integrated circuit in order to put their own (future) work in
perspective.
Important criteria, such as performance, cost aspects, design cost and design time, low power optimisation,
design for testability and reliability are also covered and elaborated in this course. The course has been given
far more than a hundred times. At each occasion, the course was evaluated by the participating students and
was continuously adapted to their feedback. The courses are kept fully up-to-date and contain state-of-the-art
material.
Harry Veendrick joined Philips Research
Laboratories, in 1977, where he has been involved
in the design of a variety of integrated circuits:
memories, gate arrays and complex video-signal
processors. His principle research interests include
the design of advanced complex digital integrated
circuits. Complementary to this is his interest in IC
fabrication technology, which allows him to act
as an interface between digital IC design and IC
process technology.
He holds 25 US patents in the area of chip design,
with several other patents pending. He is the
(co-) author of many publications on robust, highperformance and low-power CMOS IC design. In this
respect, he has contributed to many conferences and
conference workshops, as reviewer, speaker, invited
speaker,panelist,organizer,guesteditorandprogram
committee member. In addition, he is the author
of five other books on MOS integrated circuits
(1990,1992,1998, 2002 and 2008) (search the
Internet). He is a co-author of Low-Power Electronics
Design (CRC Press, 2004).
In 2002 he received the PhD degree in electronic
engineering from the Technical University of
Eindhoven, The Netherlands. He was a Research
Fellow at Philips Research Laboratories and NXP
Research and has been a Visiting Professor to the
Department of Electronic and Electrical Engineering
of the University of Strathclyde, Glasgow, Scotland,
UK.
Currently he runs a private training company
which provides various courses on integrated
circuits, from a popular one-day course to
an advanced detailed five-day course (www.
bitsonchips.com).
OPEN COURSE PROGRAM
IMEC ACADEMY
PROGRAM
Basic principles
MOS physics. Characteristics. Equations.
Capacitances.
Geometry effects
Temperature behaviour. Short- and narrowchannel effects. Transistor leakage mechanisms.
CMOS technology
Extensive lithography overview. Basic CMOS
processing steps. Process flow. From a basic
nMOS process to a 32nm CMOS process. Future
processes, SOI, Finfet.
CMOS design
Electrical, logic and layout design, with 50nm
CMOS design rules and process cross sections.
CMOS memories
Memory architectures, SRAM, DRAM, ROM,
PROM, E(E)PROM, NAND- and NOR-flash
memories, stand-alone and embedded memories.
VLSI and ASICs
Design flow, hierarchy levels. IP cores and re-use.
ASICs. ASIC design styles: standard cell, gate array
(sea-of-gates)designs,PLDs,(re)configurablelogic,
embedded FPGAs, etc.
Low-power
Battery overview. Extensive discussion and
complete overview of existing technology and
design options for low power and low leakage.
Robustness of ICs
Extensive discussion of reliability and signal
integrity issues: latch-up, punch-through, ESD
protection circuits, hot-carrier degradation.
Electromigration, NBTI, joule heating, clocking,
timing, signal integrity, supply and substrate noise,
power integrity, decoupling, cross-talk, noise
margins, EMC, soft-errors and variability, etc.
Testing, debugging, failure analysis and yield,
packaging
Complete overview of testing, Shmoo-plots,
design for debug, basics of yield and simple model,
packaging characteristics and trends, diagnosis
techniques, state-of-the-art failure analysis
techniques. Repair, focussed ion beam, etc.
Scaling trends and roadblocks
Costs and roadblocks for 32nm technologies and
beyond. Speed and power trends. Design, masks
and processing costs. Roadblocks and solutions.
End of Moore’s Law: ‘More of Moore’ and ‘More
than Moore’.
LEARNING PROCESS
The material of the course is presented as a
completestory,startingwiththebasicsemiconductor
physics and ending with the fully tested packaged
devices. The complete course is supported by a
770 pages full colour hard-cover book ‘Nanometer
CMOS Ics, from Basics to ASICs ‘ that contains all
of the presented material. The information gained
in one chapter is used in the next ones and as such
the students are smoothly introduced into the
complete chip creation process. The course will take
full five days from 8.30 in the morning till 17.30 in
the afternoon. An important part of each learning
process is a hands-on activity.Therefore, each chapter
is completed with student homework, either during
the class or in the evening, so that the students
can gradually understand and capture all of the
subjects step by step. At the end of the course the
students will be given a final examination that they
can take home. This examination covers the most
important parts and subjects of this course and will
take several (5 to 7) hours of their private time in
the two weeks after the course. This examination
must be sent in within two weeks after the course.
This course is accepted by the doctoral school at
the KU Leuven, by the engineering department of
Electronics, Systems and Automation. PhD students
can be granted 3 ECTS credits if they succeed in the
examination.
WHO SHOULD ATTEND?
The contents of this course in combination with
the way they are presented, make this course
perfectly suited for all levels of students (PhD,
Post-doc and master) as well as for all industrial
semiconductor R&D professionals and university
scientific staff. Because the trainer has more than
30 years of practical experience in an industrial
research environment, as well as in the training of
thousands of students and engineers, the course
exhibits an optimal match between theory and
practice. As already explained before, the course is
a continuous and complete story. What is explained
in one chapter will be used in the other ones.
Therefore the participants should follow the
complete course and not just attend only
those lectures that seem most important
to them. Unnecessary to say that when completed
this course successfully, each student has sufficient
baggage to subscribe to follow-up courses on specific
semiconductor topics.
This course is accepted by the doctoral school at
the KU Leuven, by the engineering department of
Electronics, Systems and Automation. PhD students
can be granted 3 ECTS credits after evaluation
based upon a paper on a theme to be agreed with
the course program board. The course fulfills all the
criteria imposed by the FP7 EURO-DOTS program
(www.eurodots.org) and is accredited as a PhD
course and has been granted the EURO-DOTS
label. This means that PhD students can select this
course if it fits directly with their area of interest
as a complement to courses that they can take at
their home university. ECTS credits are awarded to
individual students after completion of the course
and after successfully passing the exam/evaluation
organized at the completion of the course. Moreover,
PhD students, fulfilling the requirements, can apply
for a scholarship (www.eurodots.org - Students
- Rules application and attribution scholarships),
that can cover course subscription fee, travel and
accomodation costs. Many more EURO-DOTS
labeled and accredited PhD courses can be found
on www.eurodots.org. Courses are open for all PhD
students in Europe.
OPEN COURSE PROGRAM
FEES AND REGULATIONS
liability is limited to a full refund of the course fee.
The course includes a copy of the book: ‘Nanometer
CMOS ICs, from Basics to ASICs’ by Harry Veendrick,
Springer 2008.
Cancellation by a participant between 2-14 days
before the start of the course is subject to a 200
euro administration fee. A 400 euro fee will be
charged for cancellation within 48 hours of the
start of the course. Registrant substitutions may
be made at any time. Registrants who do not
attend and do not cancel are subject to full fee
forfeiture.
The fee of 2500 euro (excl. 21% VAT) includes
besides the book, all lectures, lunches and
refreshment breaks.
Flemish academic staff can participate free of
charge.
Flemish companies should contact the training
office (academy@imec.be) for special conditions.
Discounted fee for PhD students: 1000 euro. (VAT
incl.)
The course fulfills all the criteria imposed by
the FP7 EURO-DOTS program (www.eurodots.
org) and is accredited as a PhD course and
has been granted the EURO-DOTS label. This
means that PhD students can select this course
if it fits directly with their area of interest as a
complement to courses that they can take at
their home university. ECTS credits are awarded
to individual students after completion of the
course and after successfully passing the exam/
evaluation organized at the completion of the
course. Moreover, PhD students, fulfilling the
requirements, can apply for a scholarship (www.
eurodots.org - Students - Rules application and
attribution scholarships), that can cover course
subscription fee, travel and accomodation costs.
Many more EURO-DOTS labeled and accredited
PhD courses can be found on www.eurodots.
org - Courses and are open for all PhD students in
Europe.
Hotel accommodations and meals other than
lunches are not included in the course fee.
Imec reserves the right to cancel the program up
to two weeks before the start of the course and its
COURSE LOCATION
NANOMETER CMOS ICS
REGISTRATION FORM
Return this form on fax to + 32 16 28 83 83 or by e-mail to academy@imec.be.
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The course will take place at imec, Belgium,
Leuven. Imec is the largest independent
microelectronics R&D center in Europe, with an
annual budget of over 300 million euro and a staff
of over 1470 people. R&D ranges from design of
complex single-chip and single package systems
for telecommunications and multimedia, over
new process technologies (18nm node) to nonvolatile memories, optoelectronics, photo-voltaics,
area-array packaging, etc.
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PAYMENT
Payment terms: Payment has to be done 7 days after invoice date or prior to course attendance
(whichever is earlier). Anyhow payment must be received before the start of the course.
Payment methods: bank transfer preferred, payments by VISA, EC/MC or American Express are
also accepted. If no payment is received by the start of the course, cash payment or payment by
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an official company purchase order. We should have your order 3 days after subscription: mail to
Karolien Vandeveegaete, Kapeldreef 75, 3001 Leuven, Belgium, or email Karolien.Vandeveegaete@
imec.be. Invoices will not be changed.
imec Belgium
Kapeldreef 75,B-3001 Leuven – Belgium
Website www.imec-academy.be
Phone +32 16 28 12 50
Fax +32 16 28 83 83
E-mail academy@imec.be
Imec is a registered trademark for the activities of imec International (a legal entity set up under Belgian law as a ‘stichting van openbaar nut’), imec Belgium (imec vzw supported by the Flemish Government), imec the
Netherlands (Stichting imec Nederland, part of Holst Centre which is supported by the Dutch Government), imec Taiwan (imec Taiwan Co.) and imec China (imec Microelectronics (Shangai) Co. Ltd.)
OPEN COURSE PROGRAM
IMEC ACADEMY