Counters.htm
Synchronous Counters and Ripple Counters.
The 7493 is a good example of a Ripple Counter. A lower stage toggling goes to the clock of the next
higher stage and toggles it, which toggles the next higher stage, which toggles the next higher stage.
After each clock pulse there is a period of chaos before the latches settle. This can be as long as 50 nanoseconds. This period of chaos can cause an erroneous effect on a decoder interpreting the output. For that
50 ns the outputs of the decoder glitch randomly. This also limits how high a frequency the counter can
operate. As we get to higher clock speeds there becomes less difference between the width of the clock
pulse and the glitches in our outputs.
Synchronous counters are an improvement on this design. The 74193 is a good example of such a
counter. The outputs of the counters are feed back to the data inputs. On the clock, all outputs change at
the same time, according to the state of the last outputs. The counter goes from stable state to stable state
with none of the chaos associated with Ripple Counters.
This also makes for an easy design to count upwards or backwards, or shift up or down.
(ref. DEM7490.SCH, DEM7491.SCH, DEM7492.SCH, DEM7493.SCH)
These are a series of Ripple counters. The 7490 is a Divide by 10 (2 and 5), the 7491 is an eight stage
Shift Register (only serial in and serial out available), the 7492 is a Divide by 12 (2, 3, 2), and the 7493 is
a straight four bit Binary Counter.
On the 7490, 7492, and 7493 there are two sections. One is a Divide by 2, and the second section divides
by 5 (7490), 6 (7492), or 8 (7493). The second section of the 7492 is actually a Divide by 3 followed by
a Divide by 2 to make the output symmetrical.
Decimal, Binary, Octal, Hexadecimal, and Bi-Quinary
Decimal (base 10) is what we think of as a normal number system. Each digit position has ten possible
numbers (0 to 9), and each digit position to the left is ten times more than the one on its right. We have
1's, 10's, 100's, 1000's, etc.
Octal (base 8) is a system that has only eight possible numbers (0 to 7), and each digit position to the left
is eight times more than the one to its right. We have 1's, 8's, 64's, 512's, etc.
Binary (base 2) is a system that has only two possible numbers, 0 and 1. A digit is either a one (High), or
zero (Low). Each digit position to the left is two times more than the one on its right. We have 1's, 2's,
4's, 8's, etc. This is easiest to implement into circuitry because a latch has two possible states.
Hexadecimal (base 16) is a system that has sixteen possible numbers. Being limited to a language that
only recognizes ten numbers, we improvise by continuing after nine by starting with the alphabet (0, 1, 2,
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Counters.htm
3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F). Each digit to the left 1s 16 times more than the one on its right. We
have 1's, 16's, 256's, 4096's, etc.
The Bi-Quinary system requires a little more explaining. As the name implies, it is a 2 and 5 number
system. That is, a bi-quinary counter divides by 2, then divides by five before it carries to the next
position. Each bi-quinary digit is a digit-pair of two numbers. One counts from 0 to 4 (5 states), the next
counts from 0 to 1 (2 states). A bi-quinary count goes like this.
0 000 0
0 001 1
0 010 2
0 011 3
0 100 4
1 000 5
1 001 6
1 010 7
1 011 8
1 100 9
To continue beyond one digit pair ...
0 000 0 000 0
0 000 0 001 1
0 000 0 010 2
0 000 0 011 3
0 000 0 100 4
0 000 1 000 5
0 000 1 001 6
0 000 1 010 7
0 000 1 011 8
0 000 1 100 9
0 001 0 000 10
0 001 0 001 11
0 001 0 010 12
0 001 0 011 13
0 001 0 100 14
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0 001 1 000 15
0 001 1 001 16
0 001 1 010 17
0 001 1 011 18
0 001 1 100 19
Other counting methods are possible, but have limited application. For an example see the 7444, an
Excess-3 Grey code Decoder.
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