HUMBOLDT-UNIVERSITÄT ZU BERLIN INSTITUT FÜR INFORMATIK COMPUTER ARCHITECTURE Lecture 9 MICROPROGRAMMED CONTROL UNIT Sommersemester 2002 Leitung: Prof. Dr. Miroslaw Malek www.informatik.hu-berlin.de/rok/ca CA - IX - MCU - 1 MICROPROGRAMMED CONTROL UNIT Microprogramming is an orderly method of designing the control unit of a conventional computer (Wilkes 1951). The term icroprogramming is based on the analogy between sequence of transfer required to execute a machine instruction and the sequence of individual instructions in conventional user program. Each step is called microinstruction and complete set of steps required to process a machine instruction is called the microprogram. CA - IX - MCU - 2 BASIC LAYOUT OF A MICROPROGRAMMED CONTROL UNIT Control memory stores a microprogram corresponding to each op-code of a conventional instruction. IR Op OR Control memory Microinstruction register Micro op Address Address Control address register Conditions FFs Control signal to various functional subunits CA - IX - MCU - 3 Decoder BASIC EXECUTION SEQUENCE Control sequence for execution of the instruction "Add contents of a memory location addressed in absolute mode to register R1." Step Action 1 PCout, MARin, Read, Clear Y, Set carry-in to ALU, Add, Zin 2 Zout, PCin, Wait for MFC 3 MDRout, IRin 4 Address-field-of-IRout, MARin, Read 5 R1out, Yin, Wait for MFC 6 MDRout , Add, Zin 7 Zout , R1in, End Control sequence for an unconditional branch instruction. Step Action 1 PCout, MARin, Read, Clear Y, Set carry-in to ALU, Add, Zin 2 Zout, PCin, Wait for MFC 3 MDRout, IRin 4 PCout, Yin 5 Address-field-of-IRout , Add, Zin 6 Zout , PCin, End CA - IX - MCU - 4 MICROCODE EXECUTION 1. Op-code is decoded. 2. Microinstructions are retrieved from control memory (control address register and the decoder serve as the address register and selection mechanism or control unit). 3. The control address register locates the microinstruction to be retrieved from control memory. 4. The microinstruction register holds the retrieved microinstruction - micro opcode and address of the next microinstruction in the control memory 5. Current microinstruction is executed. 6. The address of the next microinstruction is entered into the control memory to retrieve the next microinstruction. 7. If all microinstructions were executed, then store next op-code of conventional instruction in the control address register, if not, execute remaining microinstruction. 8. Conditional jumps are implemented by letting the states of some conditional flip-flops modify the address of theCAnext microinstruction to be retrieved. - IX - MCU - 5 WILKES' IMPLEMENTATION OF MICROPROGRAM CONTROL (1951) Matrix A Matrix B Decoding tree Timing pulse Control lines to gates in arithmetic unit, control registers, etc. Control address register From operation field of microinstruction register Address for next microinstruction From conditional flipflop Delay CA - IX - MCU - 6 VARIATIONS IN WILKES' IMPLEMENTATION 1. Microinstruction address selection. 2. Instruction set strategies (control word organization). Ad 1. Possible modifications to address selection: 1) The control address register is modified to function as a counter when the next microinstruction follows the current address and as a register when a branch is required (similar to Wilkes' scheme). - control address acts as a counter or a register 2) Addition of a register to hold the address of the next microinstruction (µPC). 3) Control memory may be organized in two storage matrices each with its own decoding tree, thus providing faster operation at lower cost, since the size of the decoder is reduced. CA - IX - MCU - 7 MICROPROGRAMMED CONTROL UNIT WITH A MICROPROGRAM COUNTER (µPC) Instruction register IR Opcode AC = 0 AC < 0 MQ(n-1) COUNT=n-2 V Decoding circuits K Branch address MUX Load branch address Condition select Increment Reset µPC 8 Control memory (256 x 36 bits) 3 8 36 CMDR 25 Control signals CA - IX - MCU - 8 MICROPROGRAMMED CONTROL UNIT WITH TWO STORAGE MATRICES IR Op-code Control-address register Control memory (address) matrix Control memory read register Control memory (command) matrix Control signals CA - IX - MCU - 9 VARIATIONS IN WILKES' IMPLEMENTATION Ad 2. Variations on control organisation 1) No encoding 0 Control fields 1 2 13 Control lines 2) Some encoding 0 Decoder 0 Control fields 1 2 Decoder 1 Decoder 2 Control lines 3) Complete encoding Single control field Decoder Control lines CA - IX - MCU - 10 Nanodata's Computer Bus 1 Bus 8 Bus 2 Bus 3 Bus 9 Shifter Main memory (256 x 18 bits) 32 18-bit general registers (local store) Main ALU Secondary (index) ALU 32 18-bit external registers (ext. store) Bus 1 Bus 5 Bus 10 Bus 6 I/O devices Bus 7 Control signals 32 6-bit registers (F store) 3 10 Bus 11 Bus 12 NSDR 360 Control memory 2 (nano store) 10 Branch address Page address nPC Nanoprogram counter 7 CA - IX - MCU - 11 Control memory 1 (control store) EXAMPLE OF IBM FORMATS 90-bit microinstruction format of the IBM S/360 Model 50 0 1 6 19 30 CM addressing information Parity of bits 0 to 30 31 Parity of bits 32 to 55 61 65 68 Unused 56 60 Parity of bits 57 to 89 83 89 CM addressing information horizontal vs. vertical = Control fields Unused 32-bit microinstruction format of the IBM S/370 Model 145 0 8 control field (op-code) 24 16 Operand 1 Operand 2 CA - IX - MCU - 12 31 CM addressing information SIZE OF CONTROL STORE VS. WIDTH OF MICROINSTRUCTIONS DEC VAX (Models 730, 750, 780) IBM 370 (Models 135, 145, 155, 165) IBM 360 (Models 30, 40, 50, 65) Control store size (Kbits) 750 (6Kx80) 500 730 (16Kx24) 400 135 (24Kx16) 155 (6Kx69) 145 (12Kx32) 300 40 (4Kx52) 200 100 30 (4Kx50) 0 20 40 60 Microinstruction width (bits) CA - IX - MCU - 13 165 (4Kx105) 780 (4Kx105) 65 (2.75Kx87) 50 (2.75Kx85) 80 100 SUMMARIZING Next address of microcode execution may be specified by: 1) Address field of the current microinstruction 2) µPC (microprogam counter) 3) Address from address control store Microinstruction formats: 1) No encoding 2) Some encoding 3) Complete encoding CA - IX - MCU - 14 FIRMWARE ENGINEERING = MICROPROGRAMMING + ... Practical application of scientific knowledge in the design and construction of microprograms. Firmware engineering, in analogy to software engineering, covers specification and design of microprograms, construction techniques, debugging, testing, verification and maintenance. DESIGN DEVELOPMENT PERIODS Engineering practice during microcode design: 1) Specification (what is to be accomplished; at what cost) 2) Construction (microassemblers, HLL‘s for firmware are needed, difficulty of counting HLL-microcode) 3) Verification 4) Testing 5) Debugging 6) Maintenance HARDWARE Earlier it was thought that firmware would narrow hardware/software gap; what happened it introduced two gaps: FIRMWARE CA - IX - MCU - 15 SOFTWARE DESIGN OF MICROPROGRAMS (FIRMWARE) 1) SPECIFICATION - What is to be accomplished and at what cost? 2) CONSTRUCTION - there are no widely accepted HLL‘s for microprogramming - microassembler is used - need for HLL-to-microcode translation (very difficult in case of horizontally microprogrammed machine) - microcode optimization is NP(nonpolinomial)-hard problem - microassembler allows to write more understandable and maintainable code. - mnemonic is defined for each microoperation - HLL optimization: minimize size of control memory, execution time and length of control word Microprogram support system is a collection of utilities that supports the construction, debugging, testing and maintenance of microprograms. It has: microassembler, simulator for testing and loading dynamic & static microprograms 3) VERIFICATION - attempts to prove the absence of errors 4) TESTING - attempts to discover errors, easier to test than software because of number of microinstructions is usually not larger than 3000. 5) DEBUGGING - to correct errors, after locating them first 6) MAINTENANCE - repair and updating of microprograms CA - IX - MCU - 16 ADVANTAGES & APPLICATIONS OF MICROPROGRAMMING 1) THE SYSTEMATIZATION OF CONTROL 2) IMPROVEMENT IN PERFORMANCE a) a high degree of parallelism in data paths e.g., multiple bit microinstructions are performed in one cycle b) a high degree of decision logic (in table search and sorting routines) 3) COMPUTER-SERIES COMPATIBILITY Compatibility of instruction sets between smaller and larger machines of a series, e.g., Intel286, 386, Pentium, IBM Systems/309x, Motorola 68000 series 4) EMULATION Emulation is the combined software/hardware interpretation of the machine instruction of one machine by another. Target‘s machine architecture is mapped onto the host machine. EMULATOR - a set of microprograms that interpret a particular instruction set or language L1. Computer C1 emulates computer C2 if it can interpret machine language L2. CA - IX - MCU - 17 ADVANTAGES & APPLICATIONS OF MICROPROGRAMMING (2) 5) MICRODIAGNOSTICS Microprogramming diagnostic routines have allowed refinements and increased the speed of detecting and localizing faults,including error detection and correction of microstorage itself. a) software diagnostics b) hardware diagnostics (test generation methods) c) microdiagnostics 6) SOFTWARE SUPPORT eases programming 7) SPECIAL-PURPOSE DEVICES e.g, special processors for data communication, data aquisition, device controllers 8) DYNAMIC MICROPROGRAMMING This allows routines to be easily microprogrammed. Computer can be restructured to represent any instruction vocabulary by use of writable control memory (WCM). It allows the instruction set of the machine to be changed and be TAILORED to specific applications. CA - IX - MCU - 18 TAXONOMY OF CONTROL UNITS CONTROL UNIT Decoder one level decoder simple tree decoder dual tree decoder Sequencer Synchronous Asynchronous control unit Clocks Hard wired Fixed counter Microprogrammed Fixed counter with variable modulus Flexible counter Vertical Ring counter Horizontal residual control packed Technology nano control unpacked decoder Control Store ROM PLA R/W CA - IX - MCU - 19 PROM ERROM EAROM Technology