Digital Logic Design (3)

advertisement
Last lecture …
• All logic functions can be represented as
(1) truth table (2) schematics (3) Boolean
expressions, interchangeably
• Laws of Boolean algebra helps to simplify
the Boolean expression
p
• DeMorgan’s theorems
• NAND/NOR gates are universal gates
• Non-standard representation is equivalent
to DeMorgan’s theorems
• Canonical SOP/POS
• Simplification of Boolean expressions
2
Digital Logic Design (3)
ENGG1015
1st
Semester, 2011
Dr. Kenneth Wong
Department of Electrical and
Electronic Engineering
SOP or POS?
Today …
• Simplification of Boolean expressions
– Boolean algebra
– Karnaugh map
• What about?
ABC + ABC
(
)( )
( A + B + C )⋅( A + B + C)
( A + B + C)⋅( A + B + C)
A+ B +C B+C
•
S
0
1
0
1
0
1
0
1
0
0
0
0
1
0
0
1
A
B
C
S
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
0
0
1
→ ABC
→ ABC
4
Minimization by Boolean Algebra
Once the expression for a logic circuit is obtained, we may try to simplify
it, so that the implementation requires fewer gates
Example: below two circuits are the same, but the second one is much
more simpler
•
•
•
Make use of relationships and theorems of Boolean algebra to simplify
the expressions
– this method relies on your algebraic skill
Mainly consists of two steps:
– The original expression is put into SOP form by repeated application of
DeMorgan’s theorems and multiplication of terms
– Once the original expression is in SOP form, the product terms are
checked for common factors, and factoring is performed wherever
possible
Example: Simplify z = ABC + AB ⋅ ( AC )
z = ABC + AB ⋅ ( A + C )
= ABC + AB ⋅ ( A + C )
•
C
0
0
1
1
0
0
1
1
3
Simplifying Logic Circuits
•
B
0
0
0
0
1
1
1
1
S = ABC + ABC
• Canonical SOP/POS
• Arithmetic Circuit
– Half adder
– Full adder
– Subtractor
A
• SOP
Two methods for simplifying
– Algebraic method (use Boolean algebra theorems)
– Karnaugh mapping method (systematic, step-by-step approach)
= ABC + ABA + ABC
[multiply out]
= ABC + AB + ABC
[A ⋅ A = A]
= AC ( B + B ) + AB
= AC + AB
5
[by DeMorgan thm]
[cancel double inverions]
= A(C + B )
[B + B = 1]
6
1
Example: Simplify z = AC ( ABD ) + ABCD + ABC
– First expand it into SOP form
z = AC ( A + B + D) + ABCD + ABC
[DeMorgan thm]
•
= ACA + ACB + ACD + ABCD + ABC
Minimization by Karnaugh Maps
•
[multiply out]
= ACB + ACD + ABCD + ABC
[AA = 0]
– Then look for the largest common factor between any two or more
product terms: first and last terms have BC , while the second and third
terms share AD
– Grouping the terms gives
•
z = BC ( A + A) + AD(C + BC )
0
= BC + AD(C + B )
[by A + A = 1, C + BC = C + B ]
We might think that the above expression is the simplest since it
cannot be simplified further
However, in fact, the simplest form of this equation is z = ABD + BC
It turns out that we missed an operation earlier that could have led to
the simpler form
Question: How could we have known that we missed a step??
Ans: There is no way we can know. This illustrate the frustration often
encountered in Boolean simplification
•
•
•
•
•
What is a Karnaugh map?
– Karnaugh map (K map) is a graphical tool used to simplify a logic
equation or to convert a truth table to its corresponding logic circuit
– With a simple and orderly process, the resulting logic expression will be
in its simplest SOP form !!!
K map format:
– 3 Variable K map:
A\BC 00
01
11
10
1
– A grid of squares
– Each square represents one product term
• eg: top-left represents A ⋅ B ⋅ C , bottom-right represents A ⋅ B ⋅ C
– The variables are ordered according to Gray code
• only one variable changes between adjacent squares
– Squares on edges are considered adjacent to squares on opposite edges
7
AB\CD
– 4 Variable K map
00
01
11
10
Filling out a Karnaugh Map
00
01
?
8
•
•
•
??
11
10
–
–
–
–
•
1.
2.
The square marked ? represents A ⋅ B ⋅ C ⋅ D
The square marked ?? represents A ⋅ B ⋅ C ⋅ D
Note that they differ in only the C variable.
Karnaugh maps become clumsier to use with more than 4 variables
General procedure for using K map:
Fill out the K map for a given Boolean expression
Simplify the expression by properly combining those squares in the K map
that contains 1s. This process is called looping
Given an initial (unsimplified) logic Boolean expression
Write the expression in SOP form
For each product term, write a 1 in all the squares which are included
in the term, 0 elsewhere
– All variables present in the product term: one square
– One variable missing: two adjacent squares
– Two terms missing: 4 adjacent squares
•
Example 1:
X = ABC + ABC + ABC + ABC
•
Example 2:
X = BC + ABC + AC
•
A\BC
00
01
11
10
0
0
0
1
0
1
0
1
1
1
A\BC
00
01
11
10
0
0
1
0
0
1
1
1
1
1
A\BC
00
01
11
10
0
1
1
0
1
1
1
1
1
1
Example 3:
X = B + ABC + A
9
Looping
•
•
10
More examples on looping of two
Minimization is done by spotting patterns of 1's and 0's
Pairs of adjacent 1's (Looping groups of two)
– remember that adjacent squares differ by only one variable
– hence the combination of 2 adjacent squares has the form P ( A + A )
– this can be simplified (from before) to just P
X = ABC + ABC + ABC + ABC
• Example 1 (continue)
A\BC
00
01
11
10
0
0
0
1
0
1
0
1
1
1
-- the adjacent squares A B C and A B C differ only in A
-- hence they can be combined into just BC, indicated by the blue loop
-- looping can also be done by grouping A B C and A B C to give AC, as
indicated by the red loop
-- furthermore, looping can also be done by grouping A B C and A B C to give
AB, as indicated by the yellow loop
-- The simplified Boolean equation is one that sums all the terms corresponding
to each of the group: X = AC + BC + AB
11
12
2
Looping group of eight (Octets)
Looping group of four (quads)
•
•
• A K map may contain a group of four 1s that are adjacent to each other.
This group is called quad
• Looping a quad of adjacent 1s eliminates the two variables that
appear in both complemented and uncomplemented form
• Examples:
A group of eight 1s that are adjacent to one another is called an octet
Looping an octet of adjacent 1s eliminates the three variables that
appear in both complemented and uncomplemented form
Examples:
•
13
Complete Simplification Process
1. Construct the K map and place 1s and 0s in the squares according
to the truth table.
2. Group the isolated 1s which are not adjacent to any other 1s.
(single loops)
3. Group any pair which contains a 1 adjacent to only one other 1.
(double loops)
4. Group any octet even if it contains one or more 1s that have
already been grouped.
5 Group
5.
G
any quad
d that
th t contains
t i one or more 1s
1 that
th t have
h
nott already
l d
been grouped, making sure to use the minimum number of groups.
6. Group any pairs necessary to include any 1s that have not yet been
grouped, making sure to use the minimum number of groups.
7. Form the OR sum of all the terms generated by each group.
14
• Examples:
AB\CD
00
01
11
10
AB\CD
00
01
11
10
00
0
1
0
0
00
0
0
0
0
01
0
1
0
0
01
1
0
0
1
11
1
1
1
1
11
1
0
1
1
10
0
1
0
0
10
0
0
0
0
Step2.
Step3.
Step4.
Step5.
Step6.
Isolated 1: None
Adjacent to only one 1: None
Octet: None
Quad: Blue and red loops
All 1s have been looped => skip this step
AB + C D
15
AB\CD
00
01
11
10
AB\CD
00
01
11
10
00
0
0
0
1
00
0
1
0
0
01
0
1
1
0
01
0
1
1
1
11
0
1
1
0
11
1
1
1
0
10
0
0
1
0
10
0
0
1
0
BD + ABC
16
•
Quiz
Step2. Isolated 1: None
Step3. Adjacent to only one 1: red loop
Step4. Octet: None
Step5. Quad: Green loops
Step6. All 1s have been looped => skip this step
More examples
S2. Isolated 1: loop 4
S3. Adjacent to only one 1: loop 11,15
S4. Octet: None
S5. Quad: loop 6,7,10,11
S6. All 1s have been looped => skip
ABC D + ACD + BD
ABC + ACD + ACD + ABC
ABCD + ACD + BD
ABC + ACD + ACD + ABC + BD
ABC D + ABCD + BD
ABC + ACD + ACD + ABC
ABC D + ACD + BD
ABC + ACD + ACD + BD
S2. Isolated 1: None
S3. Adjacent to only one 1: loop 3,7
S4. Octet: None
S5. Quad: loop 5,6,9,10 and loop 5,6,7,8
S6. All 1s have been looped => skip
S2. Isolated 1: None
S3. Adjacent to only one 1: loop 2,6,
loop 7,8, loop 11,15 and loop 9,10
S4-S6. All 1s have been looped => skip
17
18
3
More “Don’t Care” examples
Don’t Care Conditions
• In certain cases, some of the input conditions may never occur
or it may not matter what happens even if they do
– In such cases we fill in the Karnaugh map with and X
• “Don’t care” conditions should be changed to either 0 or 1 to produce K-map
looping that yields the simplest expression.
• meaning don't care
– When minimizing an X is like a "joker"
• X can be 0 or 1 - whatever helps best with the minimization
– E.g.,: ABC will never occur or we “don’t care” what is the output
even if it occur
A\BC
00
01
11
10
0
0
0
1
X
1
0
0
1
1
– simplifies to B if X is assumed 1
– If we assume X=0, the output becomes BC+AB, which is more
complicated
19
• Let us fill out the truth table first.
• First list all the combinations of M, F1, F2 and F3.
• Since the elevator cannot be lined up with more than one
floor at a time, only one of the floor inputs can be HIGH at
any given time. This means that all those cases in the truth
table where more than one floor input is a 1 are don’t care
conditions.
• For other eight cases, when M=1, the elevator is moving,
so OPEN must be equal to 0. On the other hand, when
M=0, we want OPEN = 1
• This gives the truth table on the right
Example:
• Let M is a logic signal that indicates the elevator is moving (M=1) or
stopped (M=0).
• F1, F2 and F3 are floor indicator signals that are normally LOW, and
they go HIGH only when the elevator is positioned at that particular
floor. For example, when the elevator is lined with second floor, F2=1
and F1=F3=0.
• The circuit output is OPEN, which is normally Low and will go HIGH
when the elevator door is to be opened
20
The Karnaugh Map with 5 variables
K Map Method Summary
• Now fill out the K map
• And perform the simplification using looping
• OPEN
= M F1 + M F 3 + M F 2
• Compared to the algebraic method, the K-map process is a more orderly
process requiring fewer steps and always producing a minimum expression.
• The minimum expression may NOT be unique, meaning that there might exists
more than one way of looping producing different output expressions, but with
equal complexity
21
• For the circuits with large numbers of inputs (larger than four), other more
22
complex techniques are used.
Exclusive-NOR
Exclusive-OR
Exclusive-OR (XOR) produces a HIGH output whenever
the two inputs are at opposite levels.
Exclusive-NOR (XNOR) produces a HIGH output
whenever the two inputs are at the same level.
Note that
23
AB + AB = 1
AB + AB = A ⊕ B
24
4
Arithmetic circuit
Half Adder
• Recall the binary addition process
A
1
0
0
1
+B
0
0
1
1
S
1
1
0
0
• Truth Table
• LS Column has 2 inputs 2 outputs
A0 B0
– Inputs:
– Outputs:
p
S0 C1
• Other Columns have 3 inputs, 2 outputs
An Bn Cn
– Inputs:
– Outputs:
Sn Cn+1
– We use a "half adder" to implement the LS column
– We use a "full adder" to implement the other columns
– Each column feeds the next-most-significant column.
• Boolean Equations
A
B
S
C
0
0
1
1
0
1
0
1
0
1
1
0
0
0
0
1
S = AB + AB = A ⊕ B
C = AB
• Implementation
A
&
B
A
B
≥1
S
A
&
C
B
&
– Note also XOR implementation possible for S
25
Full Adder
• Truth Table
26
Parallel Adder
• S=?
A
0
0
0
0
1
1
1
1
B
Ci
S
Co
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
0
0
0
1
0
1
1
1
• Boolean Equations
ABCi + ABCi + ABCi + ABCi
ABCi + ABCi + ABCi + ABCi
ABCi + ABCi + ABCi + ABCi
ABCi + ABCi + ABCi + ABCi
• Complete circuitry for a FA
S = A.B.Ci + A.B.Ci + A.B.Ci + A.B.Ci
•
•
•
The full adder obtained in the previous
slide can only add two single bit (plus a
carry bit)
In order to add two multi-bit numbers, we
use 1 full adder per bit of the numbers
The carry is propagated from one stage
to the next most significant stage
– takes some time to work because of the
carry propagation delay which is n times
the propagation delay of one stage
2-bit Parallel Binary Adders
4-bit Parallel Binary Adders (74LS283)
= A ⊕ B ⊕ Ci
Co = ABCi + ABCi + ABCi + ABCi
= AB + ACi + BCi
= AB + Ci ( A + B)
27
Parallel Subtraction using Parallel Adder
28
In conclusion …
• Subtraction can be achieve
by adding the complement
– E.g.: 6 - 3 = 6 + (-3) = 3
• 2's complement :- invert all
bits and then add 1
– Invert all the inputs bits of B
– Use Carry-in of first stage for
the "add 1"
• Canonical SOP/POS
• Simplification of Boolean expressions
– Boolean algebra
– Karnaugh map
29
• Arithmetic Circuit
– Half adder
– Full adder
– Subtractor
30
30
5
Download