The first semiconductor chips held one transistor each.
Subsequent advances added more and more transistors, and as a consequence more individual functions or systems were integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten diodes , transistors , resistors and capacitors , making it possible to fabricate one or more logic gates on a single device. Now known retrospectively as "small-scale integration" ( SSI ), improvements in technique led to devices with hundreds of logic gates, known as large-scale integration ( LSI ).The electronics industry has achieved a phenomenal growth over the last two decades, mainly due to the rapid advances in integration technologies, large-scale systems design - in short, due to the advent of VLSI. This trend is expected to continue, with very important implications on VLSI and systems design A logic block can contain anywhere from 10 to 100 transistors, depending on the function. State-of-the-art examples of ULSI chips, such as the DEC
Alpha or the INTEL Pentium contain 3 to 6 million transistors.
The most important message here is that the logic complexity per chip has been (and still is) increasing exponentially. The monolithic integration of a large number of functions on a single chip usually provides:

Less area/volume and therefore, compactness

Less power consumption

Less testing requirements at system level

Higher reliability, mainly due to improved on-chip interconnects

Higher speed, due to significantly reduced interconnection length

Significant cost savings

VLSI has gained an important place of its own in the field of electronics and has become the most important and an integral part of Electronics
Engineering .
The actual development of the technology, however, has far exceeded these expectations.

USED TO BUILD MICRO PROCESSORS AND CONTROLLERS.
 USED TO BUILD CPU.

USED TO BUILD ALL KINDS OF INTEGRATED CIRCUITS AND
CHIPS.

The electronics industry has achieved a phenomenal growth over the last two decades, mainly due to the rapid advances in integration technologies, large-scale systems design - in short, due to the advent of VLSI.
The level of integration as measured by the number of logic gates in a monolithic chip has been steadily rising for almost three decades, mainly due to the rapid progress in processing technology and interconnects technology.
At one time, there was an effort to name and calibrate various levels of large-scale integration above VLSI. Terms suggesting greater than VLSI levels of integration are no longer in widespread use. An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC. In contrast, the 7400 series and 4000 series integrated circuits are logic building blocks that can be wired together for use in many different applications. Intermediate between ASICs and standard products are application specific standard products (ASSPs)
Designers of digital ASICs use a hardware description language (HDL), such as Verilog or VHDL, to describe the functionality of ASICs. Fieldprogrammable gate arrays (FPGA) are the modern day equivalent of 7400 series logic and a breadboard, containing programmable logic blocks and programmable interconnects that allow the same FPGA to be used in many different applications. For smaller designs and/or lower production volumes,
FPGA's may be more cost effective than an ASIC design. The Non-recurring engineering cost (the cost to set up the factory to produce a particular ASIC) can run into the millions of dollars.
As at mid 2006, billion-transistor processors are just on the horizon, with the first being Intel's Montecito Itanium Server. This is expected to become more commonplace as semiconductor fabrication moves from the current generation of 65 nm processes to the next 45 nm generations.

were
EDA tools are now used to design IC. Before EDA, integrated circuits designed by hand, and manually laid out.
Evolution of integration density and minimum feature size, as seen in the early 1980s.
ERA DATE COMPLEXITY
(Number of logic blocks per chip)
Single transistor
Unit logic (one gate)
Multi-function
Complex function
1959
1960
1962
1964 less than 1
1
2 - 4
5 - 20
Medium Scale Integration
Large Scale Integration
Very Large Scale Integration
Ultra Large Scale Integration
1967
1972
1978
1989
20 - 200
200 - 2000
(MSI)
(LSI)
2000 - 20000 (VLSI)
20000 - ? (ULSI)
In 1986 , Verilog , a popular high-level design language, was first introduced as a hardware description language by Gateway. In 1987 , the U.S.
Department of Defense funded creation of VHDL as a specification language.
Simulators quickly followed these introductions, permitting direct simulation of chip designs: executable specifications. In a few more years, back-ends were developed to perform logic.

The design flow starts from the algorithm that describes the behavior of the target chip. The corresponding architecture of the processor is first defined. It is mapped onto the chip surface by floor planning. The next design evolution in the behavioral domain defines finite state machines
(FSMs) which are structurally implemented with functional modules such as registers and arithmetic logic units (ALUs). The failure to properly verify a design in its early phases typically causes significant and expensive re-design at a later stage, which ultimately increases the time-tomarket.
Although the design process has been described in linear fashion for simplicity, in reality there are many iterations back and forth, especially between any two neighboring steps, and occasionally even remotely separated pairs. Both top-down and bottom-up approaches have to be combined. For instance, if a chip designer defined an architecture without close estimation of the corresponding chip area, then it is very likely that the resulting chip layout exceeds the area limit of the available technology. In such a case, in order to fit the architecture into the allowable chip area, some functions may have to be removed and the design process must be repeated. Such changes may require significant modification of the original requirements.

The term EDA is also used as an umbrella term for computer-aided engineering, computer-aided design and computer-aided manufacturing of electronics in the discipline of electrical engineering. Large chips are too complex to design by hand. EDA for electronics has rapidly increased in importance with the continuous scaling of semiconductor technology. Some users are foundry operators, who operate the semiconductor fabrication facilities, or "fabs", and design-service companies who use EDA software to evaluate an incoming design for manufacturing readiness. EDA tools are also used for programming design functionality into FPGAs.
The front ends produce standardized design descriptions that compile into invocations of "cells,", without regard to the cell technology. Cells implement logic or other electronic functions using a particular integrated circuit technology. Fabricators generally provide libraries of components for their production processes, with simulation models that fit standard simulation tools. Analog EDA tools are much less modular, since many more functions are required, they interact more strongly, and the components are (in general) less ideal. 1981 marks the beginning of EDA as an industry. For many years, the larger electronic companies, such as Hewlett Packard, Tektronix, and
Intel, had pursued EDA internally. In 1981, managers and developers spun out of these companies to concentrate on EDA as a business. Daisy Systems,
Mentor Graphics, and Valid Logic Systems were all founded around this time, and collectively referred to as DMV. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis.
EDA is divided into many (sometimes overlapping) sub-areas. They mostly align with the path of manufacturing from design to mask generation.
The following applies to chip/ASIC/FPGA construction but is very similar in character to the areas of printed circuit board design.

: design the chip's schematics, output in Verilog,
VHDL, SPICE and other formats.
The preparation step of creating a basic die-map showing the expected locations for logic gates, power & ground planes, I/O pads, and hard macros.
ranslation of a chip's abstract, logical RTL-description
(often specified via a hardware description language, or "HDL", such as
Verilog or VHDL) into a discrete netlist of logic-gate (boolean-logic) primitives.
This takes the level of abstraction higher and allows automation of the architecture exploration process. It involves the process of translating an abstract behavioral description of a design to synthesizeable
simulate a circuit's operation so as to verify correctness and performance.
optimizes the circuit to reduce the power required for operation, without affecting the functionality.
Tool-automated placement of logic-gates and other technology-mapped components of the synthesized gate-netlist, then subsequent routing of the design, which adds wires to connect the components' signal and power terminals.
Tools to help optimize a design to make it as easy and cheap as possible to manufacture.
Design closure is the process of converging to a design that satisfies all constraints simultaneously

Fully fabricated FPGA chips containing thousands of logic gates or even more, with programmable interconnects, are available to users for their custom hardware programming to realize desired functionality. This design style provides a means for fast prototyping and also for cost-effective chip design, especially for low-volume applications. A typical field programmable gate array (FPGA) chip consists of
I/O buffers, an array of configurable logic blocks (CLBs), and programmable interconnect structures.
In view of the fast prototyping capability, the gate array (GA) comes after the FPGA. While the design implementation of the FPGA chip is done with user programming, that of the gate array is done with metal mask design and processing. Gate array implementation requires a two-step manufacturing process: The first phase, which is based on generic
(standard) masks, results in an array of uncommitted transistors on each GA chip.
The standard-cells based design is one of the most prevalent full custom design styles which require development of a full custom mask set. The standard cell is also called the polycell. In this design style, all of the commonly used logic cells are developed, characterized, and stored in a standard cell library.
Although the standard-cells based design is often called full custom design, in a strict sense, it is somewhat less than fully custom since the cells are pre-designed for general use and the same cells are utilized in many different chip designs. In a fuller custom design, the entire mask design is done anew without use of any library. However, the development cost of such a design style is becoming prohibitively high. Thus, the concept of design reuse is becoming popular in order to reduce design cycle time and development cost.

VLSI has gained an important place of its own in the field of electronics and has become the most important and an integral part of
Electronics Engineering. Almost 10, 0000 job are being produced each year by this field in INDIA alone . We say the world is becoming smaller and so is the technology day by day. This technology has no limitations and every thing is possible which is the biggest advantage.
 APPROACH TO VLSI –Douglas Perry
 Basics of VLSI – Bhaskar
 www.IEEE.com
 www.google.com
 www.electronicforu.com
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