Application Note 4153
The Phase Locked Loop (PLL) Synthesizer is programmed via a 3 wire serial interface. There are four words that
need to be transmitted to the unit. These are the N Divider word, the R Divider word, the Control word, and the
Noise and Spur word. This programming note explains how to calculate the bit pattern for each word to obtain a
particular output frequency, and how the bits must be sent. The block diagram for the unit is shown below. This
is a Fractional-N style PLL.
External
Reference
4 Bit
R
x2 Doubler
Phase
Frequency
Detector
Switch
Charge
Pump
Lock
Detect
Loop
Filter
VCO
3rd order Fractional
Interpolator
N-Counter
+
Data
Clock
Enable
Control
Logic
FRAC
MOD
INT
There are some limits on the allowable values for R, INT, FRAC, MOD, and P. These are :
1 ≤ R ≤ 15
31 ≤ INT ≤ 511
0 ≤ FRAC ≤ 4095
0 ≤ FRAC ≤ MOD
2 ≤ MOD ≤ 4095
P = 4, P + 1 = 5
for Options 0xxx
P = 8, P + 1 = 9
for Options 1xxx
For P= 4/5, INTmin = 31
For P= 8/9, INTmin = 91
The prescaler can also influence the phase noise performance. If INT < 91, a prescaler of 4/5 should be used. For
applications where INT > 91, a prescaler of 8/9 should be used for optimum phase noise performance.
Page 1 of 8
EAN-104424 Rev. B
RF
Output
This equation governs how the synthesizer should be programmed:

 FRAC 
RF OUT  INT  
 x FPFD
 MOD 

where
RF out is the RF frequency output
INT is the integer division factor
FRAC is the Fractional ity
MOD is the modulus
The programmed values are calculated with these equations:


Reference Input
R

 Phase Detector Frequency 
where
R is the RF reference division factor
Remember, R has to be an integer and be between 1 and 15.
For example, in a system with 1920 kHz Phase Detector Frequency and a 19.2 MHz reference.
19.2 MHz 
R
 10
 1920 kHz 
This produces a 4-Bit R counter digital word of :
MSB
1010
LSB
This meets the requirements for R.
1 ≤ 10 ≤ 15
You can also work this out if you know R and want to find your Phase Detector Frequency.
Using the same example, I have a 19.2 MHz Reference and want to use an R of 10 with the Reference Doubler
disabled.
1  D , where D  Reference Doubler Setting

FPFD  REF IN x
R 

so
1  0  1920 kHz

FPFD  19.2 MHz x
10 

Page 2 of 8
EAN-104424 Rev. B
The N divider consists of INT and FRAC and is set as follows:


Output Frequency
INT  truncate

 Phase Detector Frequency 
For example, using the same 1920 kHz Phase Detector Frequency as above and an output frequency of 869MHz
yields:
 869.04 MHz 
INT  
  452.625
 1920 kHz 
truncate
so
INT  452
The 9-bit pattern for INT is then:
This number meets the requirement for INT:
MSB 111000100
31 ≤ 452 ≤ 511
LSB
Before we can calculate FRAC, we need to calculate MOD.
 FPFD 
MOD  

 fRES 
where
fRES is Channel Spacing Resolution
FPFD is the Phase Detector Frequency
We have determined that we are going to use a 1920kHz Phase Detector Frequency and want to use a 5kHz
Channel Spacing Resolution, therefore:
1920 kHz 
MOD  
 128
 15 kHz 
The 12-Bit pattern for MOD is then:
MSB
This number meets the requirement for MOD:
2 ≤ 128 ≤ 4095
Page 3 of 8
000010000000
LSB
EAN-104424 Rev. B
Now that we have MOD, INT, FPFD, and RFOUT we can calculate FRAC.
 RF out 

FRAC  
 - INT x MOD
 FPFD 

so,
 869.04 MHz 

FRAC  
 - 452 x 128
 1920 kHz 

FRAC  80
The 12-Bit pattern for FRAC is then:
MSB
000001010000
This number meets the requirement for FRAC:
0 ≤ 80 ≤ 4095
LSB
We now have all the values we need to program the PLL, we just need to put the words in order and send them
out.
The four words to program the unit are recommended to be sent in the following order:
1.
2.
3.
4.
Control Word
Noise and Spur Word
R-Divider Word
N-Divider Word
The contents of each word may vary depending on the programming option specified in the product specification.
The option is a six digit number which specifies the following parameters:
OPTION – X1 X2 X3 X4
Prescalar Value
Reference Doubler
Charge Pump Setting
Noise/Spur Mode
Page 4 of 8
EAN-104424 Rev. B
N Divider Word:
The N Divider word will vary depending on the INT and FRAC values that are calculated. Use the tables below to
choose the bit pattern to send. Replace bits b22 – b14 with the INT value that was calculated and replace bits b13
– b2 with the FRAC value that was calculated.
MSB
LSB
b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
N9 N8 N7 N6 N5 N4 N3 N2 N1 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1
9-Bit Integer Value (INT)
0
0
12-Bit Fractional Value (FRAC)
Using the examples from above we come up with the following N Divider Word:
MSB
LSB
b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
1
1
1
0
0
0
1
0
0
0
9-Bit Integer Value (INT)
0
0
0
0
1
0
1
0
0
0
0
0
0
12-Bit Fractional Value (FRAC)
R Divider Word:
The Reference Counter Word will vary based on the programming option called out in the product specification
and the R Counter Value and the MOD value. Use the table below to choose the bit pattern to send. Replace Bits
b17 – b14 with the bit pattern for R that was calculated and replace bits b13 – b2 with the bit pattern for MOD that
was calculated.
MSB
LSB
b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
0
0
1
0
P1 R4 R3 R2 R1 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1
4-Bit R Counter
Prescalar Values
Option
P1
0xxx
0
1xxx
1
12-Bit Modulus
Description
4/5
8/9
Page 5 of 8
EAN-104424 Rev. B
0
1
Using the examples from above we come up with the following R Divider Word using a prescaler value of 8/9:
MSB
LSB
b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
0
0
1
0
1
1
0
1
0
0
0
0
0
4-Bit R Counter
1
0
0
0
0
0
0
0
12-Bit Modulus
1 = 8/9 Prescaler
Control Word:
The Control Word will vary based on the programming option specified in the product specification. Use the table
below to choose the bit pattern based on the programming option.
MSB
LSB
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
0
0
0
U6 CP3 CP2 CP1 CP0 1
0
0
0
0
1
0
Reference Doubler
Option
U6 Description
x0xx
0
Disabled
x1xx
1
Enabled
Charge Pump Current
Option
CP3
CP2
xx0x
0
0
xx1x
0
0
xx2x
0
0
xx3x
0
0
xx4x
0
1
xx5x
0
1
xx6x
0
1
xx7x
0
1
Charge Pump Current/2
xx8x
1
0
xx9x
1
0
xxAx
1
0
xxBx
1
0
xxCx
1
1
xxDx
1
1
xxEx
1
1
xxFx
1
1
CP1
0
0
1
1
0
0
1
1
CP0
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Description
1/8 max.
1/4 max.
3/8 max.
1/2 max.
5/8 max.
3/4 max.
7/8 max.
max.
1/2 above
1/2 above
1/2 above
1/2 above
1/2 above
1/2 above
1/2 above
1/2 above
Page 6 of 8
EAN-104424 Rev. B
0
1
An example having the Reference Doubler disabled and the Charge Pump Current set to 1/8 max with CP/2 off,
we come up with the following Control Word:
MSB
LSB
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
0
0
0
0
0
Reference Doubler
Disabled = 0
0
0
0
1
0
0
0
0
1
0
Charge Pump
Current set to 1/8 max with CP/2 off = 0000
Noise and Spur Word:
The Noise and Spur Word will vary based on the programming option specified in the product specification. Use
the table below to choose the bit pattern based on the programming option.
MSB
LSB
b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
S5 S4 S3 S2
Noise and Spur Mode
Option
S5
S4
xxx0
0
0
xxx1
1
1
xxx2
1
1
0
S3
0
1
1
0
0
S2
0
0
1
S1
S1
0
0
1
1
1
Description
Lowest Spur Mode
Lowest Noise and Spur
Lowest Noise Mode
An example using the Lowest Noise and Spur mode, we come up with:
MSB
LSB
b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0
1
1
1
0
0
0
0
0
1
1
By looking at all the previous examples, you can see this PLL has an option number of: 1001
Page 7 of 8
EAN-104424 Rev. B
Timing for Words:
DATA
MSB
tDS
LSB
tDH
CLOCK
tCLKH
tES
tCLKL
ENABLE
tEW
All timing values are 10% to 90%
Specifications:
Parameter
Clock, Data, and Enable
Inputs
Input Capacitance
H-Input Current
L-Input Current
H-Input Voltage
L-Input Voltage
Data to Clock Setup
Data to Clock Hold
Clock High Duration
Clock Low Duration
Clock to Enable Setup
Enable Pulsewidth
RF Output
Coupling
Output Impedance
Reference Input
Input Voltage
Input Frequency
Symbol
CI
IH
IL
VIH
VIL
tDS
tDH
tCLKH
tCLKL
tES
tEW
Min
Typ.
Max
10
1
-1
.8*Vcc
.2*Vcc
10
10
25
25
10
20
AC
50
Refer to product specification
Page 8 of 8
Units
Comments
pF
uA
uA
V
V
nSec
nSec
nSec
nSec
nSec
nSec
ohms
V pk-pk
MHz
EAN-104424 Rev. B