Adhesion
Copper Interconnects in Microelectronics
University of Minnesota – Twin Cities
MatS 4221W
Lab Group 2
Timothy S. Marass
Loc Nguyen
Peter Sylvestre
Ethan Taylor
Date(s) of Laboratory: November 20 & Decmber 4, 2007
Date of Report: December 12, 2007
Adhesion – MatS 4221W – Dec. 12, 2007
I.
Executive Summary
This experiment investigated…
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Adhesion – MatS 4221W – Dec. 12, 2007
Table of Contents
Executive Summary ............................................................................................................... 2
Introduction ............................................................................................................................ 4
Methods .................................................................................................................................. 5
Results .................................................................................................................................... 6
Discussion ............................................................................................................................ 12
Conclusions .......................................................................................................................... 13
References ............................................................................................................................ 14
Appendix A: Data................................................................................................................. 15
Appendix B: Sample Calculations ....................................................................................... 16
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II.
Introduction
Periods of time have been named for, and often defined by, various technological
advances. By the same convention, if 2000 to 700 B.C is known as the Bronze Age1 because of
the appearance of bronze tools and weapons, then surely the last 100 years could be
characterized as the beginning of the Silicon Age. The microelectronics industry is rapidly
enlarging due to the ever-present demand for smaller, more powerful electronic devices with
extended battery lives. Most integrated circuits use aluminum for interconnects; however, there
are issues with miniaturizing aluminum connections because of electro-migration and stressmigration issues2. Aubel et. al. found that “Copper shows a much higher electromigration
resistance compared to aluminum3.” Copper can diffuse through the silicon wafers it is
deposited on, resulting in short circuits, and poorly adheres to the silicon wafers. To combat
these problems with copper, it has been theorized4 that an intermediate layer of Ti between the
Cu and silicon wafer could form a diffusion barrier and increase the overall adhesion of the
system.
In this lab, three samples will be analyzed to determine if the adhesion issues can be
resolved by depositing a layer of Ti. These three samples include: A: 3um, Ti, Cu on a Si wafer;
B: bare Si wafer; and C: 200nm, Ti, Cu on a Si wafer.
1
www.le.ac.uk/archaeology/ulas/birstall.html
Lab 6 Handout.
3
http://ieeexplore.ieee.org/Xplore/login.jsp?url=/iel5/7298/28198/01261738.pdf
4
Lab 6 Handout.
2
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Adhesion – MatS 4221W – Dec. 12, 2007
III.
Methods
Samples
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Adhesion – MatS 4221W – Dec. 12, 2007
IV.
Results
(a)
(b)
(c)
(d)
Figure 1. VEM images of 200nm copper film. (a) 2.5x Possible Blister: shows location of blister shown in 1.d. in
respect to sample; arrow denotes blister location. (b) 50x Prior indentation on film. (c) 50x Possible Blister: shows
5um difference between blister surface and film background. (d) 50x Possible Blister: image showing 3um
difference between blister surface and film background.
(a)
(b)
(c)
(d)
(e)
(f)
Figure 2. Indents made on 200nm film sample C. (a) Indent 1. (b) Indent 2. (c) Indent 3. (d) Indent 4. (e) Indent 5.
Surface height = 0.004mm, maximum indent depth = 0.003mm, overall change (indentation depth) = 0.001mm. (f)
Indent 6. Surface height = 0.004mm, maximum indent depth = 0.003mm, overall change (indentation depth) =
0.001mm.
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Adhesion – MatS 4221W – Dec. 12, 2007
(a)
(b)
(c)
(d)
Figure 3. Indents made on 3um-film sample A. (a) Indent 1. (b) Indent 2. (c) Indent 3. (d) Indent 4.
(a)
(b)
(c)
Figure 4. NanoXP indentation groups. (a) Overall view of Groups 1 (left) and 2 (right). (b) Group 1 indentations.
(c) Group 2 indentations.
(a)
(b)
(c)
(d)
(e)
(f)
Figure 5. Sample A observed blisters. (a) Sample A, Blister 1. (b) Sample A, Blister 1 sample location. (c) Sample
A, Blister 2. (d) Sample A, Blister 2 sample location. (e) Sample A, Blister 3. (f) Sample A, Blister 3 sample
location.
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Adhesion – MatS 4221W – Dec. 12, 2007
Table 1. Sample A, 3um of Cu. Hardness Measurements.
Position Load,P[mN]
D1[um]
D2[um]
HV
1
490.3
22.4
26.1
157.6
2
980.7
29.3
32.4
192.9
3
2942
39.5
41.4
340
4
9807
60.1
55.9
551.2
Table 2. Sample C, 0.2um of Cu. Hardness Measurements.
Position Load,P[mN]
D1[um]
D2[um]
HV
3
2942
22.1
25.7
973.9
4
490.3
12.8
12
603
5
490.3
11.9
12.7
617.8
6
980.7
15.4
15.9
757.1
Note: No data was taken from positions 1 and 2.
Table 3. Sample A, 3um, Ti, Cu Material Properties. Trial 1.
Modulus From Unload Hardness From Unload
(GPa)
(GPa)
Test
1
148
2.59
2
139
2.57
3
154
2.70
4
145
2.71
Mean
147
2.64
St. Dev.
5.9
0.072
Table 4. Sample A, 3um, Ti, Cu Material Properties. Trial 2.
Modulus From Unload Hardness From Unload
GPa
GPa
Test
1
158
3.22
2
156
3.23
3
158
3.23
4
165
3.33
Mean
159
3.25
Std. Dev.
4.0
0.053
Table 5. Sample C, 200nm, Ti, Cu Material Properties. Trial 1.
Modulus From Unload Hardness From Unload
GPa
GPa
Test
1
92
2.92
2
95
3.41
3
90
3.39
4
73
2.54
Mean
87
3.07
Std. Dev.
10.1
0.419
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Table 6. Sample C, 200nm, Ti, Cu Material Properties. Trial 2.
Modulus From Unload Hardness From Unload
GPa
GPa
Test
1
23
1.72
2
47
1.78
3
78
1.22
4
0
****
Mean
49
1.57
Std. Dev.
27.9
0.31
Table 7. Silicon (Si) Sample Material Properties.
Modulus From Unload Hardness From Unload
GPa
GPa
Test
1
179
13.04
2
197
12.28
3
186
12.63
4
195
12.38
Mean
189
12.58
Std. Dev.
8.3
0.34
Figure 6. Hardness and Modulus Load/Unload Curves. Sample A, 3um, Ti, Cu. Trial 1.
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Figure 7. Hardness and Modulus Load/Unload Curves. Sample A, 3um, Ti, Cu. Trial 2.
Figure 8. Hardness and Modulus Load/Unload Curves. Sample C, 200nm, Ti, Cu Material Properties. Trial 1.
Figure 9. Hardness and Modulus Load/Unload Curves. Sample C, 200nm, Ti, Cu Material Properties. Trial 2.
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Figure 10. Hardness and Modulus Load/Unload Curves. Silicon (Si) Sample.
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Discussion
A
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V.
Conclusions
Experimental data showed…
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I.
References
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Adhesion – MatS 4221W – Dec. 12, 2007
II.
Appendix A: Data
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Adhesion – MatS 4221W – Dec. 12, 2007
III.
Appendix B: Sample Calculations
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