Experiment 3 Report Notes
Step 1 and 2
12V
8V
4V
0V
-4V
-8V
-12V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(R1:2,0)
Time
The circuit in figure (INSERT FIGURE HERE) is a positive peak clipper circuit. The reason the
graph output resembles a negative half wave rectifier is because the voltage measured is across
the diode, rather than a load resistor. When the diode is in forward bias, the positive portions
of the wave, the only voltage measured in the observable area is the +1Vdc source plus the
diode voltage which is 0.7V when forward biased.. This accounts for the positive wave output of
+1.7Vdc.
Step 3 and 4
1V input
1.0V
0.5V
0V
-0.5V
-1.0V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(R1:2,0)
Time
The clipping circuit in (INSERT FIGURE HERE) shows a negative peak clipper circuit, but the
graph seems to show the entire sine wave. The negative peak isn’t clipped because the input
voltage wasn’t greater than the 1.7V it would take to put the diode into linear/active mode.
Therefore the diode stays in saturation mode and the full 1V is read across the voltmeter leads.
2V input
2.0V
1.0V
0V
-1.0V
-2.0V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(R1:2,0)
Time
Figure (INSERT FIGURE HERE) shows the same circuit as figure (INSERT FIGURE HERE) except
with a 2V input rather than a 1V input. The positive section shows the full 2V amplitude
because the diode is reverse biased. The negative half of the wave is greater than the 1.7 volts
required to activate the diode, but in the process, it loses 1.7V of its potential, according to KVL.
Therefore the difference between the leads is -1.7V, resulting in a clipped sin wave.
3V input
3.0V
2.0V
1.0V
0V
-1.0V
-2.0V
-3.0V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(R1:2,0)
Time
Figure (INSERT FIGURE HERE) shows the same circuit as figure (INSERT FIGURE HERE) except
with a 3V input rather than a 2V input. The positive section shows the full 3V amplitude, while
the bottom section again only shows the -1.7V difference between the positive and negative
leads.
4.0V
2.0V
0V
-2.0V
-4.0V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(R1:2,0)
Time
Figure (INSERT FIGURE HERE) shows the same circuit as figure (INSERT FIGURE HERE) except
with a 4V input rather than a 3V input. he positive section shows the full 3V amplitude, while
the bottom section again only shows the -1.7V difference between the positive and negative
leads. This circuit is always going to be clipped at -1.7V because any voltage greater than 1.7V
will activate the diode, therefore negating any difference in potential between the two
voltmeter leads.
Part 5
10V Input
4.0V
2.0V
0V
-2.0V
-4.0V
0s
0.5ms
1.0ms
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
V(D1:2,0)
Time
(INSERT FIGURE HERE) is a zener diode clipper circuit. Zener diodes are diodes with a
relatively low breakdown voltage. This graph represents the voltage across a reverse biased
zener diode until the source voltage “overtakes” the zener breakdown voltage. Once this
happens, the voltage potential quickly flat-lines. According to the graph, the breakdown voltage
of these zener diodes is somewhere around 3V. When 10V positive is applied to the circuit, the
10V is read by the positive lead, while 10V-0.7V-3V = 6.3V is read across the output. This causes
a voltage difference of 3.7 to be read as output, which is close to the value we obtained in the
simulation.
Part 6
C = 0.1 uF
20V
10V
0V
-10V
-20V
0s
0.5ms
1.0ms
V(C1:1,C1:2)
V(R1:2,0)
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
Time
Figure (INSERT FIGURE HERE) is a clamper circuit that uses a diode and a capacitor to apply a dc
offset to the source wave. While the input wave is positive, all of the voltage goes into the
capacitor, which is why no voltage shows during the positive output portions. While the input
wave is negative, the capacitor discharges and stacks on top of the input, therefore amplifying
it. This explains why the negative peak is more than the 10V input wave.
C = 470 uF
20V
10V
0V
-10V
-20V
0s
0.5ms
1.0ms
V(C1:1,C1:2)
V(C1:2,0)
V(C1:1,0)
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
Time
This clamper circuit is identical to the previous clamper circuit, except that the capacitor has a
greater capacitance, therefore holds more charge. During the first positive half wave, the
capacitor becomes charged with 10V. From that point on, the capacitor acts like a battery,
shifting the entire waveform down by 10V.
Part 9
C = 10uF
20V
10V
0V
-10V
-20V
0s
0.5ms
1.0ms
V(C1:1,C1:2)
V(C1:2,0)
V(C1:1,0)
1.5ms
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
4.5ms
5.0ms
Time
This clamper circuit act the same as the previous clamper circuit (INSERT FIGURE HERE) except
that the diode direction is flipped, and a battery is added behind the diode. Therefore the
shifted value will be the capacitor charge (10V) - 0.7 voltage across the diode, - 1Vdc because of
the battery. 10-.7-1 = 8.3V DC offset.