Khushboo Gupta
H.NO. 147E, Sector 22 A, Gurgaon, Haryana
• khushboo_sadtm@yahoo.com
• +919971798333
Professional Experience
 7 years of experience in Software Quality Testing, Quality Assurance, Processes and Methodologies.
 Domain expertise in Software Testing of Serial communication and Storage protocols domain for the
windows based applications.
 Serial Communication Protocols: PCIe (Peripheral Component Interface Express), SRIOV (Single Root
Input Output Virtualization) and MRIOV (Multi root Input Output Virtualization) protocols and all are
supported at Gen1/Gen2/Gen3 speeds.
 Storage protocols: NVMe (Non-Volatile Memory Ejection) and AHCI (Advanced Host Controller Interface)
protocols.
 Possesses excellent knowledge of QA processes and adept in testing activities.
 Expertise in designing Test Artifacts which includes creating STP, developing use case and the test case
scenarios (STC), Test case design techniques, Regression scenarios, Traceability matrix and Software test
reports (STR).
 Proficient in STLC, Defect Life Cycle, Test Planning and Management, Problem Reporting and Resolution and
Root Cause Analysis.
 Well versed in grey box testing for API’s (Application Programming Interface).
 Comprehensive experience working with hardware tools and instruments (Oscilloscope, Various DUT’sGraphics Cards, Network Card, USB Card 3.0/2.0)
 Skilled with cross-functional thinking and problem solving.
 Excellent communication and writing skills.
Technical Skills
Domain:
Platform:
Operating System:
Automation Tool:
Scripting Languages:
Software Development Method:
Conceptual Skill:
Reporting Tool:
Defect Reporting Tool:
Productivity Tool:
Concept and Process:
Serial communication protocols (PCIe Gen3/Gen2/Gen1, NVMe, AHCI, and
SSIC)
Windows and Web based applications
Windows XP/2008 Server/Win7/Win8
IBM Rational Robot and Agilent Fusion
Tcl and C#
Waterfall and Incremental
Software development life cycle, Software Testing Life Cycle, Bug
Lifecycle, Test Planning and Management, Problem Reporting and
Resolution, Root cause analysis
Share Point
Microsoft Visual Studio TFS 2010 and 2012, Agilent internal Spider tool
Microsoft Test Management, MS Word, MS Excel, MS Power Point,
Microsoft One Note and MS Project
STP, STC, STR, Test Matrix design, Status Report, Black Box Test Case
Design Techniques and Product Life Cycle
Organisational Experience
1. March’10- Present
Keysight Technologies, Gurgaon
Working as a ‘Senior Software Quality Engineer –Advanced’ as a part of LAPA-OPD group (Logic
and Protocol Analyzer- Oscilloscope Product Division)
Job Profile:
 Leading QA activities for various Keysight OPD products for serial communication protocols such
as, PCIe, MRIOV, SRIOV as well as storage protocols such as NVMe and AHCI. This primarily
includes:
o Understanding customer requirements and creating Software Test plan based on these
requirements.
o Doing in-depth study of the underlying protocol and how the product has been
designed when mapped to protocols to perform testing effectively. Understanding the
protocol decode and relate it with the product to check the accuracy of the decode
performed in product.
Preparing QA deliverables (Test scenarios, Test cases, Traceability Matrix and Software
Test Report)
o Preparing test environment and hardware setups for test execution, system testing and
compatibility testing
o Owing the execution of test cases, bug reporting, verification of bug resolutions and
following up for all projects undertaken.
o Conducting manual testing using Functional, Sanity, Regression, UAT, System,
Compatibility and Adhoc testing.
 Performing grey box testing which includes creation and maintenance of test scripts using Tcl and C#.
 Closely working with the R&D teams on the replication and verification of customer reported issues. This
also includes simulating the customer scenario relevant for the issue, discussions with the R&D Team,
preparing the lab setup and identifying the root cause of the issue, and concluding this exercise by
providing in-depth outcome to R&D team as an aid for resolving/understanding the issue.
 Providing technical review support to the Learning Products (User documentation) deliverables for each
product release to ensure technical accuracy in these deliverables.
o
 Representing QA and providing status reports in weekly meetings with the local team in Manesar,
India as well as US team in Colorado Springs.
 Providing product demos to the US R&D team management as well as customers on their visits to the
Manesar site.

Mentoring
new hires and leading their QA projects effort. This also includes troubleshooting and
reviewing their assignments as well as help them understand the product and the product life cycle
process.
2. Sept’ 2009 – Feb’10
Nagarro Software’s, Gurgaon
Worked as Test Engineer, part of Clinical Domain website testing team.
Job Profile:


Engage in multiple testing activities for clinical domain web application:
o Requirement gathering and analysis
o Evaluated the requirements and creates Software Test Plan.
o Designing use cases and develops the software test cases.
o Execution of test cases.
o Conducts manual as well as automation testing.
o Bug logging and bug resolution verification.
o Creates the E2E application flow.
Involves in weekly meetings with client.
3. Jul’07- Jan’09
Agilent Technologies, Gurgaon
Worked as Test Engineer, part of Digital Debug Solution (DDS) team.
Job Profile:




Responsible for following testing activities:
o Creates software test cases and execute them.
o Bug logging and tracking.
o Regression and Sanity testing.
Prepares hardware setups for execution of test cases.
Executing and maintaining the regression test cases.
Involves in defect life cycle.
Projects Undertaken
1. Verification of Agilent’s protocol test solution tool ‘Protocol Exerciser’ for serial communication and
storage protocols PCIe, SRIOV, MRIOV and NVMe:
Agilent Protocol Exerciser tool has the key functions to send and respond to traffic, which is usercontrolled by means of a Command Application Programming Interface (CAPI). It can stress all data
paths in a system and test corner cases and behavior by inserting errors and protocol violations on each
of the respective layers, physical, data link and transactional. Exerciser is a Multi-Personality Instrument
for PCIe, NVMe Testing, Multi‑Root and Single-Root I/O Virtualization.

PCIe (Peripheral Component Interface Express Bus):
PCI Express is a serial communication protocol which is a high performance, general purpose I/O
interconnects defined for a wide variety for future computing and communication platforms. Power
management, QoS (Quality of Service, Hot plug, Hot swap, data integrity and error handling are
among some of the advanced features support by PCIe Express.

SRIOV (Single Root Input Output Virtualization):
SR-IOV is a specification that allows a single Peripheral Component Interconnect Express (PCIe)
physical device under a single root port to appear to be multiple separate physical devices to the
hypervisor or the guest operating system.

MRIOV (Multi Root Input Output Virtualization):
Multiple Root IOV (MR-IOV) extends the concept to allow multiple independent systems with separate
PCIe roots to connect to I/O devices through a switch. To utilize the hardware resources effectively and
efficiently MRIOV implementation has been done.

NVMe (Non Volatile Memory Ejection):
Agilent’s NVMe emulator allows user to test devices and create operational scripst that allows hardware
and software developers to simulate a host root complex. The emulator is able to test all of the NVMe
functions of a storage device and from queue management to sending traffic loads to create test
scenarios to provide device operation.

LTSSM (Link Training Status State Machine):
Links training status state machine provides user information about all the state taken at the time of
speed negotiations between two PCIe devices. Pre-defined LTSSM tests to help validate the complex
and hard to test state transitions of the of the DUT’s LTSSM.

PTC (Protocol Test Card):
The Agilent provides the gold standard protocol test card which enables device compliance with the PCISIG by providing automated test cases. This test capability also facilitates industry deployment of the
PCIe 2.0 technology.
2. Verification of Agilent’s protocol debugging tool ‘Logic and Protocol Analyzer’ for PCI Express
communication protocol and storage protocols i.e. AHCI and NVMe:
An Agilent logic analyzer helps you minimize project risk by providing the most reliable, accurate
measurements and the most complete view of system behavior and gives you to debug the complete
behavior of the system transactions. Protocol and Logic analyzer product offers the measurement
capabilities, probing, application support and analysis tools to meet your toughest digital debug needs.

PCIe (Peripheral Component Interface Express Bus):

AHCI (Advanced Host Controller Interface):
AHCI is a hardware mechanism that allows software to communicate with Serial ATA devices. AHCI is a
PCI class device that acts as a data movement engine between system memory and Serial ATA devices.

NVMe (Non Volatile Memory Ejection):
3. Verification of Agilent’s protocol test solution tool ‘M9252A DigiRF Host Adapters:
DigiRF v4 is intended to be used in mobile terminals that supports next generation mobile broadband
technologies such as Long Term Evaluation (LTE) and Mobile WiMax. It also supports existing 3GPP
standards such as 2.5G and 3.5G (EGPRS, UMTS, HSPA, etc) and due to its large data rate and
scalability it is suitable to cover other non 3GPP air interfaces.

M9252A DigiRF Host Adapter:
The M9252A DigiRF Host Adapter module belongs to the Agilent RDX family. The module provides the
serial stimulus capabilities required for DigiRF v4 based RFIC evaluation and characterization. A single
module combines stimulus and Rx side capture capabilities to generate configurable control and data
traffic and observe the response from the device under test (DUT). It allows engineers to work in the
domain (digital or RF) of their choice to quickly characterize the DUT’s digital and wireless behavior.
4. Verification of Agilent’s ‘U4431A MIPI M-PHY Protocol Analyzer for SSIC’:
SSIC (Super Speed Interconnect Chip) is the supplement which is optimized inert-chip version of USB
3.0 protocol (Ubiquitous Peripheral Interconnect). USB 3.0 specifications add support for transfer speeds
of 5 Gbps to address the need for higher bandwidth. However USB 3.0 does not meet the requirement of
embedded inter chip interfaces with respect to power and EMI robustness. To address this need, SSIC
developed.
SSIC uses MIPI M-PHY specifications as the physical layer of interconnect to meet requirements.
MIPI M-PHY is the serial interface technology with high bandwidth capabilities which is particularly
developed for mobile applications to obtain low pin count combined with very good power efficiency.
Scholastics
 B.Tech. (Computer Science) from Rajasthan University in 2007 with aggregate of 72%