Filename: “AET_ch8” Multi-Domain Modeling 1.1 MEMS Accelerometers Modeling1 Sensing is typically performed in two steps: Primary Transducer tethered seismic mass Secondary Transducer capacitive electrical signal Transform acceleration to mechanical displacement Transform mechanical displacement to electrical signal mechanical displacement environmental acceleration Microflexural Structure Daspot: (D) Model frictional resistance as damping force proportional to rate of movement (velocity) Seismic Mass (M): Model inertia as force proportional to rate of velocity (acceleration) Spring (K): Model structural elasticity as spring force proportional to movement F applied Fmass Fdamping Fspring F (t) M d 2x dx D Kx 2 dt dt Inertia, dissipative, elasticity characteristics determine transient (time domain) and bandwidth (frequency domain) response. F (t ) d 2x dx G (t ) 2 20 0 x M dt dt K 0 M D 2 KM 0 1 2 x 1 2 a 0 Where: ω0 natural resonant frequency - oscillation with no damping/forcing ξ damping factor – actual damping/critical damping ω damped resonant frequency x/a primary transducer transfer function – displacement/unit acceleration Capacitive Sensing Seismic mass forms one plate of a parallel plate capacitance. Movement of mass changes area/gap between parallel plates and , consequently the capacitance. Differential Capacitance Sensing Easier to detect relative (differential) change rather than absolute change Comb finger capacitances connected in parallel to add to form C1 and C2. Sensing requires a bridge circuit with complementary AC source VS. VS + VC1 - + C1 + I VS C2 VX I 2C12sVS 2 C1C2 sVS C1 C2 VX VS VC1 VS C1 = C2 C1 ≠ C2 I 1 C1C2 C1 - C2 VS 2 sVS VS sC1 sC1 C1 C2 C1 C2 => no acceleration => acceleration Signal Detection is based on Sin x Sin y = 0.5[cos(x-y) – cos(x+y)] vsource1 env_force1 ENV_FORCE mag_ac := 0.16e-9*5*9.8 mag_dc := 0.0 freq := 100.0 VSOURCE comb_drive1 comb_drive mag_ac := 300.0e-3 mag_dc := 0.0 freq := 1.0 Meg vsource2 m := 0.16e-9 k := 2.6455 d := 4.0e-6 a := 2.0e-6*110.0e-6 do := 1.5e-6 r1 VSOURCE mag_ac := -300.0e-3 mag_dc := 0.0 freq := 1.0Meg LIBRARY IEEE; USE IEEE.ENERGY_SYSTEMS.ALL; USE IEEE.ELECTRICAL_SYSTEMS.ALL; USE IEEE.MECHANICAL_SYSTEMS.ALL; ENTITY comb_drive IS GENERIC(m : MASS := 0.16*nano; d : DAMPING := 4.0e-6; k : STIFFNESS := 2.6455; a : REAL := 2.0e-6 * 110.0e-6; do : REAL := 1.5e-6); PORT(TERMINAL proof_mass, ref : TRANSLATIONAL; TERMINAL top_el, mid_el, bot_el : ELECTRICAL); END ENTITY comb_drive; r := 3.0Meg ARCHITECTURE bcr OF comb_drive IS --Free quantities QUANTITY vel : VELOCITY; QUANTITY qtm, qbm : CHARGE; QUANTITY dtm, dbm : DISPLACEMENT; QUANTITY ctm, cbm : CAPACITANCE; --branch quantities QUANTITY pos ACROSS force THROUGH proof_mass TO ref; QUANTITY vtm ACROSS itm THROUGH top_el TO mid_el; QUANTITY vbm ACROSS ibm THROUGH bot_el TO mid_el; BEGIN --compute displacement of comb drive --mechanical dynamics --compute change in capacitance --electrical dynamics --compute generated current END ARCHITECTURE bcr; LIBRARY IEEE; USE IEEE.MATH_REAL.ALL; USE IEEE.MECHANICAL_SYSTEMS.ALL; ENTITY ENV_FORCE IS GENERIC(MAG_AC, MAG_DC : FORCE :=0.0; FREQ : REAL := 0.0); QUANTITY not allowed in GENERIC PORT(TERMINAL PT1, PT2 : TRANSLATIONAL); END ENTITY ENV_FORCE; ARCHITECTURE SINE OF env_force IS QUANTITY FORCE THROUGH PT1 TO PT2; BEGIN FORCE == MAG_AC*SIN(MATH_2_PI*FREQ*NOW); END ARCHITECTURE SINE; LIBRARY IEEE; USE IEEE.MATH_REAL.ALL; USE IEEE.ELECTRICAL_SYSTEMS.ALL; ENTITY vsource IS GENERIC(MAG_AC, MAG_DC : VOLTAGE := 0.0; FREQ : REAL := 0.0); PORT (TERMINAL p, m : ELECTRICAL); END ENTITY vsource; ARCHITECTURE sine OF vsource IS --CONSTANT, QUANTITY v across i THROUGH p TO m; BEGIN v == mag_ac*SIN(MATH_2_PI*freq*NOW)+mag_dc; END ARCHITECTURE sine; Signal Detection The modulated signal in r1.v can be demodulated by mixing the signal with a local oscillator with the same frequency as the carrier. [A(t)Sin x] Sin y = 0.5A(t)[cos(x-y) – cos(x+y)] If x=y [A(t)Sin x] Sin x =0.5A(t)[1-cos2x]=0.5A(t)-0.5A(t)cos2x A(t) can be recovered by low pass filtering. electrical2sfg2 vsource3 Electrical2Sfg VSOURCE vsource1 env_force1 ENV_FORCE mag_ac := 0.16e-9*5*9.8 mag_dc := 0.0 freq := 100.0 VSOURCE comb_drive1 comb_drive mag_ac := 300.0e-3 mag_dc := 0.0 freq := 1.0 Meg Electrical2Sfg vsource2 m := 0.16e-9 k := 2.6455 d := 4.0e-6 a := 2.0e-6*110.0e-6 do := 1.5e-6 electrical2sfg1 VSOURCE r1 r := 3.0Meg mag_ac := -300.0e-3 mag_dc := 0.0 freq := 1.0Meg mul1 gs1 G(s) gs1=6.28e3/(s+6.28e3) 1kHz cutoff frequency 1.2 Electrical and Thermal Modeling Thermal Components3 Temperature Source (T) :Across Quantity like V, unit K(Kelvin) Heat Flow Source (H) :Through Quantity like I, unit J/s(Joules/sec) Thermal Resistance (RTH) :Resistive component like R, unit K*s/J Thermal Capacitance (CTH): Capacitive component like C, unit J/K Thermal Resistance (RTH): T(t)= RTH H(t) Thermal Resistance VHDL-AMS Model library ieee; use ieee.thermal_systems.all; entity rth is port( quantity k: in real:= 1.0; terminal th1, th2: thermal); end entity rth; -- linear coefficient (k*s/J) architecture beha of rth is quantity t across h through th1 to th2; begin t == h*k; end beha; Thermal Capacitance (CTH): T 1 CTH t Hdt T 0 0 Where: T0 is the initial temperature 293 K. Thermal Capacitance VHDL-AMS Model library ieee; use ieee.thermal_systems.all; entity cth is port( quantity c_th: in real := 1.0; quantity t0: in real := 293.0; terminal th1: thermal); end entity cth; -- thermal capacitance (J/K) -- initial temperature (K) architecture beha of cth is quantity t across h through th1 to thermal_ref; quantity h_int : real := t0; begin Break h_int => t0 * c_th; h_int'dot == h; t == h_int / c_th; end beha; Thermometer library ieee; -Like voltmeter use ieee.thermal_systems.all; entity thm is port( quantity temp: out real; -- temperature (K) terminal th1 : thermal); end entity thm; architecture beha of thm is quantity t across th1 to thermal_ref; begin t == temp; end beha; Thermal Source --Like voltage source -- ---------------------------------------------------------------------------library ieee; use ieee.thermal_systems.all; entity t is port( quantity value: in real:= 293.0; -- temperature (K) terminal th1: thermal); end entity t; architecture beha of t is quantity t_ across h through th1 to thermal_ref; begin t_ == value; end beha; rth1 k := 1 t1 thm1 cth1 c_th := 1 θ=370K; rth1: k=1 K/W; cth1: c_th=1 Ws/K θ=370K; rth1: k=2 K/W; cth1: c_th=1 Ws/K θ=370K; rth1: k=1 K/W; cth1: c_th=2 Ws/K Simple Diode without Thermal Modeling LIBRARY IEEE; USE IEEE.ELECTRICAL_SYSTEMS.ALL; USE IEEE.MATH_REAL.ALL; ENTITY D IS GENERIC ( ISAT : REAL := 1.0e-12; -- Saturation current VT : REAL := 35.0e-3; -- Thermal voltage RR : REAL := 100.0e3; -- Reverse resistance VF : REAL := 0.8; -- Forward voltage RB : REAL := 1.0e-3 -- Bulk Resistance ); PORT (TERMINAL p,m : ELECTRICAL); END ENTITY D; ARCHITECTURE behav OF D IS QUANTITY v ACROSS i THROUGH p TO m; BEGIN IF (v >= 0.0) USE i == ISAT * ((exp(v/VT)) - 1.0); ELSE i == v/RR; END USE; END ARCHITECTURE; ARCHITECTURE equiv OF d IS CONSTANT vlimit : REAL := VF/(1.0 - (RB/RR)); QUANTITY v ACROSS i THROUGH p TO m; BEGIN IF (v < vlimit) USE i == v/RR; ELSE i == (v-VF)/RB; END USE; END ARCHITECTURE equiv; Model Using Basics Vs AMS Models Usings Basics r1 E1 r := 1k FREQ := 1 AMPL := 4 OFF := 1 TDELAY := -0.2 4 E1.V [V] 2 0 -2 -4 -6 0 0.2 0.4 0.6 4.5m 0.8 1 t [s] d1.i 3m 2m 1m -0.5m 0 0.2 0.4 0.6 0.8 1 t [s] 1 d1.v 0 -0.5 -1 -1.5 -2 -3 0 0.2 0.4 0.6 0.8 1 t [s] Simple Diode Thermal Model1 (vt is assumed constant) LIBRARY IEEE; USE IEEE.ENERGY_SYSTEMS.ALL; USE IEEE.ELECTRICAL_SYSTEMS.ALL; USE IEEE.THERMAL_SYSTEMS.ALL; USE IEEE.MATH_REAL.ALL; --Define K (boltzmann), Q(elec_charge) ENTITY MyDiodeTh IS GENERIC ( ISAT : REAL := 1.0e-12; -- Saturation current vt : REAL := 35.0e-3; -- Thermal voltage RR : REAL := 100.0e3; -- Reverse resistance VF : REAL := 0.8; -- Forward voltage RB : REAL := 1.0e-3 -- Bulk Resistance ); PORT (TERMINAL anode,cathode : ELECTRICAL; TERMINAL junction: THERMAL); END ENTITY MyDiodeTh; ARCHITECTURE behav OF mydiodeth IS QUANTITY vd ACROSS id THROUGH anode TO cathode; QUANTITY temp ACROSS power THROUGH thermal_ref TO junction; BEGIN IF (vd >= 0.0) USE id == ISAT * ((exp(vd/vt)) - 1.0); ELSE id == vd/RR; END USE; power == vd*id; END ARCHITECTURE behav; mydiodeth1 r1 rth1 thm1 MyDiodeTh r := 1k k := 1.0 E1 cth1 c_th := 1.0 Simple Diode Thermal Model2 (vt depends on temp) LIBRARY IEEE; USE IEEE.ENERGY_SYSTEMS.ALL; USE IEEE.ELECTRICAL_SYSTEMS.ALL; USE IEEE.THERMAL_SYSTEMS.ALL; USE IEEE.MATH_REAL.ALL; --Define K (boltzmann), Q(elec_charge) ENTITY MyDiodeTh IS GENERIC ( ISAT : REAL := 1.0e-12; -- Saturation current RR : REAL := 100.0e3; -- Reverse resistance VF : REAL := 0.8; -- Forward voltage RB : REAL := 1.0e-3 -- Bulk Resistance ); PORT (TERMINAL anode,cathode : ELECTRICAL; TERMINAL junction: THERMAL); END ENTITY MyDiodeTh; ARCHITECTURE behav OF mydiodeth IS QUANTITY vd ACROSS id THROUGH anode TO cathode; QUANTITY temp ACROSS power THROUGH thermal_ref TO junction; QUANTITY vt : voltage; -- thermal voltage BEGIN IF (vd >= 0.0) USE id == ISAT * ((exp(vd/vt)) - 1.0); ELSE id == vd/RR; END USE; vt == temp * K/Q; power == vd*id; END ARCHITECTURE behav; -- thermal voltage is temp dependend Simple Diode Thermal Model3 (vt depends on temp & id depends on id) LIBRARY IEEE; USE IEEE.ENERGY_SYSTEMS.ALL; USE IEEE.ELECTRICAL_SYSTEMS.ALL; USE IEEE.THERMAL_SYSTEMS.ALL; USE IEEE.MATH_REAL.ALL; --Define K (boltzmann), Q(elec_charge) ENTITY DiodeTh IS GENERIC (iss : REAL := 1.0e-4; n, af : REAL := 1.0; tt, cj0, vj, rs, kf : REAL :=0.0); PORT (TERMINAL anode, cathode : ELECTRICAL; TERMINAL junction: THERMAL); END ENTITY DiodeTh; ARCHITECTURE Level0 OF diodeth IS QUANTITY vd ACROSS id, ic THROUGH anode TO cathode; QUANTITY temp ACROSS power THROUGH thermal_ref TO junction; QUANTITY qc : charge; QUANTITY vt : voltage; -- thermal voltagge BEGIN qc == tt*id - 2.0*cj0 * sqrt(vj**2 -vj*vd+1.0e-20); zero error ic == qc'DOT; id == iss*(exp((vd-rs*id)/(n*vt)) - 1.0); vt == temp * K/Q; power == vd*id; END ARCHITECTURE Level0; --1.0e-20 is added to prevent division by Note: When the diode is forward bias vd >0 (<0 reverse polarity), the solver oscillate. The solution is incorrect. REFERENCES 1. “Analog and Mixed-Signal Modeling Using the VHDL-AMS Language”, E.C. Beaverton et.al., 36th Design Automation Conference, New Orleans, June 21-25, 1999. 2. “Simulation System SIMPLORER VHDL-AMS Tutorial,” English Edition, © 2003 Ansoft Corporation. 3. Simulation System SIMPLORER® v.6.0 User Manual, English Edition, © 1996-2002, Ansoft Corporation.