Nano-scale hotspots: a route to fast, real time and reliable

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ON THE FEASIBILITY OF USING ANTIFUSES AS
LOW-POWER HEATING / DETECTING ELEMENTS
IN PELLISTOR-TYPE GAS SENSORS
A.Y. Kovalgin, J. Holleman, A. van den Berg
MESA+ Research Institute, University of Twente
P.O. Box 217, 7500 AE Enschede, The Netherlands
E-mail: A.Y.Kovalgin@el.utwente.nl
Abstract
This work is aimed at the novel idea of using the so-called antifuses for gas monitoring.
It appears from the numerical modelling that the antifuses can be heated up to the
melting point of Si (1415 oC) by absorbing electrical power in the mWatt range. A fewnanometer-scale antifuse is able to maintain a sufficiently high surface temperature for a
50 times larger surface area. A 50-oC increase of the link temperature leads to a 0.9-1.3
k increase of the device resistance. The results of modelling confirm the feasibility of
antifuses to perform as low-power heating/detecting elements in gas sensors.
Keywords: antifuse, nano-hotspot, gas sensor
1. Introduction
Semi-conducting oxide sensors (e.g. Taguchi sensors) [1-2], used nowadays for
monitoring of combustive gas mixtures, are extremely slow to provide instantaneous
response required for real-time process control in industry. Besides this, the devices are
prone to humidity effects limiting the reproducibility. In addition, these sensors as well
as Pellistor-type sensors [3] ensure relatively high power consumption. This is a
compelling reason to look for alternatives because the improvement of safety in
working environments by accurate, real time and low-cost monitoring of the presence of
combustive gas mixtures becomes an important issue.
The novel idea of using so-called antifuses to maintain the nano-scale
heating/sensing centres (hotspots) for gas monitoring is employed in this study. This
approach tends to very high-density array integration. The nano-hotspots can be realised
by antifuse technology [4], which is fully compatible with silicon technology. The
antifuse is a conductive link of 5-50 nm in size caused by electrical breakdown due to
tunnelling a constant current stress between two electrodes separated by a dielectric
(Fig. 1). Finally, applying a well-defined
programming current, which is higher
then the initial stressing current, enlarges
the link. It appears from our research that
as the link is once created at certain value
of the programming current, the size and
electrical properties of the link cannot be
changed under a current stress below the
programming value [4].
A ntifuse
Elec trodes
O x ide
st
1 Po lysi lico n
nd
2
Pol ysi li con
Silicon (sub)
Figure 1: Schematic representation of antifuse
structure.
2. Experimental electrical properties of bulk-antifuses
5000
-8
2
Applied voltage, V
Device resistance, Ohm
The change of the antifuse resistance R (mainly the link resistance) via applied electric
power reflects a non-trivial mechanism of this process (Fig. 2). At near-zero powers the
resistance is high, namely in the range of 12-50 k depending on the value of
programming power. A gradual increase of power up to the programming value leads to
a sharp decrease of the resistance due to field-related matters, as will be discussed in
section 4.1. Once realised R(W) dependence can be multiply repeated, provided that the
programming power is not exceeded. Exceeding the programming level causes reprogramming of the link.
A gentle rise of power in the range of 15-20 mW, above the programming value,
leads to a sharp irreversible increase of the link resistance, as represented by curve 1 in
Fig. 2. This effect is probably caused by a change of the link composition, for example,
occurring due to re-distribution of oxygen or impurity atoms in the link material at high
temperatures. After the resistance jump-up, repeatedly obtained R(W) characteristics
exhibit a higher device resistance (see curve 2 in Fig. 2). Further increase of power
beyond 20 mW results in an irreversible decrease of the resistance (curve 3 in Fig. 2)
and can be attributed to enlarging the link due to its re-melting.
The antifuses seem to be reasonably stable in time. The core of the devices depicted
in Fig. 3 was at or near melting point of Si (1415 oC). From these data, one can expect
only minor instabilities under operating conditions due to thermal degradation.
4000
3000
1
2000
3
1000
0
0.00
-9
Device current, mA
-10
-1.65
-4.00
-11
-12
0.02
0.04
0.06
Dissipated power, W
0.08
Figure 2: Experimental dependence of antifuse
resistance on dissipated power.
0
1000
2000
Time, sec
3000
4000
Figure 3: Stability of antifuses from the
experiment: the devices programmed at –1.65
and –4.00 mA respectively and kept at that
current for 1 hour.
3. Newly designed thin-film antifuse structures
The following devices were designed in such a way that the conductive link, to
minimise the influence on surface temperature, is sufficiently thermally isolated from
the bulk of the wafer. Pre-determination of the antifuse location regarding the surface
area is the second important issue because the location affects the surface-temperature
gradients. Therefore, a spontaneous-in-space formation of antifuses is unacceptable
from the point of view of reproducibility of the device characteristics. The proposals
regarding pre-determined positioning are made in this study. Based on the computer
simulations, two different cylindrically symmetric structures are designed. In Fig. 4 and
5 only half of the cylindrical structure is shown. The axis of the cylinder is at x=0. The
process flows, employing standard LOCOS oxidation and CVD technology, are not
difficult in practical realisation. To model the process flows, the computer simulations
have been carried out using an ATHENA SILVACO code [5]. As one can see in Fig. 4,
structure A has a very pre-determined area with the thinnest dielectric, where the
antifuse can be formed. For structure B represented in Fig. 5, the link is expected to
appear on the narrow tip because of the highest electric field at that point. Regarding the
application, the tips can also be used for probing/scanning technique aiming at
investigation of a surface.
Figure 4: Modelled structure A of the device
with a pre-determined breakdown area.
Figure 5: Modelled structure B of a tip-shape
device with a pre-determined breakdown area
and improved thermal isolation from the bulk.
4. Thermo-electrical properties of thin-film antifuses from modelling
For the linear antifuses (the same doping of the electrodes) depicted in Figures 4 and 5,
the modelling of electrical properties and heat generation characteristics has been
carried out using an ATLAS SILVACO computer code [5]. Based on the simulations,
we could predict both temperature distributions around the link, changing resistivity of
the device with link temperature, and surface-temperature gradients.
4.1. ANTIFUSE RESISTANCE VERSUS APPLIED POWER: ELECTRIC FIELD
EFFECT AND HIGH TEMPERATURE INFLUENCE
60
35
30
25
Structure B
Structure A
20
Bulk antifuse
Device resistance, k 
Device resistance, k 
The theoretical R(W) dependencies for a 10-nm link (Fig. 6) partly resemble those
obtained from the experiments (Fig. 2). Namely, the very final increase of link
resistance in Fig. 6 can be attributed to the metallic behaviour of silicon at high link
temperatures. However, the irreversibility obtained from the experiments cannot be
modelled because changing the link quality is not taken into account by the software.
It appears that Structure B has the highest slope of the curve due to better thermal
isolation. Contrary to this, the bulk-antifuse exhibits the lowest response of the
resistance on applied power. Concluding, thin-film antifuses allow achieving higher
device resistance at lower power consumption, which is beneficial from the sensor
sensitivity point of view.
15
10
5
0
0.000
0.002
0.004
0.006
Dissipated power, W
Figure 6: Modelled dependence of device
resistance on applied power for a 10-nm
antifuse.
0.008
50
2
Gate-substrate
link diameter, nm:
4
40
10
30
20
10
0
0.000
0.001
0.002
0.003
0.004
Dissipated power, W
Figure 7: Antifuse resistance for different link
diameters, plotted versus applied power
For the smaller links with the diameters of 4 and 2 nm, the theoretical resistance
initially increases via applying near-zero powers (Fig. 7). This also occurs for the
majority of our experiments (Fig. 2). Further increase of power results in decreasing
resistance, which again fully agrees with the experimental graphs. However, the
resistance decrease cannot be explained in terms of a heat enhanced carrier generation
in the link material. This is because at a doping level of 10 20 cm-3, the intrinsic carrier
density becomes comparable to the impurity carrier concentration at temperatures above
1000 oC. As one can see from the theoretical calculations in Fig. 7, the decrease in the
link resistance already starts at near-room temperature.
To explain the resistance behaviour at low powers, we have calculated electric field
distributions at the links. It appeared, that the electric fields at the link edges could be
sufficiently high to control the passage of carriers through the antifuse. The smaller the
link the more dramatic the field influence. For the smallest antifuse of 2 nm, the
electrons are required to overcome the highest negative barrier and that becomes easier
with increasing applied voltage pushing the electrons through. This explains a decrease
of the device resistance with increasing power. Additionally, due to the negative electric
field, the link area can be depleted with the carriers. For the largest antifuse of 10 nm,
the influence of the link edges is less crucial for governing the electric current (Fig. 7).
4.2. HEAT GENERATION CHARACTERISTICS
1100
1000
Structure B
900
Structure A
Average surface temperature /
Link temperature
Average surface temperature
within a diameter of 1.0  m, K
From the following series of three figures (Fig. 8, 9, and 10) one can obtain the heat
generation characteristics of the antifuses. For gas sensing, an important issue is to
provide a larger hot surface-area to improve the device sensitivity. Another crucial point
is an adjustment of the poly-Si gate thickness to achieve a proper surface-temperature
distribution. Unfortunately, accurate experimental verification of the theoretical results
cannot be done at this stage of the work.
It appears that the link can be heated up to melting point of Si (1415 oC) by
absorbing electrical power in the mWatt range (Fig. 8, 9). Because of a short distance
between the link and the surface (~30 nm), realised by thin-film CVD technology, the
heat generated by the antifuse is transmitted to the surface without an essential loss (Fig.
9). A few-nanometer-scale antifuse can maintain a sufficiently high surface temperature
for a 50-100 times larger surface area (Fig. 8).
800
700
600
500
400
300
0.000
0.002
0.004
0.006
1.2
Structure A
1.0
Structure B
0.8
0.6
0.4
0.2
0.0
0.000
0.002
The dependence of antifuse
resistance on link temperature (Fig. 10)
exhibits a possibility for sensing of the
external heat generated at the surface due
to the combustion of gases. Because of
the very thin films, the heat generated by
combustion will probably be able to
increase the link temperature, which leads
to a change of the resistance. As
estimated, a 50-oC increase of the link
temperature will result in a 0.9-1.3 k
increase of the device resistance, which is
quite measurable. Concluding, the
antifuses are feasible to perform as
combined heating/detecting elements.
0.006
Figure 9: Modelled ratio between surface
temperature within a diameter of 1 m and link
temperature, plotted versus applied power
Device resistance, k 
Figure 8: Modelled average surface
temperature within a diameter of 1 m versus
applied power.
0.004
Dissipated power, W
Dissipated power, W
35
30
Structure B
25
Structure A
20
Bulk antifuse
15
10
5
0
300
550
800
1050
1300
1550
1800
Link temperature, K
Figure 10: Modelled device resistance versus
link temperature.
4.3. DOPING INFLUENCE
60
Device resistance, k 
The results of modelling show that doping
of the mono-Si tip-electrode (Structure A)
underneath the link is very important for
good control of the device resistance
because of the above-mentioned electric
field effect. The electrical characteristics
are also strongly influenced by doping of
the poly-Si thin-film electrode (Fig. 11).
Lower doping results in greater sensitivity
to the electric field. So for the application
purpose, an accurate choice/control of the
doping profiles is needed.
Poly-Si gate
doping, at/cm-3
50
9E18
9E19
40
30
20
10
0
0.000
0.001
0.002
0.003
0.004
Dissipated power, W
Figure 11: Antifuse resistance for different gate
doping levels, plotted versus applied power
5. Conclusions
Experimental and theoretical results obtained in this work show that, in principle, a high
temperature can be generated by means of the nano-scale conductive link called
antifuse, which is created due to a dielectric breakdown between two silicon electrodes.
The devices are able to maintain a reasonably uniform temperature distribution across
the micro-scale electrode surface, at limited power consumption. The results of
numerical thermo-electrical modelling (ATLAS SILVACO code) show the feasibility of
the antifuses to perform as low-power heating/detecting elements in Pellistor-type
sensors. The newly proposed thin-film antifuses have better surface-temperature
uniformity and sensitivity characteristics than the bulk antifuses. Experimental
verification of the heat generation characteristics remains an important issue for the
future work. Practical realisation and characterisation of the thin-film antifuses will be
the next step in the coming research.
Acknowledgements
This work is financially supported by the EU project GRD1-1999-10849.
References
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[2] Clifford, P. K. and Tuma, D. T. (1983) Characteristics of semiconductor gas sensors. Parts I and II,
Sensors and Actuators 3, pp. 255-81 and 233-54.
[3] Gall, M (1991) The Si planar pellistor: a low-power pellistor sensor in Si thin-film technology, Sensors
and Actuators B (Chemical) B4, 533-8.
[4] Houtsma, V. E.: Gate oxide reliability of poly-Si and poly-GeSi CMOS devices, Ph.D. Dissertation,
University of Twente, Enschede, 1999.
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April 1997.
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