DIGITAL ELECTRONICS II
LAB 3: MULTIPLIER
OBJECTIVE
1. To understand the basic operations of a multiplier.
2. Design a multiplier logic circuit with the simplest logic gates representation.
3. To verify and note the techniques used to design a multiplier
EQUIPMENTS


Max+PlusII
UP2 Training Board
INTRODUCTION
Nowadays, multipliers are very useful in digital machines such as calculator and
digital watches.
The combinational circuit of a multiplier can be constructed in many ways, such as
using the K-map technique and the Array Multiplier,

K – map
Use all input possibilities to create a truth table. Then K-map to get the
simplified Boolean expressions, which is used to construct the circuit.

Array Multiplier
Using shift-add operation by manual techniques. We multiply the LSB
multiplicand first. Then write it down as the first partial product. Next, the
second bit is multiplied but the second partial product is shifted 1 bit to the
left. The final total product is the sum of partial products.
Designing a multiplier involves understanding the basics of binary
multiplication. When multiplying two numbers, the first number is called the
‘multiplier’ and the second number being multiplied is called the ‘multiplicand’. An
example of this procedure given in figure 3.1, where the multiplier is 1110 or 10112
and the multiplicand is 510 or 01012.
Figure 3.1
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DIGITAL ELECTRONICS II
Multiplications of two 4 bit numbers are hence the addition of four binary
numbers, rows 1, 2, 3 and 4 in the above example. Row 1 is the multiplier times the
1st bit of the multiplicand, bit 1. Row 2 is the result of the multiplier times the 2nd bit
of the multiplicand, bit 1, shifted to the left by one bit. And bit LSB is 0. The process
continues for each of the four rows, however at each row the result is shifted left by
an additional one bit.
It is important to note that each row, the least significant bit (LSB)
corresponds to an actual bit in the product. This bit can be saved as part of the
product. The 3 most significant bits at each row are then summed with next row’s bit
to produce a partial sum. This process continues until all four rows have been
completed. At this point four least significant bits have been determined and the
remaining four bits make up the four most significant bits of the product. This fact
was critical in designing the serial multiplier.
Below is an example of a simple multiplication using the array method
Figure 3.2 : Array Technique
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DIGITAL ELECTRONICS II
TASK/ASSIGNMENT
In the experiment, you will construct a 2x2 bit multiplier using the K-Map and array
mapping method. Synthesis this multiplier. Understand and verify the procedures.
Study and compare the two methods used to construct your multiplier. Then, using
any of the 2x2 multiplier, create a 4x4 bit multiplier using the array technique.
PROCEDURE
Part A : K-Map Technique
1. Follow the normal procedures to create the logic circuit of a 2x2 multiplier.
2. Begin implementing your design into Altera’s MaxPlusII schematic editor.
Your project name should be called “KMap_2x2”
3. Simulate your design. You may choose any values for your inputs, but assign
your multiplier in counting sequence and the multiplicand in a fixed value.
4. Study the waveforms.
Part B : Array Technique
1. Arrange your multiplier and multiplicand in order and begin your
multiplication process in array. Study this arrangement.
2. Since you will need Full Adders to build array multiplication, on Altera
MaxPlusII, build a Full Adder circuit first and create the default symbol.
3. Begin aligning your array multiplication using the FA symbols. Save and
create your project name as “Array_2x2”.
4. Simulate your design. You may choose any values for your inputs, but assign
your multiplier in counting sequence and the multiplicand in a fixed value.
5. Study the waveforms.
6. Create a default symbol for your 2x2 Array Multiplier.
Part C : 4x4 bit Multiplier using Array_2x2
1. Open a new schematic editor. Your project name will be “Multiplier_4x4”
2. Using the symbol of your 2x2 bit multiplier (Array_2x2) and Full Adder
module, design the 4x4 bit multiplier using the Array Technique.
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