AN EMBEDDED MICROPROCESSOR DESIGN FOR THE PULSE SHAPE
DISCRIMINATION OF A PLASTIC SCINTILLATING NEUTRON DETECTOR
Marcus Yamaguchi
Department of Physics
Kaua‘i Community College
Lihue, HI 96766
ABSTRACT
Kaua‘i Community College (Kaua‘i CC) is presently participating in an effort to develop
a space industry in Hawai‘i. This effort includes future launches of University of Hawai‘i
supported micro-class satellites from the Pacific Missile Range Facility at Barking Sands, Kaua‘i.
Kaua‘i CC’s participation is represented by operation and maintenance of a ground station,
located on campus, to support command and control and data acquisition for UH micro-satellites.
Kaua‘i CC has also proposed a plastic scintillating neutron detector as a potential micro-class
satellite payload for the detection of solar accelerated neutrons. The dual focus of this Fellowship
was to support the operation and maintenance of the Kaua‘i CC ground station and to develop a
digital signal processing (DSP) framework for neutron detection which is compatible with a
Field Programmable Gate Array (FPGA). Ground station support includes the installation of an
S-Band dish and the installation of new components to existing ultra-high frequency (UHF) and
very-high frequency (VHF) antennas. The FPGA design focus is on developing a system design
capable of discriminating neutrons from other sources of accelerated particles and meeting
timing specifications necessary for characterizing neutron flux as a count rate. This paper
presents the results and accomplishments of these two distinct goals in separate sections.
I. KAUA‘I CC GROUND STATION
UH micro-satellite Hiaka-Sat is scheduled to launch from PMRF in the near future. In
order to support data acquisition for Hiaka-Sat an S-Band dish is required at the Kaua‘i CC
ground station. The UHF and VHF antenna systems require additional components to improve
signal to noise ratio and a new azimuth motor to replace a mechanically failing unit.
A M2 A2000 S-band dish was successful installed onto the roof of the Kaua‘i CC Daniel
K. Inouye building (Fig. 1). The dish is mounted onto a base of two galvanized steel I-beams
which are mounted onto the North-Eastern perimeter wall and an adjacent parapet wall. The Ibeams were installed by a contractor. The dish was installed by Marcus Yamaguchi, with
assistance from Kaua‘i CC’s facility manager, and with the fortuitous presence of a roofing
contractor with a crane working on a nearby building. Control lines for the azimuth and elevation
rotors and a LMR 400 cable were run in the ceiling space of the building to the HSFL ground
station control room, again by Marcus Yamaguchi. After installation the function of the rotors
was verified by properly terminating the cable with terminal lugs and connecting to the motor
controller, then commanding the dish azimuth and elevation position which confirmed a
successful mechanical assembly and installation of the dish.
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Figure 1. Kaua‘i CC S-Band
Dish
Following completion of the dish installation, a new rotor was installed to replace the
malfunctioning one on the UHF/VHF antenna system. This required lowering the antennas,
dismounting UHF/VHF antennas from the tower, and removing and replacing the motor. At that
time, new LNAs (low noise amplifiers) were to be installed, but proper N-connector adaptors had
not yet been received at the time of this paper writing. After the installation of the new rotor the
antennas were recalibrated and the new rotor was tested to verify successful installation. Future
work will be to install the S-band receiving equipment in the ground station and the two LNAs
on the VHF/UHF antenna system.
II. DESIGN FOR NEUTRON DETECTION
According to ref. [1], interactions of ions accelerated in solar flare magnetic loops
produce neutrons that escape from the Sun and survive the transit to Earth where they can be
directly detected with instruments in orbit. The purpose for studying solar accelerated neutrons is
to analyze solar mechanisms (such as magnetic reconnection and particle transport) through
characterizing the original conditions of their acceleration [2]. The primary purpose the detector
for this effort will be to characterize the escaping neutron flux and time history as a relative
count rate that can be correlated with related data on solar radiation to convey information about
the accelerated ions responsible for their production.
Plastic scintillators used for radiation detection are known to have an identical pulse
response for various accelerated particles; thus neutrons, gamma and alpha, all require a method
for particle identification. In this effort, mathematical programs were developed in Mathematica
that model: the optical pulses produced by the scintillators from various particle impacts
(Marrone method), digital methods of detecting the time and amplitude of the optical pulse peak
(Constant Fraction Discriminator (CFD)), and a tail-to-charge integration method of particle
discrimination. After modeling, this effort additionally begins the process of implementing the
design in hardware.
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Traditionally neutron detection has been implemented using analog circuits, but advances
in FPGA technology and very fast high precision Analog to Digital Converters (ADC) allows for
an equivalent design to be implemented digitally. In comparison to analog methods, digital
signal processing provides a greater degree of design customization and system stability. For the
detector design of this effort, an Altera DE2 FPGA was used for digitally processing the pulse
data. The FPGA design was accomplished using a suite of software tools supplied by the FPGA
manufacturer Altera. This suite includes the System on a Programmable Chip (SOPC) builder
which allows the user to specify components (such as logic elements, embedded microprocessors,
memory elements) of their design with the use of a Graphical User Interface (GUI) shown in Fig
2. Using this GUI, VHDL (Very High Speed Hardware Design Language) or (Verilog HDL Hardware Design Language) code was generated to implement a system design with given
specifications, including the assignment of base addresses, clock rates, interrupt requests,
memory storage, bus sizes etc.
Development of a mathematical behavioral model:
Prior to designing the FPGA, a mathematical model for simulating the pulse response of
a scintillator to neutrons and particles, obtained from ref. [3], was implemented in
Mathematica. This model (hereby Marrone’s model) was used to help develop and optimize of
the DSP techniques chosen for our FPGA design. Marrone’s model sums three exponential
components (scintillator optical response, analog circuit pulse response, and particle decay) to
obtain a reproduction of the pulse shape with the functional form of eq. 1.
𝐿 = 𝐴(𝑒 −𝜃(𝑡−𝑡0 ) − 𝑒 −𝜆𝑠 (𝑡−𝑡0 ) ) + 𝐵(𝑒 −𝜃(𝑡−𝑡0 ) − 𝑒 −𝜆𝑙(𝑡−𝑡0 ) ). (𝑒𝑞. 1)
𝜃, 𝜆𝑠 𝑎𝑛𝑑 𝜆𝑙 are exponential decay constants of the scintillator optical response, the
analog pulse response and the particle decay, and A and B are normalization constants. Table 1
shows the parameters used for neutrons and 𝛾-particles. The exponential decay components, the
normalization constants and the initial time (𝑡0 ) were empirically determined in ref. [3]. Fig. 3
shows plots generated using Marrone’s model and Mathematica for a neutron and 𝛾-particle. The
normalization constant A may be varied to produce signals of various amplitudes. The difference
in the decay rate of the two different responses differentiates the scintillator response for
neutrons and 𝛾-particles. Marrone’s model is used in the next two sections to develop the digital
CFD and the “tail to charge” method of integration.
amplitude normalized to 1
1.0
0.8
0.6
𝛾 − 𝑝𝑎𝑟𝑡𝑖𝑐𝑙𝑒
0.4
𝑛𝑒𝑢𝑡𝑟𝑜𝑛
0.2
nanoseconds
0
10
20
30
40
50
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Figure 3. Simulated scintillator response for
particles and neutron using Marrone’s
model normalized to 1.
Table 1:
𝛾-particles
𝜃
𝜆𝑠
𝜆𝑙
A
B
𝑡0
4.378
3.537
11.69
11.03
0.015
0.295
neutrons
4.325
3.547
38.55
11.48
0.015
0.331
Pulse Triggering and Peak Determination:
In our neutron detector design, the optical pulse response of a plastic scintillator is
detected by a photodiode, and the generated current is integrated by a charge sensitive amplifier
to generate a voltage pulse proportional to the detected current across the photodiode. This pulse
is scaled to the voltage input of an ADC and digitized. To determine the pulse triggering
threshold for the leading edge of the digitized pulse signal a simple threshold discriminator may
be implemented to compare the input pulse voltage to a predetermined voltage value. When the
compared voltage pulse exceeds the predetermined voltage threshold, the threshold discriminator
outputs a logic high corresponding to the leading edge of the input pulse signal which can be
used for timing purposes. For pulse signals with a constant rise time and varying amplitudes a
threshold discriminator may give inaccurate timing information due to an error walk (Shown in
Fig. 4) since the timing threshold is dependent on the pulse amplitude. A digital implementation
of a Constant Fraction Discriminator (CFD) is chosen for pulse triggering in our digital design
because of its ability to minimize the effect of error walk as shown in [4].
In our Mathematica model a linear interpolation was applied to the simulated pulse
generated with Marrone’s model to determine the time location of the pulse peak. The time
location of the pulse peak is used to divide the signal, isolating the decay component from the
entire pulse for an application of the “tail to charge method” of discrimination, which is
discussed in the next section. In practical applications the detection of the pulse peak can be
influenced by noise fluctuations. A CFD may also be used to determine the timing threshold for
the pulse peak, minimizing the effect of the noise fluctuations. Equation 2, obtained from ref. [5],
is used to implement the CFD on the simulated pulse. The CFD splits the input signal into two
parts. One part is attenuated to a fraction (F) of the original amplitude, and the other part is
delayed by a factor (D) and inverted. These two signals are summed to form the constant-fraction
timing signal. The fraction (F) is chosen so that the leading edge of the delayed signal will
correspond to the original leading edge/amplitude of the signal.
𝐿
𝑉𝐶𝐹𝐷 [𝑘] = ∑{𝐹 ∗ 𝑉𝑘−𝑖 − 𝑉𝑘−𝑖−𝐷 } (𝑒𝑞. 2)
𝑖=1
𝑉𝐶𝐹𝐷 [𝑘] is the output of the implemented CFD equation at a given sample k. 𝑉𝑘
represents the original simulated input pulse. L refers to the number of samples used in the pulse
model which can be considered the signal length. This method of CFD was applied to the
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simulated signal in Mathematica (𝑉𝑘 is equal to simulated pulse output at a given sample [k]) to
determine optimal figures for the delay (D) and the fraction (F). Fig. 5 shows a plot of the
original signal for the scintillator response compared the signal with the applied CFD algorithm
where F = 0.3, D = 4ns and L = 50 samples.
Particle Identification:
Presently available plastic scintillators have a similar amplitude response for neutrons
and 𝛾 -particles. Since the decay rate of the optical pulse response in plastic scintillators is
different for neutrons and 𝛾-particles, one method for particle identification is a “tail to charge”
integration. This method is implemented by calculating a ratio of the integrated charge of the
signal decay component to the integrated charge of the entire signal (eq. 3) which is distinctly
unique for each detected particle type. The system response can compared to this ratio to
determine detected neutrons.
∫ 𝑄𝑡𝑎𝑖𝑙
𝑃𝑆𝐷 =
(𝑒𝑞. 3)
∫ 𝑄𝑓𝑢𝑙𝑙 𝑠𝑖𝑔𝑛𝑎𝑙
This method of discrimination was applied to our simulated signal. Calculating the tail to
charge ratio gives a figure of 0.939891. When the amplitude of the simulated signal is varied to
±5 percent of the original amplitude the tail to charge ratio remains unchanged from the original
figure. This indicates that the ratio is independent of the pulse amplitude. To implement the tail
to charge discrimination method digitally the integrals can be rewritten as the recursive function.
𝐿
𝑦[𝑛] = ∑(𝑡𝑖+1 − 𝑡𝑖 ) ∗ 𝑥(
𝑖=1
𝑡𝑖 + 𝑡𝑖+1
) (𝑒𝑞. 4)
2
The integral is calculated by dividing the signal into a series of step responses and
summing the responses. The width is defined as the time interval 𝑡𝑖+1 − 𝑡𝑖 whose resolution is
determined by the sampling rate. The height is determined by calculating the midpoint of the
pulse response at the time intervals 𝑡𝑖+1 𝑎𝑛𝑑 𝑡𝑖 , which is given by the function of the input
𝑡 +𝑡
signal x[n] = 𝑥 ( 𝑖 2𝑖+1 ).
FPGA Development:
Once the design is determined by modeling, HDL code must be developed by the FPGA
programmer to specify the system input/outputs and how they are processed. For this project,
significant time was spent developing the mathematical model for the received pulses and the
CFD algorithm, completing tutorials on FPGA design, block diagramming the FPGA design, and
programming the FPGA with portions of the DSP design. Shown in Fig. 6 is a block diagram of
the developed FPGA system for digital signal processing. The system digitizes the input pulse
signal, which is then passed to DSP blocks containing the CFD and particle identification
algorithm. The CFD provides the timing information for particle identification. Once a neutron
pulse is discriminated the event is recorded in the pulse counter with a time stamp from the ADC,
and the processed information is sent to the SDRAM controller where it waits to be sent to
memory storage. Buffers are provided for the ADC sampling, pulse processing, and the SDRAM
read and write to prevent data loss during real-time signal processing.
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III. CONCLUSIONS
Kaua‘i CC has repaired and verified the operation of UHF and VHF antennas.
Mechanical operation of the newly installed S-band dish has been completed. Before the launch
of Hiaka-Sat, additional components for signal receiving must be installed and tested for the Sband dish.
The model developed in this project provided the opportunity to understand and optimize
the CFD and particle identification algorithms with an approximated signal response for a
scintillator detector. The model enabled the first pass implementation of an FPGA design on our
Altera DE2 board. While the mathematical model aided in the design process, the FPGA design
developed during this project must still be optimized empirically with the scintillator that will be
implemented onboard a satellite mission. Other aspects of the FPGA design such as digital pulse
shaping and data compression algorithms which have not been addressed in this project will be
important areas of development for the progression of our FPGA design.
ACKNOWLEDGMENTS
Hawai‘i Space Grant Consortium, Hawai‘i Space Flight Lab, NASA.
REFERENCES
[1] Murphy, R. J., Kozlovsky, B., Share, G. H., Hua, X. M., & Lingenfelter, R. E. (2007). Using
gamma-ray and neutron emission to determine solar flare accelerated particle spectra and
composition and the conditions within the flare magnetic loop. The Astrophysical Journal
Supplement Series, 168(1), 167.
[2] Lawrence, D. J. et al., E. Using Solar Neutrons to Understand Solar Acceleration Processes.
(unpublished article on www. Nationalacademies.org.)
[3] Marrone, S. et al., (2002). Pulse shape analysis of liquid scintillators for neutron studies.
Nuclear Instruments and Methods in Physics Research Section A: Accelerators,
Spectrometers, Detectors and Associated Equipment, 490(1), 299-307.
[4] Kilpelä, A., Ylitalo, J., Määttä, K., & Kostamovaara, J. (1998). Timing discriminator for
pulsed time-of-flight laser range finding measurements. Review of Scientific Instruments,
69(5), 1978-1984.
[5] Peng, H., Olcott, P. D., Foudray, A. M. K., & Levin, C. S. (2007, October). Evaluation of
free-running ADCs for high resolution PET data acquisition. In Nuclear Science
Symposium Conference Record, 2007. NSS'07. IEEE (Vol. 5, pp. 3328-3331). IEEE.
77
Figure 2. SOPC Builder system shown with a CPU component, USB interface, PLL, SSRAM and DDR
SDRAM.
amplitude normalized to 1
1.0
Threshold set to fraction
0.3 of normalized
amplitude
0.8
0.6
0.4
0.2
nanosecond
0
10
20
30
40
50
Error walk
Fig 4. Two simulated neutron pulses with different amplitudes are shown with an
approximated threshold set for pulse triggering and time pickoff. The two pulse leading edges
are shown to have similar starting times but the set threshold will trigger at different times.
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amplitude
1.0
0.5
ns
10
20
30
40
50
0.5
1.0
Figure 5. Original signal response generated using Marrone’s model
and the signal with the CFD algorithm applied. Using a delay of D = 4ns
and a fraction F = 0.3 the zero crossing point of the CFD trace
corresponds with the pulse amplitude of the original signal.
SDRAM
ADC Sampling
ADC
MUX
Register
Memory
Storage
SDRAM
COntroller
RD
Buffer
WR
Buffer
Processing
Data Buffer
Buffer
Digital signal processing Blocks
CFD
FIFO
Particle
Identification
Pulse Data
Buffer
Time Stamp
ACCUM
FIFO
Pulse Counts
Figure 6. FPGA design for a neutron detector with CFD and particle identification blocks. Once
particles are discriminated the counts are passed into an accumulator.
79