Optimization of Cu/Sn SLID wafer level bonding based
upon intermetallic formation
Thi-Thuy Luu*, Ani Duan, Kaiying Wang, Knut E. Aasmundtveit and Nils Hoivik
HiVe - Vestfold University College, IMST – Dept. of Micro and Nano Systems Technology,
Raveien 197, 3184 Borre, Norway
For MEMS devices, which are very fragile and sensitive after released, the correct packaging is crucial to
ensure high performance. Cu/Sn SLID bonding is an attractive candidate due to its low cost compared to Au,
Ag. In addition, with demonstrated high bond strength [1] and temperature stability [2], the metallurgy also
presents an opportunity to enable high reliability and 3D integration [3]. This bonding process has recently
been demonstrated for wafer-level MEMS encapsulation [2, 4]. However, the formation of the intermetallic
compounds (IMC) which take place during the bonding process must be well understood.
The aim of this study is to characterize IMC formation during Cu/Sn SLID bond process and build a
simulation model for IMC growth thickness, which is important to optimize the bond process and then reduce
the bond time in wafer bonder in order to reduce the packaging cost.
In order to investigate the kinetics model of Cu3Sn layer, different temperatures of 200-300oC and times 0-80
min were selected for annealing experiment. Growth kinetics constants are extracted from IMC thickness
measurement and based upon the kinetics model y2t–y20=k0 exp(-Q/RT)t2n and showed in Figure 1. A
simulation model for IMC growth during bond process was built based upon extracted kinetics constant.
Figure 2 shows a matching between measured and simulated IMC thickness for an actual bond sample. This
simulation model is important for bond profile optimization in term of temperature and time to achieve final
Cu/Cu3Sn/Cu bond interface.
ln(𝑘) = ln(𝑘0 ) +
−𝑄 1
1
. = 12.9 − 7680
𝑅 𝑇
𝑇
a
b
Figure 1: a: Extracted diffusion constant k as function of temperature, the trendline shows diffusion energy k0 and activation energy Q2b: Extracted
empirical coefficient n as function of temperature, the dotted line represents the melting point of Sn. Below the melting point of Sn, growth kinetics
does not follow diffusion mechanism and we obtain a lower value of n.
Cu6Sn5
2a
2.4µm
Cu
Cu3Sn
Cu3Sn
Cu
2b
Figure 2: Comparison of simulated and measured thicknesses of Cu3Sn layer. The observed thickness matches the predicted value.
References
[1]
[2]
[3]
[4]
L. He, et al., "Wafer-Level Cu/Sn to Cu/Sn SLID-Bonded Interconnects With Increased Strength," Components, Packaging
and Manufacturing Technology, IEEE Transactions on, vol. 1, pp. 1350-1358, 2011.
A. Lapadatu, et al., "Cu-Sn Wafer Level Bonding for Vacuum Encapsulation of Microbolometer Focal Plane Arrays," ECS
Transactions, vol. 33, pp. 73-82, 2010.
R. Agarwal, et al., "High density Cu-Sn TLP bonding for 3D integration," in Electronic Components and Technology
Conference, 2009. ECTC 2009. 59th, 2009, pp. 345-349.
C. Yuhan and L. Le, "Wafer level hermetic packaging based on Cu–Sn isothermal solidification technology," Journal of
Semiconductors, vol. 30, p. 086001, 2009.