Electronics ECE 1312 INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA END OF SEMESTER EXAMINATION SEMESTER I, 2014/2015 SESSION KULLIYYAH OF ENGINEERING Programme : ENGINEERING Level of Study : UG 1 Time : 2:30 pm - 5:30 pm Date : 05/01/2015 Duration : 3 Hours Section(s) :1-9 Course Code : ECE 1312 Course Title : Electronics This question paper consists of eight (8) printed pages (including cover page) with five (5) questions. INSTRUCTION(S) TO CANDIDATES DO NOT OPEN UNTIL YOU ARE ASKED TO DO SO ο· ο· ο· Total mark of this examination is 100. This examination is worth 50% of the total assessment. Answer ALL FIVE questions. Any form of cheating or attempt to cheat is a serious offence which may lead to dismissal. 1 Electronics ECE 1312 Q.1 [20 marks] (a) State two characteristics for each conventional pn-junction diode and Ziner diode. ( 4 marks) (b) Design a full-wave center-tapping rectifier circuit for a desired peak output current, πΌπΏ = 125 mA with a transformer feed as shown in Fig. 1(b). Assume that the transformer primary is connected with a 220 V(rms) main supply line and the circuit diode cut-in voltage VΞ³ = 0.65 V and ππ = 10 Ξ©. (Hint: determine the transformer turns ratio). (6 marks) Fig. 1(b). (c) Repeat question Q.1 (b) using the ideal diode model (VΞ³ = 0 V and ππ = 0 Ξ©). (3 marks) (d) Derive the output voltage π£0 for the input voltage π£i = πM sin(Οt) of the ideal diode clamper circuit is as shown in Fig. 1(d). (3 marks) Fig. 1(d) 2 Electronics ECE 1312 (e) Sketch the output voltage waveform for the circuit in Fig. 1 (d) by analyzing the circuit for the input triangular voltage waveform as shown in Fig. 1(e). (4 marks) Fig. 1(e). Q.2 [20 marks] (a) A common emitter BJT circuit is designed as shown in Fig. 2(a). The output load line and defined Q-point of the circuit is shown in Fig. 2(a). Determine the required values of πCC , π C and π B . Assume that πBE (on) = 0.7 V. (6 marks) Fig. 2(a) (b) The voltage transfer characteristic and its BJT circuit are shown in Fig. 2(b). Find the value of the resistor, RB by assuming VI = 1.9 V. Given the valus of VBE(on) = 0.7 V and Ξ² = 120. RB Fig. 2(b) 3 (6 marks) Electronics ECE 1312 (c) What is the purpose of biasing? (2 marks) (d) For the biasing circuit shown in Fig. 2(d), RB = 250 kο, RC = 5 kο and VCC = 10 V. By assuming that VBE(on) = 0.7 V and Ξ² = 30, calculate IBQ, ICQ, and VCEQ. (6 marks) Fig. 2(d) Q. 3 [20 marks] (a) Give two differences between common emitter and common collector amplifier circuits. (2 marks) (b) A common collector circuit is shown in Fig. 3 (b), i. ii. iii. iv. Determine the DC collector current. Prove that the circuit is biased in forward-active mode. Draw the small-signal equivalent circuit. Find the input resistance π π and voltage gain π΄π£ = π£0 /π£π . Assume that the transistor parameters are; Ξ² = 110, VBE (on) = 0.7 V and VA = β. Fig. 3 (b) 4 (4 marks) (2 marks) (2 marks) (6 marks) Electronics ECE 1312 (c) A common-emitter circuit is shown in Fig. 3(c), the transistor parameters are, Ξ² = 110, VBE(on) = 0.65 V, ICQ = 0.2 mA and VCEQ = 3.2 V. Assume that, RS = 1 kβ¦, RE = 2.5 kβ¦, RC = 13 kβ¦ and ro = β. i. ii. Calculate the small-signal transistor parameters, rΟ and gm. Draw the small-signal equivalent circuit. (2 marks) (2 marks) Fig. 3(c) Q.4 [20 marks] (a) A common source amplifier is designed as shown in Fig. 4(a). Consider the MOSFET parameters are, πππ = 1.8 V, πΎπ = 0.15 mA/V 2, ππ = 0.77 mA/V and ο¬ = 0. i. Verify that the MOSFET is working in the saturation region. Assuming that VGS = VDS. (3 marks) ii. Draw the small signal equivalent circuit. (3 marks) iii. Determine the value of the voltage gain, π΄π£ = π£0 /π£π (4 marks) Fig. 4(a) 5 Electronics ECE 1312 (b) i. Design the common drain amplifier circuit as shown in Fig. 4(b) for voltage gain Av = v0 βvi = 0.925. The parameters of the MOSFET are, gm = 4 mA/V and ro = 50 kο. (4 marks) ii. Draw the small signal equivalent circuit (2 marks) iii. Determine the effect of voltage gain if RS = ο₯ (4 marks) Fig. 4(b) Q. 5 [20 marks] (a) Compare four differences between BJT and MOSFET. (4 marks ) (b) Design an n-channel MOSFET circuit shown in Fig. 5(b) to fulfill a set of conditions as πΌπ·π = 0.6 mA and ππ·ππ = 3.5 V. Given that the transistor parameters are πΎπβ² = 120 ΞΌA/V2, (πβπΏ) = 8 and πππ = 1.5 V (8 marks ) Fig. 5(b) 6 Electronics ECE 1312 (c) Design the non-inverting amplifier as shown in Fig. 5(c) with a voltage gain of 25 by determining the value of resistance π 1 . (2 marks) Fig. 5(c) (d) A summing amplifier is shown in Fig. 5(d) with a feedback resistance, RF = 10 kβ¦. Design the circuit to produce a specific output signal, such that π£0 = (1.25 β 2.5 cos ππ‘) V. Assume that the input signals are, π£πΌ1 = β1.0 V and π£πΌ2 = 0.5 cos ππ‘ V. (6 marks) Fig. 5(d) 7 Electronics ECE 1312 Some Useful Equations For pn-junction diode: I D ο½ I s (e vD VT ο 1) For BJT: I CQ gm ο½ rο° ο½ ro ο½ VT ο’ VT I CQ VA I CQ For NMOSFET: I D ο½ Kn [2 ο¨VGS ο VTN ο© VDS ο VDS ] 2 I D ο½ K n ο¨VGS ο VTN ο© 2 ro ο½ 1 I DQ ο¬ g m ο½ 2 K n I DQ Kn ο½ Wο n Cox 2L πΎπβ² π πΎπ = β 2 πΏ 8