Design of Nano-scale Tunnel Diode with High Peak-to

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Design of Nano-scale Tunnel Diode with High Peak-to-Valley
Current Ratio (PVCR)
Gaurav Patel1, Vimal Kumar Mishra2, R.K. Chauhan3
Department of Electronics and Communication Engineering
Madan Mohan Malaviya University of Technology, Gorakhpur UP India 273010
dgauravm@gmail.com1, vimal.mishra34@gmail.com2, rkchauhan27@yahoo.com3
Abstract: A nano-scale resonant interband tunnel
diode with
high peak-to-valley current ratio is
proposed. The device shows negative differential
resistance with peak to valley current ratio of 3.735.
The peak current density is 43.7mA/µm2 and the valley
current density is 11.7mA/µm2 at room temperature.
The tunnel diode shows very low negative biasing
current of 0.376nA, which is almost constant in reverse
biasing. This paper also includes study of peak to
valley current ratio of the RITD model at different
doping profiles.
Index Terms— Peak to valley current ratio (PVCR),
negative differential resistance (NDR), resonant
interband tunnel diode (RITD), CMOS, HBT.
Introduction:
Rapid development in the fields of computer
and communications led to the need for large memory
units and very fast processors. The continuing
miniaturization of the conventional CMOS technology
faces increasing technological difficulties. These
difficulties, such as quantum effect problem, will force
the miniaturization process to reach its limit. Therefore
we need alternative technologies that can provide the
required large memories and fast processors.
Technologies that contain RITD devices can offer a
good alternative technology for high speed
applications. RITD has many advantages that make it a
promising device. Its operation depends on tunneling
process [1] which is a very fast process, so it is a
suitable device for ultra high speed applications [2]-[3].
Also RITD can be integrated with CMOS, HFET, and
HBT technologies. Its Negative Differential Resistance
(NDR) property makes a remarkable reduction in logic
circuits' complexity.
Since the initial proposal and fabrication of
resonant interband tunneling diodes (RITDs), extensive
efforts have been made to improve the current-voltage
(I-V) characteristics of these devices. Much of this
effort has been focused on improving the peak-tovalley current ratios of these structures, and significant
progress has been made. It has been shown that once a
satisfactory peak-to-valley ratio has been achieved,
further improvements in device performance must
come from lowering the device capacitance and
increasing the peak current density of the device.
The performance of semiconductor devices
depends on their physical properties, chemical
composition as well as on the arrangements of atoms in
the crystal [4-5]. Inspite of these properties, the
semiconductor nanostructures possess the features of a
highly ordered structure within extremely confined
geometries [6-7]. Nano-scale diodes exhibit a wide
variety
of
applications
in
electronic
and
communication systems, such as in sensors, low power
and other optical applications. Besides the synthesis of
these devices, the study of electrical transport
properties is another important parameter for
characterizing nano-devices for potential applications
in the area of electronics. Moreover, the electrical
properties of the diodes can be controlled by selective
doping [8]. The most efficient design of nano p-n
junction is a core-shell structure, where the injection
occurs uniformly over the entire cross section of the
device. I-V characterization of nano-electronic devices
requires low level current measurements in the range of
nano-amperes to femto-amperes [9-11]. Thus, high
sensitive instruments are required, and appropriate
measurement and connection techniques must be
employed to avoid errors. In recent times, resonant
tunneling diode is considered as an element of a future
low power, high density integrated circuit because of a
possible ultra low power operation with a few electrons
[12]. For the practical application, it is necessary for
RITD to be operated at room temperature. For this
purpose the dimensions of the device must be as small
as possible. Therefore, we propose very small size
resonant interband tunnel diode model with high peak
to valley ratios using Visual TCAD Lab (Cogenda).
Results and Discussion
The device is a simple hetrojuction
architecture of SiGe material. This is a 2-Dimensional
model formed on the Visual TCADLAB. Firstly an
intrinsic Si substrate of 1nmx1nm (length×width) is
taken and n type doping is done on Si substrate, above
this 1nm×1nm intrinsic Ge substrate is placed and two
contact points are made by attaching(placing)
1nm×1nm Al at both the ends (Anode and Cathode).
The device is shielded by 0.5nm layer of HFO2, which
reduces the leakage current of the RITD.
4
PVCR
3.5
3
2.5
2
1.5
1
0.5
doping concentartion
0
0
1
2
3
4
5
6
7
8
9 10
Figure 2 Peak to Valley ratio versus donor doping
concentration (1018/cm3) inside Si with intrinsic Ge.
Figure 1 Schematic diagram of the Si/Ge Tunnel Diode
The doping concentration of donor atom
inside the Si is varied from the 1x1018 to 1x1019 and
various peak-to-valley current ratio is obtained at
different doping concentration as shown in the Table1
and Figure 2. No tunnelling current and peak to valley
ratio is observed at donor concentration 1x10 18/cm3 to
2x1018/cm3. The tunnelling current observed at 3x1018
doping concentration and there is no current is
observed below this doping concentration. The peakto-valley ratio of 3.66 with peak current 39.7 µA and
valley current of 10.8 µA and is constant over the
doping concentration 3x1018 to 4 x1018/cm3. Different
PVCR, peak current and valley current obtained at
different doping concentration is shown in Table 1 and
graph is shown in Figure 2.
Doping
Concentration
(1018/cm3)
1
Peak
Current
(µA)
0
Valley
Current
(µA)
-
2
0
-
0
3
39.7
10.8
3.66
4
39.7
10.8
3.66
5
33.0
11.3
2.92
6
37.8
11.4
3.28
7
42.1
11.6
3.62
8
27.2
11.7
2.34
9
27.3
11.8
2.31
10
28.5
12.0
2.37
PVCR
0
Table 1 Peak-to-valley current ratio peak current and valley
current at donor concentration inside Si with intrinsic Ge.
12.5
Valley current
12
11.5
11
10.5
10
3
4
5
6
7
8
9
10
doping concentration
Figure 3 Valley current (µA) at different donor doping
concentration (1018/cm3) inside Si with intrinsic Ge.
45
40
35
30
25
20
15
10
5
0
Peak current
3
4
5
6
7
8
9
10
doping concentration
Figure 4 Peak current (µA) at different donor doping
concentration (1018/cm3) inside Si with intrinsic Ge.
From the Table 1, Figure 3 and Figure 4 it can
be seen that the valley current increases on increasing
the doping concentration whereas the peak current may
increase or decrease on increasing the doping
concentration of doping inside the Si.
We get a high peak-to-valley current ratio of
3.735 at donor concentration of 7.5x1018/cm3 is
achieved as shown in Figure 5. The peak current of
43.7µA is achieved at peak voltage 0.32V and the
valley current of 11.7µA is achieved at 0.42V which
corresponds to very high current density of
43.7mA/µm2 and 11.7mA/µm2 for peak and valley
current respectively. The high current density is
achieved due very short length of tunnel diode. The
region from 0.32V to 0.42V shows negative differential
resistance because current decreases on increasing the
voltage. There is almost a constant current of 0.376nA
in the reverse bias condition and 0.859nA reverse
current at zero biasing voltage.
We get a high peak-to-valley current ratio of
3.725 at donor concentration of 4.1x1019/cm3 is
achieved as shown in Figure 6. The peak current of
50.3µA is achieved at peak voltage 0.311V and the
valley current of 13.5µA is achieved at 0.408V which
corresponds to very high current density of
50.3mA/µm2 and 13.5mA/µm2 for peak and valley
current respectively. The high current density is
achieved due very short length of tunnel diode. The
region from 0.311V to 0.408V shows negative
differential resistance because current decreases on
increasing the voltage. There is almost a constant
current of 0.377nA in the reverse bias condition and
0.281nA reverse current at zero biasing voltage.
PVCR
3.735
PVCR
3.725
Peak Current (IP)
43.7µA
Peak Current(IP)
50.3 µA
Valley Current (IV)
11.7 µA
Valley Current(IV)
13.5 µA
IP - IV
32 µA
IP - IV
36.8 µA
Peak Voltage (VP)
0.32V
Peak Voltage(VP)
0.311 V
Valley Voltage (VV)
0.42V
Valley Voltage(VV)
0.408 V
VP - VV
0.1V
VP - VV
0.097 V
Maximum Reverse Current
0.376nA
Maximum Reverse Current
0.377nA
Current at zero bias voltage
-0.859nA
Current at zero bias voltage
-0.281nA
Table 2 Different parameter obtained from simulation at
donor concentration 7.5x1018/cm3 inside Si with intrinsic Ge.
50 (µA)
Anode Current
Table 3 Different parameter obtained from simulation at
donor concentration 4.1x1019/cm3 inside Si with intrinsic Ge.
60 (µA)
Anode Current
50
40
40
30
30
20
20
10
10
Anode Voltage (V)
0
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-10
Figure 5 Current-voltage characteristic of tunnel diode at
doping concentration 7.5x1018/cm3 inside Si with intrinsic Ge
showing PVCR of 3.735 at room temperature (Voltage is
applied at Anode with grounded Cathode).
Anode Voltage (V)
0
-0.2
-0.1
0
-10
0.1
0.2
0.3
0.4
0.5
Figure 6 Current-voltage characteristic of tunnel diode at
doping concentration 4.1x1019/cm3 inside Si with intrinsic Ge
showing PVCR of 3.725 at room temperature (Voltage is
applied at Anode with grounded Cathode).
Conclusion:
The device shows almost constant reverse current at
each doping concentration. The device have almost a
constant Vp-Vv for all doping profiles and shows a
varying PVCR. Maximum PVCR is observed at
7.5x1018/cm3 and 4.1x1019/cm3 which are 3.735 and
3.725. On increasing the doping concentration the
valley current increases whereas peak current can
increase or decrease. Due to small size of the tunnel
diode it can be easily used in the SRAM, MOSFETs’
for reducing the size and enhancing the speed of the
device. Since the difference between the peak voltage
and valley voltage is very low (0.1V) hence it can be
used in the high speed operation.
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