EE 381 — Electronics I Lab Procedures OVERVIEW: Electronics I laboratory meets for three hours in most weeks. Each lab session will consist of a brief lecture/review on the upcoming lab experiment followed by experimental verification of the current week’s lab experiment. The course will include six experiments, most of which consist of simulation and hardware verification. If you need to deviate from the schedule below, permission is required from your TA prior to the scheduled laboratory time. LAB SCHEDULE: Week # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Dates 8/24 - 8/27 8/31-9/4 9/7-9/11 9/14-9/18 9/21-9/25 9/28-10/2 10/5-10/9 10/12-10/16 10/19-10/23 10/26-10/30 11/2-11/6 11/9-11/13 11/16-11/20 11/23-11/27 11/30-12/4 12/7-12/11 Activity No lab Ethics Case - Intro (A) Lab 1 - Diode and Rectifier (B) Lab 1 - Diode and Rectifier (A) Lab 2 - MOSFET CZ (B) Lab 2 - MOSFET CZ (A) Lab 3 - MOSFET Current Sources (B) Lab 3 - MOSFET Current Sources (A) Lab 4 - MOSFET Diff Amp (B) Lab 4 - MOSFET Diff Amp (A) Lab 5 - 2-stage CMOS OpAmp (B) Lab 5 - 2-stage CMOS OpAmp (A) Lab 6 - Freq Response CMOS Amp (B) Lab 6 - Freq Response CMOS Amp No lab Finals - No Lab Labs are held every week beginning with week 2. Assigned groups (A/B) meet on even or odd weeks. Reports (Tech Memos – total of 3) are due one week after completing (Labs 1 & 2), (Labs 3 & 4) and (Labs 5 & 6). All reports must be submitted electronically on MyCourses. A computer created originality report will be run on your submission. Grades and comments on your report can be viewed in MyCourses. Late labs may be penalized 10% per day. The maximum late penalty for a given report is 50%. The maximum grade for labs handed in after five days is 50%. Pre-lab simulations must be captured electronically and put in a Word document. They should be open and ready to be checked off at the beginning of lab. Pre-lab theoretical calculations must be done individually and be presented neatly at the beginning of lab on a separate sheet of paper. (include as an appendix Electronics I – EE 381 — Lab Procedures — Fall 2015 (8/30/15) Rochester Institute of Technology Page 1 of 5 Teaching Assistants — Office: 09-3248 Grading: Approximate Tech Memo Weighting Section Value Pre-Lab Hand 10 points Pre-Lab Spice 10 points Abstract 40 points Theory/Design 10 points Results 10 points Discussion 15 points Format 5 points 6 labs plus 3 Tech Memos = 90% Overall Lab Performance (Participation and helpfulness) = 10% Attendance: Attendance is mandatory. If you have a valid reason for missing lab, inform your TA before the day of the lab. Laboratories will be made up by appointment only and the TA must sign the results. It is your responsibility to inform the TA in advance and to schedule a time slot during which to make up the experiment. Lab reports (tech memos) are considered late immediately after they are due. PRE-LAB: The pre-lab for each experiment MUST be completed BEFORE coming to the lab. If you do not understand part of the pre-lab, then it is your responsibility to get help before the lab. The pre-lab allows you to understand how to perform the lab, what is being done, and how to interpret your results. It is to your benefit to have the pre-lab done in advance! You will be penalized 10% of your report grade if your pre-lab is not completed when the TA comes around to check it off. If the design and simulation have not been completed before coming to lab you will not be allowed to build/test the hardware until the design and simulation are finished and checked off by your TA. Electronics I – EE 381 — Lab Procedures — Fall 2015 (8/30/15) Rochester Institute of Technology Page 2 of 5 Teaching Assistants — Office: 09-3248 SIMULATION: Simulation is expected to be performed on Orcad Capture CIS. Students may use the PCs in the CEDA lab or any of the other labs they may have access to. Capture CIS is installed on all PCs on the EE (3rd) floor. You can obtain an Orcad Lite Demo CD for free by visiting http://www.orcad.com/ and clicking on the download link. The Demo CD will be mailed to you after filling out the user profile. You can also download the student version from the website as well. It’s a zipped file that is about 28 MB in size. It should be noted that simulation is meant to be used for confirmation of hand design before the construction of the circuit in the laboratory. It is poor engineering practice to use simulation for designing circuits by a trial and error method, as this leads to a lack of understanding of the circuit design process. WORKING IN GROUPS: The pre-lab and simulation portions of each experiment must be completed individually. Students are allowed to work in groups of up to two people for the hardware portion of each experiment. At the time of hardware check-off, both students in the group must be present and present their circuit for verification. Each student must turn in his or her own, original report. Reports are not to be completed in groups!!! GETTING HELP: Both your professor and your TA are willing to assist you with any problems that you might have. However, it is your responsibility to contact them before the scheduled laboratory meeting time. Office hours are posted outside the TA office. Feel free to come in and ask questions during this time. If the posted times conflict with your schedule, please speak with your TA to arrange another time to meet. A FEW NOTES ON PROTOTYPING: Prototyping can be a painful or rewarding experience. Proper approach to the exercise often determines which experience you will have. Following a systematic approach to construction and test of your circuits will save you time and improve the quality of your results. This is true for all of the labs in EEEE 381, but especially true as you build circuits that become part of the circuit for the upcoming weeks. It is critical that you pay careful attention to the construction of your circuit to avoid instability and oscillations. Tips for prototyping and debug are provided in Appendix A. You should review these tips and adopt them for your laboratory work. Electronics I – EE 381 — Lab Procedures — Fall 2015 (8/30/15) Rochester Institute of Technology Page 3 of 5 Teaching Assistants — Office: 09-3248 Appendix A: Tips for Prototyping and Debug TIPS FOR PROTOTYPING Circuits that you will design and build in the EEEE 381 laboratory exercises will not work properly if your prototype circuit is not carefully constructed. Follow these guidelines to reduce the number of issues you will encounter during lab execution. 1. Establish a single bus for each of your power rails (VDD, VSS) and ground. 2. Cut wires to an appropriate length so they will lay flat against the board and take a straight line path from component to component, or component to bus. 3. For all resistors and capacitors that go to a power rail or ground, connect them directly (rather than through a wire). 4. Avoid long wire loops in general, but especially on power and ground and on the common node (emitter / source terminals) of your differential amplifier. TIPS FOR BUILD / DEBUG A systematic approach to circuit construction and debug can save you immense amounts of time. Here is an approach that will avoid damaged components and significantly increase the likelihood of success. 1. Use a schematic that is clearly drawn and in a format that you understand. This means you should have all transistors shown and in a configuration that is recognizable (e.g., differential amplifier looks like the differential amplifiers we draw in class, current mirrors look like current mirrors, etc). Use of a schematic that is based on the IC (e.g., something you print out from Orcad PSPICE) will make debug of the circuit much more difficult. Drawing the schematic by hand in your lab notebook is generally the easiest way to do this. 2. On your schematic, label the pin numbers that correspond to your IC. Also sketch your transistor package so you have a reference for the EBC/SGD (emitter-basecollector/source-gate-drain) pin assignments. 3. On your schematic, write down expected DC voltages at all nodes. 4. As you build your circuit, measure (with the multimeter) all component values and label on your schematic. This will allow you to know exactly what the component values are for your theoretical equations. It also helps avoid errors of the wrong resistor in a bin, or a color blind colleague reading the resistor code incorrectly. 5. After building your circuit, double check all connections against your schematic. (cont’d) Electronics I – EE 381 — Lab Procedures — Fall 2015 (8/30/15) Rochester Institute of Technology Page 4 of 5 Teaching Assistants — Office: 09-3248 6. The protoboards you are using in lab are convenient, are notorious for poor connections. Before applying power, you should confirm that all components have the proper electrical connections. Use the “continuity” check on the multimeter to confirm electrical connections between all pins. This will provide an audible beep when the probes are electrically connected. Systematically go through your schematic and probe from the pins on the components that you expect to be connected. Similarly for component pins to power and ground. This is a simple (and fast) way to confirm everything is actually connected as you expect. 7. Apply power to your circuit and measure the DC voltage at all pins. Confirm these match what you have written on your schematic. If they do not, then you may have made an error in design. Or perhaps you should go back to steps 4-6. 8. Apply the AC input to your circuit. With your scope probe, examine the waveforms starting at the input node and working your way through the circuit to the output. Confirm that the waveform is as expected at all points. If it is not, you may have an error in design, or perhaps you should go back and repeat steps 4-7. 9. As you examine your waveforms on the scope avoid the “auto” button. You want to know how things are set up. When you press the “auto” button it will change all of the settings and you’ll have to re-check everything again. 10. Carefully look at the time base to make sure you are seeing a waveform of the appropriate frequency. Many students have issues with amplifier stability and oscillations at high frequencies. If you have this issue you can probe (with your finger) all the nodes on the circuit while watching the oscillations. If you see the waveform change shape slightly as you touch a node, it means you have found a sensitive node that may be the culprit responsible for the oscillations. Go back to “Tips for Prototyping” and see if you can clean up this area of your circuit. Electronics I – EE 381 — Lab Procedures — Fall 2015 (8/30/15) Rochester Institute of Technology Page 5 of 5 Teaching Assistants — Office: 09-3248