LPRDS-BMS 2010
Lafayette Photovoltaic Research and
Development System – Battery Management
System
ECE 492 – 2010
Switch Controller Algorithm
2
Switch Controller Algorithm
Abstract
This report presents the design of the algorithm to be implemented in the Switch
Controller of the LPRDS-BMS. Included in the report is a discussion of how the algorithm was
chosen and a detailed description of how it works. Appendix A provides experimental results in
support of the algorithm selected for this design.
Introduction
The purpose of the Switch Controller (SC) is to prevent the batteries in the Energy
Storage System (ESS) from being overcharged or undercharged and also to dictate the flow of
energy among the Photovoltaic (PV) array, ESS, and Filter Inverter Box (FIB). The SC design
implements two high voltage switches on either side of high voltage line going to the ESS. The
state of switch A controls whether energy from the PV array can flow to the ESS and FIB and
the state of switch B controls whether energy from the ESS can flow to the FIB. The block
diagram in Figure 1 illustrates the location of switches A and B in relation to the rest of the
system.
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Switch Controller Algorithm
FIT PC
SC
Controller
Switch A
Switch B
FIB
RPI
ESS
LiFePO4
Battery
PV Array
Figure 1 – Block Diagram of SC and System
The design as shown in Figure 1 was decided after the consideration of adding a third
switch between the ESS and the SC. This third switch would allow for situations in which it
would be advantageous to disconnect the ESS while the PV array could still provide power to the
FIB. For example, a situation where the batteries in the ESS are fully charged, yet the PV array
is still providing sufficient power to supply a load connected to the FIB. In this example it
would be more efficient to use the energy from the PV array to supply the load while
disconnecting the ESS for later use.
The first problem this design raises is that of power point tracking. Power point tracking
refers to setting the point on the PV array voltage-current curve that maximizes the power output.
Figure 2 below presents the IV curve relevant to the solar cells used in this design project.
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Switch Controller Algorithm
Figure 2 – IV Curve for Various Levels of Insolation and Temperature
As shown in Figure 2, changes in insolation and cell temperature can shift the IV curve.
Due to the shifting nature of the IV curve, some method for adjusting the output voltage and
current of the PV array would be preferred. One method of setting this point is to adjust the
Thevenin resistance seen by the PV array to hold the voltage and current supplied by the PV
array, at maximum. This method requires additional circuit design to handle the implementation
of such an algorithm and is not required by the statement of work. Another solution to
maximizing the power supplied by the PV array is to hold the voltage at a point on the curve
where the current will not change significantly with changes in cell temperature. This method
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Switch Controller Algorithm
provides a rough means of maximizing the power output of the PV array because the voltage will
be set close to the maximum voltage and the current will change only with changes in insolation.
This method of maximizing power output from the PV array was preferred by the 2009
design team and so the ESS was designed with this in mind. The voltage across the battery stack
within the ESS is used to hold the voltage supplied by the PV array at this point. The voltage
across the ESS should vary between 164V and 234V depending on the state of charge (SoC),
thus holding the voltage supplied by the PV array between this range on the flat portion of the
PV array IV curve. With this design, the ESS can never be disconnected from the PV array
while the PV array is supplying power because the ESS is required to set the voltage of the PV
array. This constraint eliminated the possibility of adding a third switch between the ESS and
the SC.
Switch Controller Algorithm
The SC algorithm to be implemented in this design controls the two switches A and B, on
either side of the ESS positive high voltage terminal. The logic for the algorithm will be written
in software within the FIT PC and will communicate with the SC data acquisition board (DAQ)
via an RS-485 Ethernet cable. The SC DAQ board will relay control signals to switches A and B
based on commands sent from the FIT PC. Also, the SC DAQ board will relay voltage
measurements from the ESS DAQ board to the FIT PC.
The logic for the SC algorithm is based in part, from Tyson DenHerder’s work described
in his senior project paper, Design and Simulation of Photovoltaic Super System Using Simulink.
The algorithm considers the voltage of the battery stack within the ESS and determines the state
of switches A and B based on predefined voltage threshold values.
Switch A, controlling the
flow of energy from the PV array, is closed if the battery stack voltage falls below 186V (45%)
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Switch Controller Algorithm
and open if the battery stack voltage becomes larger than 234V (100%). Switch B, controlling
the flow of energy to the FIB, is closed if the voltage becomes greater than 195V (55%) and
open if the voltage falls below 164V (20%). After switch B is opened, the FIB must ensure that
the PWM is off until 10 ms after switch B closes again. The next states of switches A and B are
based on the previous state of the switches. Table 1 below shows the truth table used to
determine the state of switches A and B based on the voltage measured on the battery stack.
Condition
V >= 234
V >= 234
186 < V < 234
187 < V < 234
V <= 186
V <= 187
A'
0
1
0
1
0
1
A
0
0
0
1
1
1
Condition
V <= 164
V <= 164
164 < V < 194
164 < V < 194
V >= 194
V >= 194
B'
0
1
0
1
0
1
B
0
0
0
1
1
1
Table 1 – Truth Table for switches A and B
It is important to note that these voltage thresholds were determined based on the
specifications from the battery cell manufacturer and through testing. Also, the testing done to
verify the voltage thresholds was performed on only one 3.2V battery cell. The low voltage
thresholds determined from testing were then extrapolated to determine the high voltage battery
stack voltage thresholds. Figure 3 below shows a state diagram for switches A and B based on
the voltage measured on the battery stack. Figure 4 below shows a state transition diagram for
switches A and B based on the SC algorithm with fault conditions considered as well.
In the event of a fault, all three switches open. When recovering from a fault, the ESS
switch must be close first before all others. Then, depending on the battery voltage, if switch B
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Switch Controller Algorithm
is to be closed, there must be a minimum of a 10 ms delay between the ESS switch and switch B
closing to ensure that there’s no large current spike.
Figure 3 – State Diagram for Switches A and B
SC Algorithm Testing
Testing of the SC algorithm described above was performed on a single 3.2V LiFePO4
battery of the same type that is used in the ESS battery stack. Figure 4 below shows the test
setup. An adjustable discharge load box was used to discharge the battery cell as well as
simulate a variable load attached to the ESS such as the FIB. A DC power supply was used to
charge the battery cell as well as simulate power coming from the PV array. The battery voltage
was monitored and plotted using a LeCroy Oscilloscope.
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Switch Controller Algorithm
Figure 4 – Single Cell Charge/Discharge Test Setup
Tests were performed to verify that the voltage thresholds corresponding to the SoC of
the battery cell were accurate. Those voltage thresholds chosen for the algorithm proved to be
approximately representative of the battery cell SoC. Similar tests were also performed to
simulate varies functions of the SC algorithm. It was determined that given the charge and
discharge curves under various loading and supplying conditions, the algorithm would prove
effective.
Appendix A below shows the results from testing done on 3.2V LiFePO4 battery cell S69 and S-70. Figure A1 shows the results from charging a single battery cell at 8A to the 3.65V
(100%) threshold and then removing the DC power supply while beginning to discharge at 5A.
At the 2.57V (20%) threshold, the load was removed and the open circuit (OC) voltage was
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Switch Controller Algorithm
measured after settling. At 3.02V (55%), the SC algorithm would close switch B (thinking the
battery has charge) reconnecting the load simulated here at 5A. This test shows that at a
discharge rate of 5A the OC voltage settled to 2.94V (47%) and therefore will not creep above
the 55% threshold causing a false trip of switch B. Also, prior to discharge, this battery cell was
charged at 8A to the 100% threshold and then the OC voltage was measured after settling. The
3.33V (76%) point is where the OC voltage settled to; which ensures that the SC algorithm
would not incorrectly close switch A had the OC voltage fallen below the 2.91V (45%) threshold.
APPENDIX A – Battery Charge/Discharge Waveforms
BATTERY: S-69
Charge @ 8A to 3.65V (100%), Discharge @ 5A to 2.57V (20%)
3.65V (100%)
3.65V (100%)
3.33V (76%)
3.04V (55%)
2.91V (45%)
2.94V (47%)
2.57V (20%)
2.57V (20%)
Figure A1 – 8A Charge OC Voltage and 5A Discharge OC Voltage Test
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Switch Controller Algorithm
BATTERY: S-69
Charged Battery to 3.65V (100%), Voltage settled to 3.31V (74.8%),
Discharge @ 10A to 2.57V (20%)
3.31V (74.8%) – Initial Voltage
2.94V (47%)
3.04V (55%)
3.05V (56%)
2.57V (20%)
Figure A2 – 10A Discharge OC Voltage Test
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Switch Controller Algorithm
BATTERY: S-70
Charge @ 8A to 3.65V (100%), Discharge @ 10A to 2.57V (20%),
@ 3.04V (55%) Discharge @ 10A to 2.57V (20%),
@ 3.04V (55%) Discharge @ 10A to 2.57V (20%)
3.65V (100%)
3.65V (100%)
2.90V (44%)
3.29V (73%)
3.04V (55%)
3.04V (55%)
3.04V (55%)
2.57V (20%)
Figure A3 -10A Discharge OC Voltage Test
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Switch Controller Algorithm
BATTERY: S-69
Charge @ 8A to 3.65V (100%), Discharge @ 10A to 1.99V (<0%)
3.65V (100%)
3.65V (100%)
3.04V (55%)
2.97V (50%)
2.73V (32%)
1.99V (<0%)
2.57V (20%)
Figure A4 – 10A Overdischarge Test 1
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Switch Controller Algorithm
BATTERY: S-69
Charge @ 8A to 3.65V (100%), Discharge @ 10A to 2.22V (<0%)
3.65V (100%)
3.65V (100%)
3.04V (55%)
2.94V (47%)
2.88V (43%)
2.22V (<0%)
2.57V (20%)
2.57V (20%)
Figure A5 – 10A Overdischarge Test 2
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Switch Controller Algorithm
APPENDIX B – References
[1]
DenHerder, Tyson. Design and Simulation of Photovoltaic Super System Using Simulink.
Senior Project, California Polytechnic State University, San Luis Obispo, 2006.