T1.1 Nanoscale characterization of the time-dependent variability in CMOS devices
Global Objective 1; Subobjective 1.1
Description
Most of the aging mechanisms in MOSFETs are related to the properties of its gate dielectric. Therefore, in this task,
the morphological and electrical properties of the gate dielectric will be studied at the nanoscale. The goal is to
evaluate the process related variability (i.e., variability sources) and the aging, at the same scale where they happen.
This analysis will be performed with nanoscale resolution characterization techniques, such as Atomic Force
Microscope (AFM), Conductive AFM (CAFM) and Kelvin Probe Force Microscope (KPFM), all available at the UAB.
These techniques allow obtaining topographical, current and surface potential maps of the material under study with
a resolution of about ~100nm2. This resolution can be reached because an extremely sharp conductive tip placed on
top of a (bare) dielectric/substrate structure plays the role of the metal gate of a MOS device. Therefore, specially
designed (by the UAB group) and fabricated structures (at the IMB-CNM clean room) or purposely prepared MIS
and/or MOSFETs (provided by the UAB partners, but that require specific deprocessing steps for AFM analysis) will
be studied. Because of the experimental difficulties related to the sample preparation, planar devices will be only
considered in this task. SiO2 and Hf based dielectrics will be mainly studied. To obtain complementary information on
the materials properties, other physical characterization techniques could be needed, available at the ScientificTechnical Services (at UAB, UB or IMB-CNM), under a pay per use basis. In particular, the addressed issues will be:
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Nanoscale inhomogeneities of the topographical and electrical properties of as-grown gate stacks (time-zero
variability sources). Effects of processing, such as thermal annealings, and materials properties, such as oxide
thickness, defects densities, etc, will also be studied.
Statistical analysis of the variability sources at the nanoscale.
Analysis of aging mechanisms such as BTI, CHC and TDDB. Special emphasis on CHC (inhomogeneous aging
mechanism) will be done due to the novelty of this kind of study. Effects of geometry and processing on the aging
mechanisms. Dependences on V, T, t and x.
Since the materials in the CMOS devices and/or the fabrication processes of the gate dielectric are expected to
change and/or evolve during the project execution period, the proposed characterization methodology will be
repeatedly applied to devices fabricated using different technological options, so that the task will run all along the
project duration.
Schedule:
M1-M36
People involved: UAB:
Nafria, Porti, Velayudhan, Crespo
Deliverables:
T111 Statistical information on the electrical properties of as-grown bulk devices at the nanoscale. Input to T1.4.
(M6)
T112 Statistical information on the spatial distribution and dependence on operation conditions (V, T) of the BTI,
CHC aging and TDDB of bulk devices at the nanoscale. (Input to T1.2 and T1.4. (M12).
T113 Nanoscale electrical properties of advanced CMOS devices with other gate dielectrics, channel materials (III-V,
SiGe, Ge…)… (M36)