Lecture 2: Signed Numbers Representation and Arithmetic We have already noted how in a digital system we can only use 1’s and 0’s to represent information. For the full implementation of arithmetic functions, we need to be able to represent both positive and negative numbers and to do so in a way that allows us to maintain the normal methods of basic arithmetic. Learning Outcomes: On completion of this lecture, you will be able to define and apply the 2’s complement representation format; to demonstrate the addition and subtraction of positive and negative numbers; to specify when an overflow occurs; to calculate the arithmetic value directly from the 2’s complement representation. 2.1 Background Context Digital machines are built to handle binary data of some specific maximum wordlength which we will denote by N. That is, we can assume N-bit words: X x N 1 x N 2 x1 x0 For the purposes of numerical examples we will mostly restrict ourselves to the case of N 4 , but bear in mind that today’s microprocessors typically have N 64 . One of the important consequences of having finite bit capacity is that when you add two relatively large numbers, the true sum can fall outside the available bit capacity; an overflow is generated and you end up with an “incorrect” sum. Consider for example what happens when adding 9 to 12 with 4-bit capacity: 1 1 0 0 1 0 0 1 (12) (9) (1) 0 1 0 1 (5) With the restriction of N 4 , we lose the most significant carry out which has a weight of 16. Thus rather than getting a result of 21, we get 5. Such finite precision arithmetic is formally termed addition modulo 2N and is denoted (12 9) Mod 16 5 A familiar example of modulo addition is the minutes count on a clock: 45 min 30 min 15 min 2.2 Sign and Magnitude Recall that our basic goal is to represent both positive and negative integers using just 1’s and 0’s. The most simple method, for N-bit capacity, is to use the most significant bit (msb), xN-1, to designate the sign and the remaining (N-1) bits to designate the magnitude: x 1 x N 2 x1 x0 N sign and the usual convention is magnitude x N 1 0 X positive x N 1 1 X negative Examples 2.1: 6 0 11 0 5 11 0 1 While the Sign and magnitude format is intrinsically simple, it leads to significant complications if the normal rules of arithmetic are applied: Examples 2.2: add (3) (2) 0 0 11 0 010 is correct, but 0 1 0 1 (5) add (3) (2) 0 0 11 1010 is incorrect. 1 1 0 1 (5) Because of the problems arising with addition and subtraction, the sign and magnitude system is not generally used where arithmetic functions are required; it may, however, be used for data storage. 2.3 Signed 2’s Complement This widely used convention is defined as follows: Let X denote an N-bit number whose most significant bit (msb) is zero, ie then X 0 x N 2 x1 x0 X 2C Example 2.3: X and let X 5 0 1 0 1 , X 2C 2N X with as usual N 4 52C 0101 52C 24 X 1 0 0 0 0 52C ie 01 01 1 0 11 1 01 1 Clearly this 2’s complement operation, as it is called, is relatively complex and, with 2 4 10 0 0 0 , the subtraction step strictly speaking does not fit within our N 4 constraint. However, let X 0 xN 2 x1 x0 where by definition the bit level invert or complement operation is defined by 0 1 1 0 and By construction, for any bit pattern X X X 1 1 1 1 2N 1 Rearrange to give X 2C 2N X X 1 That is, an algorithm for carrying out the 2’s complement operation is (i) invert all the bits, and (ii) add a 1 in the least significant bit (lsb) position. Example 2.4: then if 52C 52C 1010 0101 1 which is the same answer as previous. 1 0 11 Note: (i) Similar to the sign and magnitude system, in signed 2’s complement the msb denotes the polarity of the number: x N 1 0 X positive; (ii) x N 1 1 X negative If 2C[ ] denotes the 2’s complement operation, then 2C X 2C X 2C ie 2’s complementing a negative number yields the corresponding positive number. For example, 52C 1 0 1 1 noting that 2C 1 0 1 1 0 1 0 0 1 0 1 0 1 (5) 2C (iii) Strictly speaking, the addition of the 1 in the lsb position should be carried out modulo 2N; consider performing the 2’s complement operation on zero: 2C 0 0 0 0 1 1 1 1 1 0000 In an appendix to this lecture, a table of all possible 4-bit 2’s complement numbers is given. Note that the range of numbers is not symmetric; the eight positive numbers extend from 0 to +7 while the eight negative numbers range from -8 to -1. 2.4 Addition and Subtraction We demonstrate the addition and subtraction of numbers in signed 2’s complement format by means of examples covering all combinations of positive and negative. The basic idea is that the normal arithmetic rules apply with the exception that the addition is modulo 2N, ie the most significant carry out is ignored: 010 0 0 0 11 (4) (3) 010 0 11 0 1 ( 4) ( 3) 0 111 (7) 0 0 01 ( 1) 11 0 0 0 0 11 (4) (3) 11 0 0 11 0 1 (4) (3) 1111 (1) 10 01 (7) Note that in all four cases the result comes out correct in signed 2’s complement format. Based on the algebraic rule that ( X ) (Y ) ( X ) (Y ) , we propose to carry out subtraction by adding the 2’s complement of the subtrahend (Y) to the minuend (X) with, again, the addition being modulo 2N: 010 0 0 0 11 (4) (3) 010 0 11 0 0 1 0 0 0 1 (1) 2C 010 0 11 0 1 (4) (3) 010 0 0 010 1 0 1 1 1 (7) 2C 11 0 0 0 0 11 (4) (3) 11 0 0 11 0 0 1 1 0 0 1 (7) 2C 11 0 0 11 0 1 (4) (3) 11 0 0 0 010 1 1 1 1 1 (1) 2C Again each time the result comes out correct in signed 2’s complement format. 2.5 Overflow All of the previous results were carefully chosen to the extent that the numbers all fell within the valid range for 2’s complement representation with N 4 . What happens if the arithmetic result exceeds the valid range? An incorrect result is produced and the arithmetic system should have the capability of flagging an overflow. Consider the following two cases: (6) (7) 0 11 0 0 111 1 1 0 1 (13) 2C (6) (7) 1010 10 01 0 0 1 1 (13) 2C We observe that overflow conditions are produced when the sign bits of the operands are the same and differ from the sign bit of the result. Later we will see how to incorporate this into the hardware of an arithmetic processing unit. 2.6 Arithmetic Value In the first lecture we saw that, given an unsigned binary integer A a N 1 a N 2 a1 a0 r N 1 we could calculate its arithmetic value from a i 0 i ri The question now is: can we do something similar for signed 2’s complement representation? It may be shown that, given a 2’s complement number X x N 1 x N 2 x1 x0 , its arithmetic value may be directly computed from X x N 1 2 N 1 N 2 x i 0 i 2i Examples 2.5: 0 1 0 1 0 2 3 1 2 2 0 21 1 2 0 0 4 0 1 5 1 0 1 1 1 2 3 0 2 2 1 21 1 2 0 8 0 2 1 5 Both results are correct. 2.7 Conclusion At this stage, we have some familiarity with decimal and binary representations, with how to conveniently represent positive and negative numbers in a digital machine, and with how to carry out basic arithmetic operations. Having set some relevant application context, we now proceed to the mathematical framework specific to digital systems. Appendix: Table of 4-bit 2’s complement numbers Decimal value +7 +6 +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -6 -7 -8 X3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 X1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 X0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0