™
2012
International Conference on
Compound Semiconductor
Manufacturing Technology
April 23rd - 26th, 2012
Register Online at
www.CSMANTECH.org
The Boston Park Plaza Hotel
Boston, Massachusetts, USA
CONFERENCE AT A GLANCE
SUNDAY, April 22nd
5:00 PM – 8:00 PM
MONDAY, April 23rd
7:00 AM – 7.00 PM
7:00 AM – 8:30 AM
8:50 AM – 4:30 PM
8:15 AM – 4:45 PM
12:00 PM –1:00 PM
6:00 PM – 9:00 PM
TUESDAY, April 24th
7:00 AM – 5:00 PM
7:00 AM – 8:30 AM
8:00 AM – 8:30 AM
8:30 AM – 10:00 AM
10:00 AM – 5:30 PM
10:00 AM–10:30 AM
10:30 AM–11:50 PM
REGISTRATION
Dartmouth/Exeter Foyer
BREAKFAST FOR
WORKSHOPS
Imperial Foyer
CS MANTECH WORKSHOPS
Georgian
ROCS WORKSHOP
Arlington/Berkeley/Clarendon
LUNCHEON FOR
WORKSHOPS
Statler
EXHIBITS RECEPTION
Imperial Ballroom
REGISTRATION
Dartmouth/Exeter Foyer
Continental Breakfast
Imperial Ballroom
OPENING CEREMONIES
Georgian/A/B/C
SESSION 1: Plenary I
Georgian/A/B/C
EXHIBITS OPEN
Imperial Ballroom
BREAK
Imperial Ballroom
SESSION 2: Plenary II
Georgian/A/B/C
11:50PM – 1:10 PM
EXHIBITS LUNCH
Imperial Ballroom
1:10 PM – 2:40 PM
SESSION 3: Technology
Georgian/A/B/C
BREAK
Imperial Ballroom
SESSION 4: Quality & Yield
Georgian/A/B/C
BREAK
Imperial Ballroom
EXHIBITORS’ FORUMS
Georgian
STUDENT FORUM
Statler
INTERNATIONAL RECEPTION
Boston Museum of Science
2:40 PM – 3:10 PM
3:10 PM – 4:40 PM
4:40 PM – 5:00 PM
5:00 PM – 6:30 PM
5:00 PM – 6:30 PM
7:00 PM –11:00 PM
2
REGISTRATION
Dartmouth/Exeter Foyer
2012 Compound Semiconductor MANTECH
WEDNESDAY, April 25th
7:00 AM – 5:00 PM
REGISTRATION
Dartmouth/Exeter Foyer
7:00 AM – 8:30 AM
Continental Breakfast
Imperial Ballroom
7:00 AM – 10:30 AM
EXHIBITS OPEN
Imperial Ballroom
8:30 AM – 10:00 AM
SESSION 5a: Operations
Georgian
8:20 AM – 10:00 AM
SESSION 5b: GaN Reliability
Arlington/Berkeley/Clarendon
10:00 AM – 10:40 AM
BREAK
Imperial Ballroom
10:40 AM – 12:10 PM
SESSION 6a: Manufacturing
Georgian
10:50 AM – 12:10 AM
SESSION 6b: HBT
Arlington/Berkeley/Clarendon
12:10 PM – 1:40 PM
LUNCH BREAK
1:40 PM – 3:20 PM
SESSION 7a: Novel Devices
Georgian
SESSION 7b: Packaging
Arlington/Berkeley/Clarendon
BREAK
Imperial Foyer
SESSION 8a: Processing Gate Processing
Georgian
SESSION 8b: GaN/SiC
Processing
Arlington/Berkeley/Clarendon
RUMP SESSION RECEPTION
Brandeis
RUMP SESSIONS A-D
Alcott, Beacon Hill,
Cabot, Cambridge
SEMI Standards Meeting
Beacon Hill
1:40 PM – 2:50 PM
3:20 PM – 3:40 PM
3:40 PM – 5:40 PM
3:40 PM – 5:40 PM
5:40 PM – 6:10 PM
6:10 PM – 7:10 PM
7:10 PM – 9:10 PM
THURSDAY, April 26th
7:00 AM – 9:30 AM
7:00 AM – 8:30 AM
8:00 AM – 9:50 AM
8:10 AM – 9:50 AM
9:50 AM –10:10 AM
3
REGISTRATION
Dartmouth/Exeter Foyer
Continental Breakfast
Imperial Foyer
SESSION 9a: Power Devices I
Georgian
SESSION 9b: GaAs
Processing
Arlington/Berkeley/Clarendon
BREAK
Imperial Foyer
2012 Compound Semiconductor MANTECH
THURSDAY, April 26th
10:10 AM –11:50 AM
10:10 AM –11:50 AM
SESSION 10a:
Power Devices II
Georgian
SESSION 10b:
Epi Characterization &
Optimization
Arlington/Berkeley/Clarendon
11:50 PM – 1:20 PM
CS MANTECH Luncheon
Statler
1:20 PM – 3:00 PM
SESSION 11a: GaN Devices
Georgian
SESSION 11b: Backside
Processing/Yield
Improvement
Arlington/Berkeley/Clarendon
INTERACTIVE FORUM
Imperial Ballroom
CLOSING RECEPTION
Imperial Ballroom
1:20 PM – 3:00 PM
3:00 PM – 4:30 PM
4:30 PM – 5:00 PM
MESSAGE FROM THE CONFERENCE
CHAIR:
On behalf of the conference Technical Program
Committee and Executive Committee, I invite you to
attend the 27th International Conference on Compound
Semiconductor
Manufacturing
Technology
(CS
MANTECH 2012). This year we gather at the Boston
Park Plaza Hotel from April 23rd to 26th. Located in the
heart of historic Back Bay, the Boston Park Plaza Hotel is
one of Boston's most recognized and renowned
landmarks. Close to Logan International Airport, the
hotel provides easy access to shopping along Newbury
Street, to Faneuil Hall Marketplace and to the Theatre and
Financial Districts, as well as to many of Boston’s
historic landmarks.
This year, in spite of the worldwide economic
challenges, innovation in the field of compound
semiconductors continues. While GaAs remains the key
enabling technology at the forefront of wireless markets,
exciting new developments in the compound
semiconductor world show enormous prospects. These
include new applications such as solar cells, new
materials such as GaN and SiC, and novel methods of
combining compound semiconductor devices with
conventional Si technology via heterogeneous integration.
The CS MANTECH Conference is the event to attend to
learn about what is important and new in the compound
semiconductor community. In addition to technical
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2012 Compound Semiconductor MANTECH
papers from top companies, research institutes, and
universities in the compound semiconductor world, this
year we will also have a unique opportunity to listen to
the CEOs of Skyworks, IQE, and Kopin give us their
perspective on the status of the compound semiconductor
industry. Our annual broad array of educational
opportunities will be invaluable at our Monday
Workshops. As has been the case for the last two years,
the Reliability of Compound Semiconductors (ROCS)
Workshop will run in parallel on Monday, providing still
greater opportunities for learning.
The CS MANTECH mission is to foster
communication between participants from academia,
industry, and government. Our popular and extensive
Exhibits and Exhibitor Forum will feature suppliers of all
our critical materials, wafers, fab tools, and foundry and
analytical services. Students can also interact with
potential employers. Industry veterans can keep contact
with old friends, meet new ones, and take the pulse of the
industry. The technical sessions will offer the current
state of the art in materials, processing, reliability, and
device technology across the compound semiconductor
spectrum. And, of course CS MANTECH’s famous social
events will provide relaxed venues for the exchange of
ideas.
This is the annual event where our industry comes
together. Come join us!
Mariam Sadaka
Soitec USA
Chair, 2012 CS MANTECH Conference
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2012 Compound Semiconductor MANTECH
2012 CONFERENCE SPONSORS
(Partial list as of January 25, 2012)
MANTECH is an independent not-for-profit
organization whose mission is to promote technical
discussion and scientific education in the compound
semiconductor manufacturing industry. The continued
success of the conference is enabled by donations from
corporate sponsors. The 2012 CS MANTECH
Conference Committee gratefully acknowledges the
support from our sponsors.
Platinum Sponsors:
AIXTRON
Plasma-Therm LLC
RF Micro Devices
Skyworks Solutions, Inc.
Gold Sponsors:
AXT
Booz Allen Hamilton
WIN Foundry
Silver Sponsors:
Cree, Inc.
Northrop Grumman ES
OEM Group
2011 CONFERENCE SPONSORS
We would again like to thank our 2011 sponsors!
Platinum Sponsors:
AIXTRON
Freiberger
MAX-IEG
RFMD
Sumitomo
WIN Foundry
Cree, Inc.
Hitachi Cable
Plasma-Therm LLC
Skyworks Solutions, Inc.
TriQuint
Gold Sponsors:
AXT
CSBD,
Sony Electronics, Inc.
Booz Allen Hamilton
OEM Group
SPP Process
Technology Systems
Silver Sponsors:
Brewer Science
Northrop Grumman
6
Kopin
VEM
2012 Compound Semiconductor MANTECH
2012 CONFERENCE HIGHLIGHTS
The 2012 CS MANTECH program begins on Monday
April 23rd with a series of tutorial workshops. This year’s
workshops will focus on a variety of Green Energy topics
and how the developments of advanced semiconductor
devices are vital to their success. This year’s workshop on
“Compound Semiconductors for Green Energy” will
include overviews on an envisioned energy internet,
advances in solar cells, nanoscale thermoelectric
materials, LEDs and GaN for efficient power conversion.
In addition, this year CS MANTECH will host the
internationally-acclaimed
ROCS
(Reliability
of
Compound Semiconductors) Workshop which will be
held on the opening day (Monday 4/23). The ROCS
Workshop will present the latest results and new
developments in all phases of Compound Semiconductor
Reliability (see http://www.jedec.org/home/gaas/ for
details).
On Monday evening the Exhibits open at 6:00 pm with
the traditional Exhibits Reception. The CS MANTECH
exhibits are an excellent opportunity to view suppliers of
materials, services and tools from around the globe. This
is a great time to renew old relationships and establish
new ones all while enjoying a taste of Boston’s great food
and drinks.
The CS MANTECH Conference formally opens on
Tuesday morning with a brief overview of the conference
and the awards presentation for the best papers from the
2011 conference. This is immediately followed by the
two Plenary Sessions which will cover overviews on our
CS Industry from prominent CEOs and companies within
the United States, Japan, and Europe.
For lunch we welcome all our guests to the Exhibits
Hall. Afterwards, we’ll reconvene to hear about the latest
technology advances, followed by a session devoted to
improving CS yields and quality.
The Tuesday technical session will conclude with both
the Exhibitors’ Forum and Student Forum. In the evening
we will be entertained at the Boston Museum of Science,
where we’ll eat, drink, and enjoy the wonderful
surroundings (and fun exhibits) that the museum has to
offer.
The sessions on Wednesday morning will have a
delayed start to provide an additional opportunity for our
attendees to interact with the Exhibitors. At 8:30 am we
start off our parallel sessions with world class technical
papers on the compound semiconductor industry. One
side of Wednesday’s two parallel sessions focuses on
manufacturing and operations, and the other on device
technologies and performances. Lunch will be open to
explore Boston or to get a quick rest before the afternoon
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2012 Compound Semiconductor MANTECH
sessions, which are filled with more topics on novel
devices and advanced processing techniques.
Wednesday evening features the popular Rump
Sessions. Eat, drink, and debate! Attendees may join any
or all (if you move quickly) of the four parallel topics,
where moderators will encourage informal, lively, and
highly interactive discussions.
Thursday morning continues with excellent technical
papers on Power Devices and GaAs Processing. The
morning parallel sessions continue with more state-of-the
art papers on Power Devices and Epilayer Optimization.
Following this session lunch will be sponsored by CS
MANTECH. Thursday afternoon will include our closing
two sessions on Backside Processing and GaN devices
followed by the Interactive Forum poster session. This
poster session includes new papers on a diverse range of
topics, as well as poster versions of all the papers
presented earlier in the technical program. Attendees will
have the opportunity to meet with authors to discuss their
papers in detail. Attendees of the Interactive Forum will
vote for the best poster, and the winning author will
receive the Best Poster Award.
The Conference Closing Reception will follow the
Interactive Forum. In a warped and hopefully humorous
manner we will be holding a Limerick Contest with CS
MANTECH as the theme for the writings. In English, a
limerick is a stanza of 5 lines, with the first, second and
fifth usually rhyming with each other; and the shorter
third and fourth lines also rhyming with each other. Limit
of one submission per person, please. Our closing
reception will also feature a drawing for a Kindle Fire.
All those who complete and submit their Feedback Forms
will have a chance to win!
CS MANTECH WORKSHOP
Traditionally CS MANTECH offers Monday
workshops featuring topics of interest to the compound
semiconductor community. Workshop attendees get the
opportunity to expand their knowledge beyond their own
specialties, as experts share their knowledge and valuable
experiences in a tutorial manner. This year’s workshop
theme is “Compound Semiconductors for Green Energy.”
CS MANTECH is pleased to offer a series of talks on
ways in which compound semiconductors efficiently
create, manage, consume and recapture energy.
Specifically, the workshop sessions will explore solar
power, thermoelectric materials and device technology,
smart power management, light emitting diodes, and
power conversion. The planned tutorials will deliver a
good overview for those new to the topic, but will also
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2012 Compound Semiconductor MANTECH
provide sufficient breadth of detail that those in the field
will learn something new as well.
Dr. Sarah Kurtz of NREL will lead off the workshop
speaking on the role of compound semiconductors in a
solar-powered world. The photovoltaic (PV) industry has
been growing dramatically in recent years, achieving
silicon usage that now dwarfs the microelectronics
industry and achieving costs that make PV competitive
with new coal plants in some areas. Although silicon
retains 80%-90% of the total market volume, there is
huge interest in thin-film and concentrator PV
approaches. These have the potential to reduce cost and
be more easily ramped to high production volumes, but
are challenged to enter a market in which silicon can
achieve low costs. GaAs solar cells and multijunction
solar cells based on GaAs have demonstrated the highest
efficiencies of any technology, but come with higher cost.
This presentation will provide an overview of PV
technology and the opportunities for III-V approaches.
Dr. Kurtz obtained her Ph.D. from Harvard University
and has worked since then at the National Renewable
Energy Laboratory (NREL), in Golden, CO. She is best
known for her contributions to developing multi-junction
GaInP/GaAs solar cells and for supporting the
concentrator photovoltaic industry.
Our second speaker, Dr. Rama Venkatasubramanian of
RTI International, will talk on recent developments in
nanoscale thermoelectric materials and device
technology. Thermoelectric semiconductor materials and
devices can enable a wide array of applications from solid
state cooling of electronics and compact air-conditioning
systems, to waste-heat harvesting in many scenarios such
as automotive exhaust and industrial plants. The two
major difficulties limiting the widespread use of
thermoelectric technology have been achieving a
sufficiently high materials figure of merit (ZT) and
converting enhanced materials’ ZT into superior device
performance by overcoming various device electrical and
thermal losses. Almost all of the recent successful efforts
in ZT improvement – in a marked departure from the
state-of-the-art of the 1950’s until 2000 – have been a
result of the significant reduction in lattice thermal
conductivity through phonon scattering in nanostructures
by so-called phonon-blocking electron-transmitting
structures without affecting the electrical transport of
electrons or holes. Dr. Venkatasubramian will describe
RTI’s progress in materials ZT along with other efforts
from labs in the US and around the world. He will discuss
device development with advanced nanoscale superlattice
thermoelectric materials for hotspot cooling of high
performance electronics (Nature Nanotechnology 4, 235
(2009)) and energy harvesting for various applications.
Dr. Venkatasubramanian is currently the Senior Research
9
2012 Compound Semiconductor MANTECH
Director of the Center for Solid State Energetics at RTI
International. He is also the Founder of Nextreme
Thermal Solutions, which is commercializing thin-film
thermoelectric technology.
After the lunch break, Professor Alex Huang of NCSU
will provide an overview of the research conducted at the
NSF-funded Future Electric Energy Delivery and
Management (FREEDM) Systems Center. The FREEDM
System is a novel architecture suitable for plug-and-play
of distributed renewable energy and distributed energy
storage devices. Motivated by the success of the
Information Internet, the architecture was put forward by
the NSF FREEDM Systems Center as a possible roadmap
for an automated and flexible electric power distribution
system. In the Information Internet, people share
information in a plug-and-play manner. In the envisioned
“Energy Internet”, a vision for sharing energy is proposed
for ordinary citizens and homeowners. Key technologies
required to achieve such a vision will be discussed.
Among many of the key technologies, the development of
advanced power semiconductor devices and power
electronics systems will be discussed and highlighted. Dr.
Huang is professor of electrical engineering at North
Carolina State University and director of NCSU’s
Semiconductor Power Electronics Center (SPEC). He is
now the Progress Energy Distinguished Professor and the
director of the new NSF FREEDM Systems Center. He is
also the director of NCSU’s Advanced Transportation
Energy Center (ATEC). Dr. Huang’s research areas are
power management, emerging applications of power
electronics and power semiconductor devices.
Professor E. Fred Schubert of RPI, our fourth speaker,
will give a tutorial presenting the history, operating
principles, and use of light-emitting diodes (LEDs) in
lighting applications. He will discuss the unique strengths
of LEDs, including the controllability of the emission
spectrum, color temperature, and far-field emission
pattern. Additionally, he will explore the unique
challenges of LEDs, including the efficiency droop,
which has been strongly debated by the technical
community during recent years. Finally, he will explain
the origin of the efficiency droop and describe ways to
overcome the droop. Professor Schubert has made
pioneering contributions to the field of compound
semiconductor materials and devices, particularly to the
doping of compound semiconductors and to the
development and understanding of LEDs. He is currently
on the faculty of Rensselaer Polytechnic Institute in Troy,
NY.
Dr. Alexander Lidow, CEO of EPC Corporation, will
conclude our workshop by speaking on gallium nitride
transistors for efficient power conversion. He will
describe
progress
in
the
development
and
10
2012 Compound Semiconductor MANTECH
commercialization of GaN transistors for use in DC-DC
applications. He will explain how the technology works,
show the relative competitive position vis-à-vis the power
MOSFET and SiC to support why GaN FETs will
displace silicon power MOSFETs in the majority of
power management functions. Additionally, he will
discuss surprising new applications enabled by the
technology, show specific circuit topologies with
quantified efficiency improvements, and reveal the latest
products on the market. Dr. Lidow holds many patents in
power semiconductor technology. He has authored and
co-authored numerous publications on related subjects
including a recent book titled, “Gallium Nitride
Transistors for Efficient Power Conversion”. He is also
co-inventor of the HEXFET power MOSFET.
Please visit our website, www.csmantech.org, for the
extended abstracts and biographies of all the workshop
speakers.
2012 ROCS WORKSHOP
Reliability of Compound Semiconductors
Monday, April 23rd, 2012
Boston Park Plaza Hotel
Room: Arlington/Berkeley/Clarendon
8:00 a.m. - 5:00 p.m.
The 27th annual ROCS Workshop - formerly known as
the GaAs Rel Workshop - will be held in conjunction with
the
International
Compound
Semiconductor
MANufacturing TECHnology (MANTECH) Conference
on Monday April 23rd, 2012, at the Boston Park Plaza
Hotel, in Boston, MA. This meeting is sponsored by the
JEDEC JC-14.7 Committee on GaAs Reliability and
Quality Standards and the EIA.
The ROCS Workshop brings together researchers,
manufacturers and users of compound semiconductor
materials, devices and circuits. Papers presenting latest
results, including work-in-progress and new developments
in all aspects of compound semiconductor reliability will
be presented. Potential authors are invited to submit an
electronic copy of a one to two page comprehensive
summary, suitable for a 15 minute presentation, to: Peter
Ersland, Peter.Ersland@macomtech.com, (978)-656-2817.
The deadline for receipt of submissions is February 13 th,
2012; late papers of significant interest may be considered
up to the date of the Workshop. The Advance Program will
be
published
at
http://www.jedec.org/home/gaas/
approximately one month prior to the meeting.
Advance registration for the workshop is $175 for
JEDEC members and $200 for non-members; on-site
registration is $225. To pre-register, mail your name,
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2012 Compound Semiconductor MANTECH
address, email address, and phone number with a check by
Monday, April 9th, 2012 to: JEDEC, ROCS Workshop,
3103 North 10th Street, Suite 240-S, Arlington, VA 22201
USA. Visa, MasterCard and American Express credit cards
are also accepted. Registration includes a full day of ROCS
presentations, two breaks, a luncheon and a copy of the
Proceedings. Late registration will be available starting at
7:30 a.m. on the morning of the workshop. For further
information or to download a pre-registration form, visit
our web site at http://www.jedec.org/home/gaas/, or
contact: Peter Ersland, Workshop Technical Program
Chair, M/A-COM Technology Solutions, 100 Chelmsford
Street, Lowell, MA
01851, (978) 656-2817,
Peter.Ersland@macomtech.com.
INTERNATIONAL RECEPTION
The 2012 CS MANTECH Reception will be held in the
Blue Wing of the Museum of Science. Truly one of the
region's most unique settings, the Museum offers novel
surroundings and out-of-the-ordinary experiences that
promise to intrigue and entertain. The Blue Wing encloses
three levels of galleries wrapped around a towering central
atrium. A 45-foot-long T-Rex lurks in one corner; optical
illusions adorn a wall and an Apollo module floats
overhead. The Blue Wing is home to the world's largest
Van de Graaff generator, so the Theater of Electricity is a
must-see at the Museum of Science. During this highvoltage presentation, guests will be treated to a private
indoor lightning storm and learn about the connections
between electric and magnetic forces. Dinner and drinks
will be served at various places in the museum. The
Museum is a short T ride away from the hotel (about 20
mins). MANTECH extends an invitation to family and
friends that may be accompanying you at the Conference
to join us at this special event Tuesday night. Guest tickets
are $50 each. We strongly encourage you to purchase guest
tickets at the time of your registration to ensure space at
the reception.
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2012 Compound Semiconductor MANTECH
INDUSTRY EXHIBITS
The CS MANTECH Exhibits present the premier
opportunity for participating companies to showcase their
products and services to the CS community.
Exhibiting companies will gain excellent visibility to a
wide range of CS focused participants from around the
globe and be able to ensure their prominence and market
positioning within the CS field.
The Exhibits will kick off on Monday evening with the
Exhibits Reception. Food and drinks will be available and
this will provide a great opportunity to catch up with
friends, colleagues, suppliers, even competitors on the first
full evening of the conference. It represents an excellent
networking opportunity and a window to meet and greet
the assembling conference attendees.
The Exhibits will open on Tuesday morning with a
continental breakfast in the Exhibits Hall at 7.00 am. The
extended coffee breaks and buffet style lunch on Tuesday
will also both be served in the Exhibits Hall.
The popular Exhibitors’ Forums will return and are
scheduled for Tuesday afternoon. These allow participating
companies to introduce or highlight new products in a
short presentation.
The Exhibits will open again on Wednesday morning
with a continental breakfast at 7.00 am. The Wednesday
morning session provides an ideal opportunity for both
conference attendees and participating Exhibitors to follow
up on interest generated earlier, both in the technical
conference and at the Exhibitor Forums.
To reserve Exhibit space please, visit our web site at
www.csmantech.org, and click on the Exhibitors link.
Further details, including the sign-up sheet, link to the
Exhibitors kit and sign up for the Exhibitors Forum, can
also be found on the Web Site. Please note Forum Slots are
on a first-come-first-served basis, and the number of slots
are limited!
For any questions related to Exhibiting at CS
MANTECH, please contact the 2012 Exhibits Chair, Alex
Smith, (541) 678-5704 email: exhibitor@gaasmantech.org
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2012 Compound Semiconductor MANTECH
2012 EXHIBITORS LIST
(Partial list as of January 25, 2012)
AIXTRON SE
AXT, INC
Brewer Science, Inc.
Bridgestone
centrotherm thermal solutions GmbH & Co. KG
Compound Semiconductor
Cree, Inc.
CS Clean Systems, Inc.
Dow Electronic Materials
EpiWorks, Inc.
Evans Analytical Group
EVATEC
Ferrotec USA Corporation
Freiberger Compound Materials
Hitachi Cable, Ltd
IQE
INNOViON
Insaco, Inc
Intelligent Epitaxy Technology Inc.
Kopin Corporation
KITEC Microelectronic Technologie GmbH
Lehighton Electronics, Inc.
Materion Corporation
Mersen Midland, Inc.
MicroChem
Momentive Performance Materials
Nanotronics Imaging
Oxford Instruments
Plasma-Therm
Proton OnSite
PVA TePla America Inc.
SAMCO Inc.
Semiconductor Today
Shin-Etsu MicroSi
Soitec
SPTS Technologies
Sumika Electronic Materials, Inc.
Veeco
Visual Photonics Expitaxy Co., Ltd.
Wafer World Inc.
WBG Materials, A Division of II-VI Incorporated
Yole Développment
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2012 Compound Semiconductor MANTECH
Special Thanks to our 2011 Exhibitors!
Accel-RF
Aixtron
AWR Corporation
AXT, Inc.
Brewer Science
centrotherm thermal solutions GmbH & Co. KG
Compound Semiconductor
Compugraphics Photomask Solutions
Core Systems
CS CLEAN SYSTEMS, INC.
Doe Ingalls
ENTEGRIS, INC.
EpiWorks
Evans Analytical Group
EVATEC
Ferrotec USA Corporation
Freiberger USA
GTI Technologies
Hitachi Cable Ltd.
II-VI Incorporated
INNOViON Corporation
Insaco, Inc.
Intelligent Epitaxy Technology Inc.
IQE plc
KITEC microelectronic technologie GmbH
KLA-Tencor
Kopin
Lehighton Electronics, Inc.
Leybold Optics
MAX I.E.G.
MicroChem Corp.
Momentive Performance Materials
Nanometrics
Nanotronics Imaging
Oxford Instruments
Plasma-Therm LLC
Reedholm Instruments
SAES Pure Gas
SAMCO Inc.
Semiconductor Today
Soitec Group
Solid State Equipment Corp.
SPP Process Technology Systems
SPS-Europe B.V.
Sumika Electronic Materials
Taiyo Nippon Sanso Corporation
Vacuum Engineering Materials Co., Inc.
Visual Photonics Epitaxy Co., Ltd
Wafer World Inc.
Williams Advanced Materials/Materion
Yole Développment
15
2012 Compound Semiconductor MANTECH
2011 BEST PAPER AWARDS
CS MANTECH tradition is to formally recognize the
authors of the best paper and best student paper of the
previous conference, as determined from the conference
attendee votes tallied from your feedback forms. These
awards will be presented during the conference
introductions on Tuesday, April 24th.
The conference Best Paper Award is named in honor of
Dr. He Bong Kim, the founder of the International
Conference on Compound Semiconductor MANufacturing
TECHnology. The He Bong Kim award winner for the
2011 Conference is:
Investigation and Reduction of Leakage Current
Associated with Dielectric Gate Encapsulation in
AlGaN/GaN HFETs. S. A. Chevtchenko, P. Kurpas, N.
Chaturvedi, R. Lossy and J. Würfl, Ferdinand-BraunInstitut
The Best Student Paper for the 2011 Conference, for
which the principal student author will receive a special
cash award of $1000, is:
Type-II DHBTs Microwave Characterization and
Metallization Issues. Kuang-Yu (Donald) Cheng and
Milton Feng, University of Illinois at Urbana-Champaign
The committee also wishes to award a Best Student –
Honorable Mention where the principal student author will
receive a special cash award of $500:
Impact Ionization in AlGaN/GaN HEMTs with InGaN
Back-barrier. Nicole Killat1, Milan Ťapajna1, Mustapha
Faqir1, Tomas Palacios2, and Martin Kuball1, 1University
of Bristol, 2MIT
Congratulations to these award winning teams for their
excellent presentation and technical contribution to our
field.
SEMI STANDARDS MEETING
The SEMI Standards meeting is scheduled for
Wednesday, April 25th, from 7:10 pm to 9:10 pm
(immediately following the Rump Sessions). The SEMI
Compound Semiconductor (GaAs, InP and SiC)
Committee invites CS MANTECH Conference attendees
interested in the development of internationally approved
standards for wafer specifications to attend this meeting.
Topics being addressed are GaAs, InP, and SiC
dimensions/orientations and electrical properties, epitaxial
layer specifications (which properties should be specified,
16
2012 Compound Semiconductor MANTECH
and how they are to be verified), and non-destructive test
methods.
Based in San Jose, CA, SEMI is an international trade
association serving more than 2,400 companies
participating in the semiconductor and flat panel display
equipment and materials markets. SEMI maintains offices
in Brussels, Moscow, Tokyo, Seoul, Hsinchu, Beijing,
Singapore, Austin, Boston and Washington, DC. For
additional information, please contact: James Oliver of
Northrop Grumman at 410-765-0117 or j.oliver@ngc.com,
Russ Kremer of Freiberger Compound Materials at 937291-2899 or russ@fcm-us.com, or SEMI Standards contact
Paul Trio at 408-943-6900 or ptrio@semi.org.
LIMERICK CONTEST
In keeping with the poetic tradition begun last year with
haikus, we are sponsoring a limerick contest at this year’s
MANTECH. A limerick is a 5 line poem, rhyme scheme
AABBA, with the “B” lines shorter, and A’s and B’s
having similar numbers of syllables, e.g.
Our conference this year is in Boston
A quite easy place to get lost in.
Take a map when you leave
The hotel if you please,
Lest you end up in Phoenix or Austin.
So get creative and post your MANTECH-related, clean
limerick at the interactive forum on Thursday! As reward
for participating, we will award a $100 Amazon gift card
for the best limerick and a $50 gift card for the runner up.
CONFERENCE CLOSING RECEPTION
The Conference Closing Reception will bring the 2012
edition of CS MANTECH to an end. It will immediately
follow the Interactive Forum. Drinks and snacks will be
provided to foster a congenial final opportunity to
exchange business cards, ideas, and experiences.
Returning this year is a Feedback Form Raffle. Your
opinion on the Feedback Form is very valuable to the CS
MANTECH committees in structuring the conference and
programs year-to-year and in choosing the best paper
awards. This year, when you turn in your Feedback Form
you enter a raffle for a Kindle Fire. It’s as simple as that!
The drawing will be held at the Conference Closing
Reception, though you need not be present to win. In
addition, votes will be tallied and the Best Poster
presentation and best Limerick award winners will be
announced.
17
2012 Compound Semiconductor MANTECH
2012 EXECUTIVE COMMITTEE
Conference Chair
Mariam Sadaka*, Soitec USA
Board of Directors Chair
Celicia Della-Morrow*, TriQuint Semiconductor
Secretary
Scott Davis*, Sumitomo Electric
Treasurer
Chris Santana*, RF Micro Devices
Technical Program Chair
Karen Renaldo, Northrop Grumman ES
Publication Chair
Scott Sheppard, Cree, Inc.
Local Arrangements Chair
Mike Barsky*, Northrop Grumman AS
Exhibits Chair
Alex Smith, Brewer Science
Workshop Chair
Kevin Stevens, Kopin Corp.
Publicity Chair
Russ Kremer, Freiberger Compound Materials USA
Sponsorship Chair
Ruediger Schreiner, Aixtron AG
University Liaison
Patrick Fay, University of Notre Dame
Local Arrangements Vice-Chair
Paul Cooke*, IQE RF plc
Web Chair
Mike Sun, Skyworks Solutions, Inc.
International Liaisons
Andreas Eisenbach, IQE plc
Chang-Hwang Hua, WIN Semiconductors Corp
Registration Chair
Drew Hanser, Veeco
Information Chair
Peter Ersland, M/A – Com Technology Solutions
Committee Members
Marty Brophy*, Avago Technologies
Thorsten Saeger, TriQuint Semiconductor
Andy Souzis, II-VI
Glen “David” Via, Air Force Research Laboratory
Executive Advisory Board
Steve Mahon*, Cascade Microtech
Scott Davis*, Sumitomo Electric
Yohei Otoki*, Hitachi Cable Ltd.
Chairman Emeritus
He Bong Kim, GaAstronics
* Member, Board of Directors
18
2012 Compound Semiconductor MANTECH
TECHNICAL PROGRAM COMMITTEE
Jon Abrokwah, Avago Technologies
Travis Abshere, TriQuint Semiconductor
Kamal Alavi, Raytheon
Hani Badawi, AXT Inc.
Zaher Bardai, IMN.Epiphany.com
John Blevins, AFRL/RYD
Karlheinz Bock, Fraunhofer Institute
Michelle Bourke, Oxford Instruments Plasma Technology
Karim Boutros, HRL Laboritories
Shawn Burnham, HRL Laboritories
Arnold Chen, Aurrion
Mike Clausen, The Centre for Process Innovation
Suzanne Combe, TriQuint Semiconductor
Jim Crites, Cobham
Monte Drinkwine, Cobham
Chuck Duncan, RF Micro Devices
Milton Feng, University of Illinois
Charlie Fields, Agilent
Pat Fowler, Anadigics
Allen Hanson, M/A-COM Technology Solutions
Quesnell Hartmann, EpiWorks
George Henry, Northrop Grumman ES
Chang-Hwang Hua, WIN Semiconductors Corp.
Yung-Chung Kao, IntelliEPI
Hidetoshi Kawasaki, Sony
Judy Kronwasser, NOVASiC
Martin Kuball, University of Bristol
Barbara Landini, Sumika Electronic Materials
Chun-Lim Lau, Booz Allen Hamilton
Amy Liu, IQE Inc.
Tom Low, Agilent Technologies
Earl Lum, EJL Wireless Research
David Meyer , Naval Research Lab
Eizo Mitani, Sumitomo Electric Device Innovations, Inc
Chanh Nguyen, Teledyne Scientific
Yogi Ota, Panasonic Corporation
Paul Pinsukanjana, IntelliEPI
William Quinn, Veeco Compound Semiconductors
Kelli Rivers, Materion
Thomas Roedle, NXP Semiconductors
Robert Sadler, Hexa Tech Inc.
Keith Salzman, TriQuint Semiconductor Texas
Shyh-Chiang Shen, Georgia Tech
Joerg Splettstoesser, United Monolithic Semiconductor
Andrew Stoltz, US Army, Night Vision Laboratory
Oded Tal, Max IEG
Shiban Tiku, Skyworks Solutions, Inc.
Jansen Uyeda, Northrop Grumman AS
Kevin Vargason, IntelliEPI
David Wang, Global Communication Semiconductors
Russ Westerman, Plasma-Therm, LLC
Victoria Williams, Cree, Inc.
Sharon Woodruff, Northrop Grumman ES
Chris Youtsey, Microlink Devices
Guoliang Zhou, Skyworks Solutions, Inc.
19
2012 Compound Semiconductor MANTECH
TECHNICAL PROGRAM
Monday, April 23rd
CS MANTECH WORKSHOPS
Chair:
Kevin Stevens, Kopin Corporation
7:00 AM
Registration
8:50 AM
Welcome and Introductions
9:00 AM
Workshop Session 1
Moving Toward a Solar-Powered World What Role Could Compound
Semiconductors Play?
Dr. Sarah Kurtz, NREL
10:15 AM
BREAK
10:30 AM
Workshop Session 2
Recent Developments in Nanoscale
Thermoelectric Materials and Device
Technology
Dr. Rama Venkatasubramanian, RTI
12:00 PM
WORKSHOP LUNCH
(CS MANTECH WORKSHOP & ROCS)
1:00 PM
Workshop Session 3
The Concept and Development of an
Energy Internet
Professor Alex Huang, NCSU
2:00 PM
Workshop Session 4
Light Emitting Diodes for Lighting
Applications
Professor E. Fred Schubert, RPI
3:15 PM
BREAK
3:30 PM
Workshop Session 5
Gallium Nitride Transistors for Efficient
Power Conversion
Dr. Alexander Lidow, EPC Corporation
6:00 PM
EXHIBITS RECEPTION
20
2012 Compound Semiconductor MANTECH
Monday, April 23rd
ROCS WORKSHOP
Chair:
Peter Ersland, M/A-COM Technology
Solutions
7:30 AM
- 8:30 AM
ROCS Registration
8:15 AM
- 4:45 PM
ROCS Workshop Sessions
12:00 PM
WORKSHOP LUNCH
(CS MANTECH & ROCS)
Tuesday, April 24th
8:00 AM
Conference Opening
Mariam Sadaka, Soitec USA
Conference Chair
8:10 AM
2011 Conference Best Paper Awards
Steve Mahon, Cascade Microtech, Inc.
8:20 AM
Technical Program Highlights
Karen Renaldo, Northrop Grumman ES
Technical Program Chair
SESSION 1: PLENARY I –
Industry View from the Top:
CEO Review
Chair:
Karen Renaldo, Northrop Grumman ES
8:30 AM
Invited Presentation
1.1 Semiconductor Innovation: Enabling
Mobile Connectivity
David J. Aldrich
President and CEO, Skyworks Solutions, Inc.
9:00 AM
Invited Presentation
1.2 Challenges and Opportunities in the
III-V Industry: A Quarter Century View
Dr. John C.C. Fan
President and CEO, Kopin Corporation
9:30 AM
Invited Presentation
1.3 Current Developments in Epi Foundry
Services for Advanced Wireless
Applications
Drew Nelson
President and CEO, IQE plc
10:00 AM
BREAK
21
2012 Compound Semiconductor MANTECH
Tuesday, April 24th
SESSION 2: PLENARY II –
CS INDUSTRY ANALYSIS
Chair:
Steve Mahon, Cascade Microtech, Inc.
10:30 AM
Invited Presentation
2.1 Europe’s Compound Semiconductor
Industry
Richard Stevenson, Consultant Editor,
Compound Semiconductor Magazine
11:00 AM
Invited Presentation
2.2 Present Situation and Trend of
Compound Semiconductor Industry in
Japan
Akihiro Tsumura, Editorial Department of
The Semiconductor Industry News, Sangyotimes, Inc.
11:30 AM
2.3 GaAs Industry Overview and Forecast:
2010 – 2015
Eric Higham1 and Asif Anwar2, 1Strategy
Analytics Inc., 2Strategy Analytics Ltd.
11:50 PM
EXHIBITS LUNCH
SESSION 3: TECHNOLOGY
Chair:
Glen “David” Via, Air Force Research
Laboratory
1:10 PM
Invited Presentation
3.1 The DARPA Diverse Accessible
Heterogeneous Integration (DAHI)
Program: Towards a Next-Generation
Technology Platform for HighPerformance Microsystems
Sanjay Raman1, Carl L. Dohrman2, Tsu-Hsi
Chang2, J. Scott Rodgers1, 1Defense
Advanced Research Projects Agency, 2Booz
Allen Hamilton Inc.
1:40 PM
Invited Presentation
3.2 GaN Technology for Radars
Colin S. Whelan, Nicholas J. Kolias, Steven
Brierley, Chris MacDonald, Steven Bernstein,
Raytheon Company
2:10 PM
Invited Presentation
3.3 Status and Perspective of GaN-based
Transistor Technology in Japan
Masaaki Kuzuhara, University of Fukui
22
2012 Compound Semiconductor MANTECH
Tuesday, April 24th
2:40 PM
BREAK
SESSION 4: QUALITY AND YIELD
Chair:
Thorsten Saeger, TriQuint Semiconductor
3:10 PM
Invited Presentation
4.1 Predicting, Validating, and Improving
Yield of Multi-Chip RF Modules During
Product Development
James Eastham, TriQuint Semiconductor
3:40 PM
4.2 A Call to Higher Quality in GaAs
Jason Fender, Jose Suarez, Freescale
Semiconductor
4:00 PM
4.3 Use of Knowledge Discovery from
Wafer Fab Data for Yield Improvement
Patrick J Carroll, RFMD
4:20 PM
4.4 A Robust, NonParametric Method to
Identify Outliers and Im'prove Final Yield
and Quality
Neill Patterson, TriQuint Semiconductor
4:40 PM
BREAK
5:00 PM
EXHIBITORS’ FORUMS (Georgian) Please refer to the posted placards in the
exhibit area for forum participants and
scheduled presentations.
5:00 PM
STUDENT FORUM (Statler)
7:00 PM
INTERNATIONAL RECEPTION
Wednesday April 25th
SESSION 5a: OPERATIONS
Chair:
Chuck Duncan, RFMD
8:30 AM
23
Invited Presentation
5a.1 MES Selection Process & Benchmark
Survey for a Semiconductor Fab Case
Study
Danny Rosner, Ariel Meyuhas, Oded Tal,
MAX I.E.G., LLC
2012 Compound Semiconductor MANTECH
9:00 AM
5b.1 The CLP Regulation – Opportunity
for Global Standardization of Substance
Classifications or Threat to Innovation
from Regulatory Overreach?
Hermann Schenk1, Steve Aden2, Hani
Badawi3, Thomas Bergunde4, Sylvi
Claußnitzer5, Thomas Pearsall6, Birgit
Müller1, Roy Blunt7, Iwan Davies7, Rainier
Krause8, John Sharp9, Gerhard Hirschle10,
1
FCM, 2Avago, 3AXT, 4Azur Space,
5
consultant to GAIT, 6EPIC Associates,7IQE,
8
Soitec, 9TriQuint, 10UMS
9:20 AM
5a.3 Green GaAs Substrate Manufacturing
Stefan Eichler, Freiberger Compound
Materials GmbH
9:40 AM
5a.4 Bridging the Social Gap Working
Together for Continued Prosperity and
Growth
Ryan Snodgrass, Jinhong Yang, TriQuint
Semiconductor, OR
SESSION 5b: GaN RELIABILITY
Chairs:
Shawn Burnham, HRL Laboratories, LLC
Glen “David” Via, Air Force Research
Laboratory
8:20 AM
5b.1 Assessing the Reliability Risk of a
Maverick Manufacturing Anomaly
W. J. Roesch and D. Littleton, TriQuint
Semiconductor, Inc.
8:40 AM
5b.2 Preliminary Reliability Data from
Accelerated RF Life Tests on European
GaN HEMTs
A. R. Barnes and F. Vitobello, Materials and
Components Technology Division,
ESA/ESTEC, Netherlands
9:00 AM
Student Presentation
5b.3 Degradation of AlGaN/GaN HEMTs
Below the “Critical Voltage”: A TimeDependent Analysis
M. Meneghini1, A. Stocco1, M. Bertin1, D.
Marcon2, G. Meneghesso1, E. Zanoni1,
1
Department of Information Engineering,
University of Padova, Italy, 2IMEC, Belgium
24
2012 Compound Semiconductor MANTECH
9:20 AM
Student Presentation
5b.4 Empirical and Physical Modeling of
Self-Heating in Power AlGaN/GaN
HEMTs
M. Bernardoni, N. Delmonte and R. Menozzi,
Department of Information Engineering,
University of Parma, Italy
9:40 AM
5b.5 A Gold-free Fully Copper Metalized
AlGaN/GaN Power HEMTs on Si
substrate
C.-W. Lin1, H.-C. Chiu1, J. S. Fu1, G.-Y. Lee2,
and J.-I. Chyi2, 1Department of Electronics
Engineering, Chang Gung University,
Taiwan, 2Department of Electrical
Engineering, National Central University,
Taiwan
10:00 AM
BREAK
SESSION 6a: MANUFACTURING
Chair:
Arnold Chen, Aurrion
10:40 AM
Invited Presentation
6a.1 What Happened, What Was Done and
What Was Learned in CS Industry
through Catastrophic Disasters in Japan
Yohei Otoki, Hitachi Cable, Ltd.
11:10 AM
6a.2 GaN-on-Si HEMT Process Transfer
and Qualification
John Bell1, Jeannette James1, John Kearney1,
Brad Krongard1, Tom Lepkowski1, Pradeep
Rajagopal1, Brook Raymond1, James Shen1,
Keith Will1, Chung-hsu Chen2, Minkar Chen2,
Daniel Hou2, Chaunxin Lian2, Libo Song2,
William Sutton2, Alex Vigo2, Chao Wang2,
David Wang2, Shiguang Wang2, 1Nitronex
Corporation, 2Global Communication
Semiconductors, Inc.
11:30 AM
6a.3 Repair and Maintenance in HighVolume MBE Production
W. T. Black, RFMD
11:50 AM
6a.4 Epitaxial Lift-Off of Large-Area
GaAs Thin-Film Multijunction Solar Cells
C. Youtsey, J. Adams, R. Chan, V. Elarde, G.
Hillier, M. Osowski, D. McCallum, H.
Miyamoto, N. Pan, C. Stender, R. Tatavarti,
F. Tuminello, A. Wibowo, MicroLink
Devices, Inc.
25
2012 Compound Semiconductor MANTECH
SESSION 6b: HBTs
Chairs:
Charles Fields, Agilent Technologies
Mike Sun, Skyworks Solutions, Inc.
10:50 AM
6b.1 An Ultra High Ruggedness
InGaP/GaAs HBT for Multi-Mode / MultiBand Power Amplifier Application
Shu-Hsiao Tsai, Rei-Bin Chiou, Tung-Yao
Chou, Cheng-Kuo Lin, and Dennis Williams,
WIN Semiconductors Corp.
11:10 AM
6b.2 Novel Passivation Ledge Monitor in
an InGaP HBT Process
Cristian Cismaru and Peter J. Zampardi,
Skyworks Solutions, Inc.
11:30 AM
Student Presentation
6b.3 Non-Linearity Characterization of
Submicron Type-I InP/InGaAs/InP and
Type-I/II AlInP/GaAsSb/InP DHBTs
Huiming Xu, Eric Iverson, K.Y. (Donald)
Cheng, Mark Stuenkel and Milton Feng,
University of Illinois at Urbana-Champaign
11:50 AM
6b.4 New Bi-HEMT Technology with Low
On-Resistance pHEMT for LTE
Application
Bing-Shan Hong, Shu-Hsiao Tsai, ChengKuo Lin, Shinichiro Takatani, and Dennis
Williams, WIN Semiconductors Corp.
12:10 PM
OPEN LUNCH
SESSION 7a: NOVEL DEVICES
Chairs:
Tom Low, Agilent Technologies
Hidetoshi Kawasaki , Sony
1:40 PM
Invited Presentation
7a.1 III-V MOSFETs for Sub-15 nm
Technology Generation CMOS: Some
Observations, Issues and Solutions
Iain Thayne, School of Engineering,
University of Glasgow
2:10 PM
Student Presentation
7a.2 Inverted-type InAlAs/InGaAs
MOSHEMT with Regrown Source/Drain
Exhibiting High Current and Low Onresistance
Qiang Li, Xiuju, Zhou, Chak Wah TANG and
Kei May Lau, Dept. of Electronic &Computer
Engineering, Hong Kong U. of Science and
Technology
26
2012 Compound Semiconductor MANTECH
2:30 PM
Student Presentation
7a.3 Demonstration of Low Subthreshold
Swing a-InGaZnO Thin Film Transistors
Liang-Yu Su, Hsin-Ying Lin, Huang-Kai Lin,
and JianJang Huang, Graduate Institute of
Photonics and Optoelectronics, National
Taiwan University
2:50 PM
Invited Presentation
7a.4 Germanium and Compound
Semiconductor Manufacturing for
Advanced CMOS
Athanasios Dimoulas, MBE Lab., NCSR
DEMOKRITOS
SESSION 7b: PACKAGING
Chair:
Shiban Tiku, Skyworks Solutions, Inc.
1:40PM
Invited presentation
7b.1Electrical, Thermal, Reliability and
Cost Considerations for Millimeter-Wave
Surface Mount Packages
Peter W Evans and Anthony P Fattorini,
M/A-COM Technology Solutions, Sydney
Design Center, Australia
2:10PM
7b.2 Methods of Removing TiOx Residue
from Au Bonding
Lena Luu, Minkar Chen and Frank Monzon,
Global Communication Semiconductors, Inc.
2:30PM
7b.3 Manufacturing of Cu-pillar Bump for
III-V MMIC Thermal Management
G. Chen; S. Chou; T Hsiao, WIN
Semiconductors Corp., Taiwan
3:20 PM
BREAK
SESSION 8a: PROCESSING – GATE PROCESSING
Chair:
Russ Westerman, Plasma-Therm, LLC
3:40 PM
27
8a.1 40 nm T-Gate Process Development
Using ZEP Reflow
D. J. Meyer, R. Bass, D. F. Storm, D. S.
Katzer, D. A. Deen, and S. C. Binari, Naval
Research Laboratory, Electronics Science
and Technology Division
2012 Compound Semiconductor MANTECH
4:00 PM
8a.2 Set up and Characterization of an
Optical Wide 0.15 µmTechnology
Amy Zhou, Jerry Beene, Hua-tang Chen,
Marcus King, Ming-Yih Kao and Jan
Campbell, TriQuint Semiconductor, TX
4:20 PM
Student Presentation
8a.3 Dry Wide-Recess Process
Characterization for PHEMT
Kevin Shu1 and Mark Tesauro2, 1University
of Washington, 2TriQuint Semiconductor, OR
4:40 PM
8a.4 To Improve E-beam T-gate Yield by
Pre-Cleaning Process
Hao-Yu Ting, John Huang, Hsi-Tsung Lin,
Eric Kuo, Se-Jung Lee, David Wu, William
Lai, Kerry Chang ,Wen-Kai Wang, WIN
Semiconductors Corp.
5:00 PM
8a.5 150 nm T-shape Gate Process
Capacity Improvement
Se-Jung Lee, Chih-Chuan Chang, I-Te Cho
and Yu-Chi Wang, WIN Semiconductors
Corp.
5:20 PM
8a.6 Removal of Surface-Related Current
Slump in Field-Plate GaAs FETs
F. Hafiz, M. Kumeno, T. Tanaka, and K.
Horio, Faculty of systems Engineering,
Shibaura Institute of Technology, Saitama,
Japan
SESSION 8b: GaN/SiC PROCESSING
Chairs:
Michelle Bourke, Oxford Instruments Plasma
Technology
Scott Sheppard, Cree, Inc.
3:40 PM
28
Student Presentation
8b.1 High Mobility (210 cm2/V-s), High
Capacitance (7.2 µF/cm2) ZrO2 on GaN
Metal Oxide Semiconductor Capacitor via
ALD
P. von Hauff1, K. Bothe1, A. Afshar2, A.
Foroughii2, D. Barlage1, K. Cadien2,
1
Department of Electrical and Computer
Engineering, University of Alberta,
Edmonton, Alberta, Canada, 2Department of
Chemical and Materials Engineering,
University of Alberta, Edmonton, Alberta,
Canada
2012 Compound Semiconductor MANTECH
4:00 PM
Student Presentation
8b.2 Threshold Voltage Control of
Recessed-Gate III-N HFETs Using an
Electrode-less Wet Etching Technique
Yi-Che Lee, Cheng-Yin Wang, Tsung-Ting
Kao and Shyh-Chiang Shen, School of
Electrical and Computer Engineering,
Georgia Institute of Technology
4:20 PM
8b.3 Low-Loss Metal-on-BCB Technology
for Next Generation GaN MMICs
Eric Stewart, Ron Freitag, John Mason, Matt
Walker, George Henry, Karen Renaldo,
Northrop Grumman ES
4:40 PM
8b.4 Evaluation of Through-wafer Via
Holes in SiC Substrates for GaN HEMT
Technology
H.Stieglauer, J.Nösser, G.Bödege, H.Blanck,
United Monolithic Semiconductors ,Ulm,
Germany
5:00 PM
8b.5 Backside Via Process of GaN Device
Fabrication
Ju-Ai Ruan, Craig Hall, Celicia DellaMorrow, Tom Nagle, Yinbao Yang, TriQuint
Semiconductor, TX
5:20 PM
8b.6 Chlorine-Based ICP Etching for
Improving the Luminance Efficiency in
Nitride LEDs
H. Ogiya, T. Nishimiya, M. Hiramoto, S.
Motoyama and O. Tsuji, Samco, Inc.
5:40 PM
RUMP SESSION RECEPTION
6:10 PM
Chair:
RUMP SESSIONS
Allen Hanson, M/A-COM Tech Solutions
These popular and often lively sessions offer a venue to
voice your opinions and hear your colleagues call it like
they see it in a less-formal and often entertaining way. This
year’s line-up of sessions is sure not to disappoint!
SESSION A: CS Weakest Link – Where Are We a Few
Clowns Short in Our Circus?
Moderator: Steve Mahon, Cascade Microtech, Inc.
Compound Semiconductors companies have always
lived in the shadow of the silicon behemoth and rarely
have they had the resources to collect data, build systems
or develop cost structures of comparable caliber. Yet we
29
2012 Compound Semiconductor MANTECH
are often held to the same high standards. In this session
we’ll explore topics such as where are we the most behind,
and are we doing the right things to make CS more robust
and user friendly? There are many links in the chain that
comprises a CS product – design, process, reliability,
packaging and more - which ones do you think could be
the first to break?
SESSION B: Can GaN and SiC Compete in Power
Electronics?
Moderator: Peter Ersland, M/A-COM Technology
Solutions
At last year’s conference, Yole Development predicted
GaN devices would capture $350 million of a $16.6 billion
market for power electronics by 2015! What say you? Is
GaN now ready to compete with well-established Si power
technologies? And how will SiC fare? Join this rump
session to provide your thoughts on the topic, hear what
your colleagues have to say, and update your score card.
SESSION C: How Do We Prepare for Disaster?
Moderator: Yohei Otoki, Hitachi-Cable America
In 2011, we witnessed several natural disasters that not
only resulted in significant personal suffering and loss, but
proved to have an economic impact on our industry - the
floods in Malaysia and the earthquake in Japan most
notable of these events. In a highly interdependent global
economy, what can we do to reduce our vulnerability to
such events? In this session all will be encouraged to share
best practices, lessons learned and to express “what keeps
them up at night” – all in the spirit of strengthening our
industry.
SESSION D: PHEMTs - Who Needs Them?
Moderator: Marty Brophy, Avago Technologies
Is the handset antenna switch - the killer application for
pHEMTs - facing extinction? To be replaced by RF Si
IC’s? Some say “yes” but if you disagree come and
convince us. And if it is true, what else is out there that
requires bushels of pHEMT wafers? Come argue your
views!
7:10 PM
30
SEMI STANDARDS MEETING
2012 Compound Semiconductor MANTECH
Thursday April 26th
SESSION 9a: POWER DEVICES I
Chairs:
Ruediger Schreiner, AIXTRON SE
Robert Sadler, HexaTech, Inc.
8:00 AM
Invited Presentation
9a.1 The Status of GaN-based Power
Device Development
M.A. Briere, ACOO Enterprises LLC
8:30 AM
Student Presentation
9a.2 High Breakdon AlGaN/GaN HEMTs
Employing Nickel Oxide Floating Metal
Ring
Y.-S. Kim1, M.-W. Ha2, O-G. Seok1, W.-J.
Ann1, M.-K Han1, 1School of Electrical
Engineering, University Seoul, 2Korea
Electronics Technology Institute, Gyeonggido
8:50 AM
9a.3 Au-free, High-Breakdown
AlGaN/GaN MISHEMTs with Low
Leakage, High Yield and Robust TDDB
Characteristics
S. Lenci1, X. Kang 1, D. Wellekens1, M. Van
Hove1, S. Boulay2, S. Stoffels1, K. Geens1, M.
Zahid1, S. Decoutere1, 1IMEC, Leuven,
2
IMEC-NL, Eindhoven
9:10 AM
9a.4 2kV Breakdown Voltage GaN-on-Si
DHFETs with Sub-micron Thin AlGaN
Buffer
P. Srivastava1,2, K. Cheng1, M. Van Hove1 .
M. Leys1, D. Marcon1,D. Visalli1, K. Geens1,
S.Decoutere1, R.P. Mertens1,2 , G.Borghs1,2 ,
1
IMEC, Leuven, 2 Katholieke Universiteit,
Leuven
9:30 AM
Student Presentation
9a.5 AlGaN/GaN HEMTs Employing
Multiple Al2O3/Ga2O3 stacks
O. Seok1, W. Ahn1,Y.-S. Kim1, M.-W. Ha2,
M.-.K. Han1, 1Seoul National University,
Seoul, 2Korea Electronics Technology
Institute, Seongnam
SESSION 9b: GaAs PROCESSING
Chairs:
Kamal Alavi, Raytheon Company
Chang Hwang Hua, WIN Semiconductor
8:10 AM
31
9b.1 Adhesion Characterization of PhotoDefinable Epoxies on High Aspect Ratio
2012 Compound Semiconductor MANTECH
Structures for High Performance
Applications
Jan Campbell, Qizhi He, Howie Yang, Martin
Ivie, TriQuint Semiconductor Product Sector
Compound Semiconductor, TX
8:30 AM
9b.2 Development of a Double Layer
Spray/Spin Coat Process for Improving
Coat Uniformity of an 80 Micron Coat
Process
Martin Ivie1,3, Qizhi He1, Howie Yang1, Kara
Palmer2, Mike Sexton2, Jan Campbell,
1
TriQuint Semiconductor, , TX 2EV Group, ,
Tempe, AZ
8:50 AM
9b.3 Improving Front Side Process
Uniformity by Back-Side Metallization
Kezia Cheng, Skyworks Solutions, Inc.
9:10 AM
9b.4 High Throughput Stress-Controlled
Silicon Nitride Deposition for Compound
Semiconductor Device Manufacturing
Kenneth D. Mackenzie and Rohit Khanna,
Plasma-Therm LLC
9:30 AM
9b.5 New Insights into Formation of NiBased Alloyed Ohmic Contacts to GaAs
School of Physics and Centre for
Nanotechnology, University of Hyderabad,
Central University P.O., Gachibowli,
Hyderabad 500046 India.
9:50 AM
BREAK
SESSION 10a: Power Devices II
Chairs:
Sharon Woodruff, Northrop Grumman ES
George Henry, Northrop Grumman ES
10:10 AM
10a.1 11.72 cm2 SiC Wafer-scale
Interconnected 64 kA PiN Diode
M. Snook1,H. Hearne1, T. McNutt2, N. ElHinnawy1, V. Veliadis1, B. Nechay1, S.
Woodruff1, R. S. Howell1, D. Giorgi3, J.
White4, S. Davis4, 1Northrop Grumman ES,
2
APEI, Inc., 3Omnipulse Inc., 4US Army
TARDEC.
10:30 AM
10a.2 Characteristics of 4H-SiC DualMetal and MOS Trench Schottky
Rectifiers
Chen-Tyng Yen1, Young-Shying Chen1,
Chien-Chung Hung1, Chwan-Ying Lee1,
Lurng-Shehng Lee1, Tzu-Ming Yang1, Kuan-
32
2012 Compound Semiconductor MANTECH
Wei Chu1, Ming-Jinn Tsai1, Patrick Chuang2,
Gary Chen2, Tony Huang2, 1Electronics and
Optoelectronics Research Laboratories, ITRI,
2
Diodes Incorporated.
10:50 AM
10a.3 Challenges in the Automotive
Application of GaN Power Switching
Devices
Ming Su1, Chingchi Chen1, Lihua Chen1,
Michele Esposto2, Siddarth Rajan2, 1Ford
Motor Company, 2The Ohio State University.
11:10 AM
10a.4 High Breakdown Voltage (1590 V)
AlGaN/GaN-on-Si HFETs with Optimized
Dual Field Plates
Jae-Gil Lee1, Bong-Ryeol Park1, Ho-Jung
Lee1, Minseong Lee2, Hojung An2, KwangSeok Seo2, Ho-Young Cha1, 1School of
Electronic and Electrical Engineering,
Hongik University, 2Department of Electrical
Engineering and Computer Science, Seoul
National University.
11:30 AM
10a.5 Novel Normally-off GaN HEMT
Device Structure by Using Nano-rods
Technology
Chwan-Ying Lee, Young-Shying Chen,
Lurng-Shehng Lee, Chien-Chung Hung,
Cheng-Tyng Yen, Suh-Fang Lin, Rong Xuan,
Wei-Hung Kuo, Tzu-Kun Ku, Ming-Jinn Tsai,
Electronics and Optoelectronics Research
Laboratories (EOL), ITRI.
SESSION 10b: EPI CHARACTERIZATION AND
OPTIMIZATION
Chairs:
Andy Souzis, II-VI Inc.
Barbara Landini, Sumika Electronic
Materials
10:10 AM
10b.1 GaN on Diamond vs. GaN on SiC
HEMT and MMIC Performance
M.Tyhach1, S. Bernstein1, P. Saledas1, F.
Ejeckam2, D. Babic2, F. Faili2, D. Francis2,
1
Raytheon Co, 2Group4 Labs
10:30 AM
10b.2 Light Response in Buffer Leakages
Related with Current Collapse and Its
application for epi quality development in
AlGaN/GaN HEMT Structures
Takeshi Tanaka, Hiroyuki Kamogawa and
Yohei Otoki, Hitachi Cable, Ltd.
33
2012 Compound Semiconductor MANTECH
10:50 AM
10b.3 Reduction in Production pHEMT
Process Variation Due to MBE Rotational
Effects
Andrew Shelton, Clayton Workman, RFMD
11:10 AM
10b.4 Manufacturing Efficiency
Improvement Through MBE Recipe
Optimization
Guoliang Zhou, Mark Borek, Skyworks
Solutions, Inc.
11:30 AM
10b.5 An In-Situ Reflectance
Implementation for High Volume
Electronic Device Epitaxial Wafer
Production
M. Youngers, P. Rice, G. Yeboah, E. Rehder,
O. Laboutin, K. S. Stevens, and W. Johnson,
Kopin Corporation
11:50 PM
LUNCH by CS MANTECH
SESSION 11a: GaN DEVICES
Chairs:
Shyh-Chiang Shen, Georgia Tech
Yohei Otoki, Hitachi Cable, Ltd.
1:20 PM
11a.1 Effect of Oxidant Source on
Threshold Voltage Shift of AlGaN/GaN
MIS-HEMTs Using ALD-Al2O3 Gate
Insulator Films
Shiro Ozaki, Toshihiro Ohki, Masahito
Kanamura, Norikazu Nakamura, Naoya
Okamoto, Toyoo Miyajima, Toshihide
Kikkawa, Fujitsu Laboratory Ltd., Japan
1:40 PM
Student Presentation
11a.2 Improved Gate Leakage and
Microwave Performance by Inserting a
Thin Erbium Oxide Layer on
AlGaN/GaN/silicon HEMT Structure
Fu-Chuan Chu1, Sheng-Fu Yu1, Ying-Jie
Tsai1, Sheng-Yu Liao1, Chou-Shuang Huang1,
Ray-Ming Lin1, Shuh-en Ren2, 1Chang Gung
University, Taiwan, 2Chung Shan Institute of
Science and Technology, Taiwan
2:00 PM
11a.3 ALD-grown Ultrathin AlN film for
Passivation of AlGaN/GaN HEMTs
Sen Huang, Qimeng Jiang, Shu Yang,
Chunhua Zhou, Kevin J. Chen, Hong Kong
University of Science and Technology, Hong
Kong
34
2012 Compound Semiconductor MANTECH
2:20 PM
Student Presentation
11a.4 Impact of Step Edges on Trapping
Behavior in N-polar GaN HEMTs
Nicole Killat1, Michael J. Uren1, Seshadri
Kolluri2, Stacia Keller2, Umesh K. Mishra2,
Martin Kuball1, 1University of Bristol, UK,
2
University of California at Santa Barbara
2:40 PM
11a.5 Profiling the Temperature
Distribution in AlGaN/GaN HEMTs with
Nanocrystalline Diamond Heat Spreading
Layers
T. J. Anderson1, M. J. Tadjer2. K. D. Hobart1,
T. I. Feygelson3, J. D. Caldwell1, M. A.
Mastro1, J. K. Hite1, C. R. Eddy, Jr. 1, F. J.
Kub1, B. B. Pate1, 1Naval Research
Laboratory, 2University of Politécnica de
Madrid, Spain, 3 SAIC, Inc.
SESSION 11b: Backside Processing/Yield
Improvement
Chair:
Travis Abshere, TriQuint Semiconductor
1:20 PM
11b.1 Breaking News! A Story of
Successful GaAs Backend Process
Improvement
Tom Hand, Scott Farmosa, Jennifer Welborn,
Daniel Nercessian, Skyworks Solutions, Inc.
1:40 PM
11b.2 Method for Detecting GaAs Die
Fractures in Device Manufacturing
Through the Use of a Designed Test
Vehicle
Jason Fender, Jose Suarez, Freescale, RF
Division
2:00 PM
11b.3 The Effects of Increasing the Aspect
Ratio of GaAs Backside Vias
Holly Rubin1, Dwarakanath Geerpuram1,
Russ Westerman1, Mark Buliszak2, Rajesh
Baskaran2, Allen W. Hanson2, 1IncPlasmaTherm LLC, 2M/A-COM Technology
Solutions
2:20 PM
11b.4 Rework Reduction and Optimization
of 150 mm Wafer Mount Process
Pavan Bhatia, Jan Campbell, Martin Ivie,
TriQuint Semiconductor
35
2012 Compound Semiconductor MANTECH
2:40 PM
11b.5 Yield Improvement for Thin 50 µm
GaAs Product line
Rui-Ching Wei, Huang-Wen Wang, ChenChe Chin, Summer Chiang, Jimmy Her, PingWei Chen, Kevin Huang, and Chang-Hwang
Hua, WIN Semiconductors corp.
SESSION 12: INTERACTIVE FORUM
Chairs:
Celica Della-Morrow, TriQuint
Semiconductor
Sharon Woodruff, Northrop Grumman
Hidetoshi Kawasaki, Sony
3:00 PM
- 4:30 PM
12.1 Wafer Bonding Technology For HBLED Manufacturing
Thomas Uhrmann1, Viorel Dragoi1, Eric F.
Pabo2, Thorsten Matthias1, Paul Lindner1,
1
EV Group, 2EV Group Inc.
12.2 Effect of Wafer Height and Bow on
Eddy Current Sheet Resistance
Measurements
Mark Benjamin, Lehighton Electronics Inc.
12.3 Development of AlGaN/GaN HEMTs
on Different Substrates
Ming Pan, Xiang Gao, Daniel Gorka, Mark
Oliver, Shiping Guo, IQE RF, LLC.
12.4 PVD Magnetron Sputtering
Parameters and their Effect on the
Composition of AuSn Solder
Heiner Lichtenberger1, Alan Duckham1, Steve
Golovato2, and George Seryogin2, 1Materion
Microelectronics and Services,2NEXX
Systems
Student Presentation
12.5 Investigation of Efficiency Droop for
InGaN-based LEDs with Carrier
Localization State and Polarization Effect
Sheng-Fu Yu1, Shoou-Jinn Chang1, Ray-Ming
Lin2, Fu-Chuan Chu2, 1Institute of
Microelectronics and Department of
Electrical Engineering, Center for
Micro/Nano Science and Technology
Advanced Optoelectronic Technology Center,
National Cheng Kung University, 2Graduate
Institute of Electronic Engineering and Green
Technology Research Center, Chang Gung
University
36
2012 Compound Semiconductor MANTECH
12.6 Advancements in Lapping and
Polishing with Diamond Slurries
Kan-Yin Ng and Timothy Dumm, Diamond
Innovations
Student Presentation
12.7 Analytical and Simulative Viewpoint
of Graded Barrier AlGaN/GaN HEMT for
High Input Impedance, Breakdown
Voltage and Channel Mobility
Palash Das, Pallab Banerji, Dhrubes Biswas,
Indian Institute of Technology Kharagpur
12.8 A New Single Wafer Cleaning
Technology for Compound Semiconductor
Manufacturing
Richard Peters1, Spencer Hochstetler1, Keith
Cox1, Palmer Holbrook1, Samuel Mony2,
Jiang Wang2, Tom Grayson2, Thorsten
Matthias3, Thomas Glinsner3, 1Eastman
Chemical Company, 2Skyworks Solutions,
Inc., 3EV Group
12.9 Growth of InGaAs/ (Al)GaAs Layers
for Laser Manufacturing using 4 Inch
GaAs Substrate
S.Habermann1, J.Hofeldt1,R.Schreiner1,
D.Schmitz1, M.Heuken1,2, 1AIXTRON SE,
2
RWTH Aachen University
4.30 PM
CONFERENCE CLOSING RECEPTION
TECHNICAL SESSIONS
SESSION 1: PLENARY I –
Industry View from the Top:
CEO Review
Chair:
Karen Renaldo, Northrop Grumman (ES)
It is a wonderful opportunity for us to host this year’s
conference in Boston, Massachusetts; home and close
neighbor for many of our semiconductor attendees and
exhibitors. This year we are honored with invited CEOs
from three prominent northeast semiconductor companies.
The conference starts with President and CEO of Skyworks
Solutions, Inc., Mr. David Aldrich, who will share his
views on enabling mobile connectivity through
semiconductor innovation. His presentation will look at
advances in RF amplifiers, modules, and subsystem
technology, in addition to Skyworks’ insight into design
37
2012 Compound Semiconductor MANTECH
manufacturing advances; which are fueling new
opportunities and propelling innovation beyond the
handset. Advancing these semiconductor initiatives will
require epitaxial material to move toward more challenging
and demanding standards. Two high-level perspectives on
the challenges involved in meeting these demands will be
provided by invited Presidents and CEOs, Dr. John C. Fan
from Kopin Corporation and Dr. Drew Nelson for IQE plc.
They will discuss how their companies are addressing the
challenges and opportunities facing the III-V epitaxial
world. The talks will provide us with a better appreciation
for the critical role that epitaxy foundries perform and the
ever-increasing demands on them to produce higher quality
wafers at ever-reducing cost.
SESSION 2: PLENARY II –
CS INDUSTRY ANALYSIS
Chair:
Steve Mahon, Cascade Microtech, Inc.
2011 was an explosive year for most CS sectors with the
evidence that 2012 will turn out a little more subdued.
What is in store for the next few years? This session will
attempt to provide some illumination through the fog of the
future. Three papers will present the state and expected
upcoming performance of our businesses.
Richard Stevenson of Compound Semiconductor
Magazine will explore the multiple facets of the European
Compound Semiconductor industry. This invited paper
will discuss markets including the turbulent areas of solar
power and LED lighting as well as the exciting areas of
power electronics and automotive radar.
Akihiro Tsumura of The Semiconductor Industry News
will review the top issues facing the Japanese Compound
Semiconductor industry. This invited paper will provide a
reflection on the history of CS business in Japan and where
its future lies in both electronic and optical devices.
Eric Higman and Asif Anwar of Strategies Analytics will
bring it all home with an overview and forecast of the
worldwide GaAs industry. Driven by the continued growth
in advanced handsets and increased wired and wireless
data demand, the GaAs community will be challenged to
provide more content at an ever-decreasing price to supply
the global demand. Find out all about the key driving
forces that will affect one of our biggest market areas
SESSION 3: TECHNOLOGY
Chair:
Glen “David” Via, Air Force Research
Laboratory
In this Technology Session, invited speakers will discuss
a next-generation technology platform, GaN technology
38
2012 Compound Semiconductor MANTECH
for RADAR, and the status of GaN technology in Japan.
The first talk comes from the Defense Advanced Research
Projects Agency (DARPA) and will provide an overview
of the Diverse Accessible Heterogeneous Integration
(DAHI) program. Research activities related to the
integration of compound semiconductors with silicon
technology will be described and potential applications
discussed. Next, the Raytheon Company will discuss GaN
technology for RADAR. This review will present a
historical perspective on early GaN device development
through current production status, describe reliability
assessments, and discuss MMIC insertion considerations.
The last talk of the session comes from the University of
Fukui, Graduate School of Engineering, in Japan. Here, the
development of GaN HEMT technology for both RF and
power switching applications will be discussed along with
an analysis of competing substrate offerings and
enhancement mode device operation.
SESSION 4: QUALITY AND YIELD
Chair:
Thorsten Saeger, TriQuint Semiconductor
Yield is a very important metric of any manufacturing
process. Whether it is the farmer who plows his field or the
compound semiconductor factory that processes wafers,
this metric is tracked everywhere and seemingly is never
high enough. While yield is so important to the
manufacturer, the customer demands quality products that
satisfy the stated and implied needs free of deficiencies.
Quality and Yield are the common theme of the four
papers presented in this session. The first paper from
TriQuint Semiconductor will discuss the prediction,
validation and the improvement of yields of Multi-Chip RF
modules during product development. Methods will be
discussed for modeling and validating RF module yield
from the early concept to pilot production as many critical
business processes depend on it.
Over the years, papers have been presented at CS
MANTECH discussing quality initiatives such as 6-Sigma
and Zero Defect. Are those enough to achieve the highest
quality our customers expected from us? In the second
paper of this session, Freescale Semiconductor will discuss
what goes beyond those strategies. Freescale
Semiconductor will discuss a major shift in culture that
changes from detection and correction to prevention
methodologies.
Knowledge is key to any yield improvement. The key to
knowledge is data. The compound semiconductor
manufacturing process – from the bare wafer to the final
product – generates lots of data which is typically scattered
throughout an organization in different databases. The third
paper by RFMD describes how fabrication data is being
39
2012 Compound Semiconductor MANTECH
scrutinized to uncover knowledge to drive yield. It will
discuss how data is obtained from various sources, filtered
and relationships are established.
Outliers die are characterized as atypical when compared
to die from the same wafer or lot. Those die can impact
yield and quality of the final product. In the last paper of
this session, TriQuint Semiconductor will discuss the
shortcomings of two widely-used outlier detection methods
and introduce a more robust non-parametric algorithm for
the removal of atypical die the customer does not want in
his product.
SESSION 5a: OPERATIONS
Chair:
Chuck Duncan, RFMD
So, you found a novel way to utilize compound
semiconductors to create that killer new product. You have
manufacturing plans underway and have customers
knocking on your doors. It would seem everything is
falling into place. However, your challenges are just
beginning. In this section titled Operations, we will explore
a few of the many challenges facing the typical
manufacturing sites. How do we stay the leader, reduce
costs, meet environmental regulations and continuously
improve?
In the first presentation, representatives from MAX
International Engineering Group outline the benchmarking
process used to evaluate and select a Manufacturing
Execution System (MES) for a semiconductor Fab. How
do you begin to replace a legacy MES system? What are
your options, needs and potential benefits? Navigating a
change of this magnitude and impact can be daunting. The
authors of this paper outline the techniques used while
assisting a client in this arduous endeavor.
Our second paper in the session will be presented by
members of the Gallium Arsenide Industry Team (GAIT).
Anyone with a significant stake in the future of gallium
arsenide will want to be present for this discussion. Their
presentation will expand upon potential regulatory
classifications for gallium arsenide, their efforts to shape
these key judgments and how each of us may be affected
by the potential outcomes.
Next, our session moves to conservation, raw materials
efficiency and reclaim activities at Freiberger Compound
Materials. They will discuss efforts to reduce waste and to
reduce the environmental impacts of their substrate
manufacturing process. The methods used and lessons
learned can help us all be better environmental stewards
while improving our cost competitive position.
Our last presentation addresses the benefits for employee
involvement from the important perspective of the
operator. Although the most technical education is
40
2012 Compound Semiconductor MANTECH
concentrated within the engineering and management
groups, the most practical experience processing wafers,
running equipment, and observing nuanced quality
interactions often exists in the production workforce. But
why is it their input is sometimes overlooked or
disregarded when they have so much to offer?
Representatives from the production operations and
engineering groups team up from TriQuint Semiconductor
to call attention to the challenges and opportunities
available from total employee involvement.
SESSION 5b: GaN RELIABILITY
Chairs:
Shawn Burnham, HRL Laboratories, LLC
Dave Via, Air Force Research Laboratory
Compound semiconductor manufacturing success
depends on technology qualification through reliability
analysis. With GaAs and SiC reliability fairly established,
this session will focus on efforts to better understand GaN
reliability and present techniques to potentially improve
reliability. The session will open with a generic look at
how to assess reliability risks of manufacturing anomalies,
independent of semiconductor technology, presented by
TriQuint Semiconductor. A systematic methodology will
be given and applied in case studies to show the power of
the approach. Next, the European Space Research and
Technology Centre will present their latest reliability data
from accelerated RF life tests on European GaN HEMTs.
Electrical characterization and physical analysis of failed
L-band and X-band GaN MMICs will be presented to
describe the failure mechanisms. The subsequent
presentation from the University of Padova will describe
GaN HEMT degradation below the critical gate-to-drain
voltage. A model developed to explain the time-dependent
degradation will be shown along with experimental data.
Next, self-heating of GaN HEMT power devices is
addressed using empirical and physical modeling in a
presentation from the University of Parma. In this
presentation, finite element modeling will be used to
evaluate different lumped element modeling approaches
for a practical solution to modeling complex structures.
The final talk of the reliability session also focuses on GaN
HEMT power devices and shows the advantages of
replacing gold with copper interconnects. The presentation
from Chang Gung University will show how the thermal
conductivity advantages of copper result in better
experimental device performance, which should improve
reliability.
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2012 Compound Semiconductor MANTECH
SESSION 6a: MANUFACTURING
Chair:
Arnold Chen, Aurrion
This year’s manufacturing session will cover a broad
range of manufacturing topics. All of us undoubtedly, both
personally and professionally, felt the devastating impact
of the Japan earthquake and tsunami. It is a testament to
Japan how quickly businesses were able to resume
production. Our first paper from Hitachi Cable will provide
an updated view of how the Japanese CS industry was (and
is) affected and some first-hand insight of some their
lessons learned. The second paper discusses the process
transfer of a GaN on Si HEMT process from Nitronex to
GCS. They will present the methodology and strategy that
led to a successful transfer. The third talk in the session is a
nuts and bolts epi manufacturing paper from RFMD where
they will discuss their novel organization structure of their
maintenance team and how it led to increased uptime and
increased yield. The last paper of the session involves the
manufacturability of epitaxial lift-off from Microlink
Devices. They will discuss the scalability of large area liftoff and their application to solar cells.
SESSION 6b: HBTs
Chairs:
Charles Fields, Agilent Technologies
Mike Sun, Skyworks Solutions, Inc.
Heterojunction Bipolar Transistor (HBT) IC technology
is ideal for many high speed and RF applications.
Presentations in this section describe a range of practical
challenges associated with HBT devices and integrated
circuits. The first paper of the session is a student paper
from the University of Illinois at Urbana-Champaign. The
author will discuss the device performance results of two
types of InP based DHBTs designed to address the
requirement of higher breakdown voltage, namely, Type I
InP/InGaAs/InP DHBT and Type-II GaAsSb/InP DHBTs.
They will review their recent results of a novel Type-I/II
DHBT with AlInP emitter and GaAsSb base layers which
demonstrated higher gain, balanced fT / fMAX > 400 GHz
and BVCEO > 4V. They will benchmark the DC and RF
linearity performance of submicron Type-I/II DHBTs
made at UIUC against Type-I DHBTs obtained from two
foundries.
The second paper of the session, from WIN
Semiconductor, presents a “New Bi-HEMT Technology
with Low On-Resistance pHEMT for LTE Application”,
which reviews their work developing monolithic
integration of pHEMT and InGaP HBT Technology on
150-mm GaAs wafers. The HBTs are used for the power
cell to provide sufficient power output and linearity where
required and the pHEMTs are used for bias-circuits and
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2012 Compound Semiconductor MANTECH
power switching to achieve high efficiency at low power
mode.
The next paper, also from WIN Semiconductor,
discusses “An Ultra-High Ruggedness InGaP/GaAs HBT
for Multi-Mode / Multi-Band Power Amplifier
Application”. InGaP/GaAs HBT technology has been
widely used in power amplifier (PA) design for wireless
communications due to its high linearity and high
efficiency. They will present an ultra-high ruggedness
HBT technology that can sustain a VSWR mismatch of
50:1 without trading off RF performance.
The final paper from Skyworks discusses their work to
develop a “Novel Passivation Ledge Monitor in an InGaP
HBT Process“. InGaP/GaAs heterojunction bipolar
transistors (HBT) are widely used for wireless applications
since they have excellent features such as high power
density and high efficiency. The performance and
reliability of the HBT is greatly influenced by the
effectiveness of the emitter ledge. This ledge reduces the
recombination current providing better device scaling and
improved reliability. They review a new ledge-monitoring
structure which uses Tantalum Nitride as a barrier between
first metal and the InGaP layer which results in improved
Schottky behavior for the top electrode leading to the
desired MIS capacitor formation. The measurement of the
structure as a diode I-V provides information on the InGaP
ledge thickness/quality.
SESSION 7a: NOVEL DEVICES
Chairs:
Tom Low, Agilent Technologies
Hidetoshi Kawasaki, Sony
This session has four exciting papers describing industry
directions and novel approaches to future MOSFET
fabrication using a variety of material systems, including
Ge, various III-Vs and amorphous InGaZnO. The first
paper is an invited talk which reviews the current status
and future directions for III-V MOSFETs as a route to
enabling continued scaling of CMOS at and beyond the
15nm generation by utilizing the high channel mobilities
offered by III-Vs. The scaling-driven requirement to
reduce device pitch and ohmic contact size will force
significant reduction in contact resistances for III-V
ohmics to be used in this domain. The Si industry move,
led by Intel, toward FinFET architectures for 22nm and
below will also push any < 15nm III-V MOSFETs toward
some non-planar technology.
The second paper describes an inverted InAlAs/InGaAs
MOSFET fabricated with MOCVD regrown source/drain
ohmics and then deposition of the alumina gate dielectric
by ALD. This approach eliminates the need for gate-recess
etching and promises low on-resistance and high drain
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2012 Compound Semiconductor MANTECH
current with a smaller footprint than conventional recessed
FETs.
The third paper describes inverted thin film transistors
(TFT), fabricated on glass substrates with a Mo gate, a
composite gate dielectric comprised of ALD deposited
HfO2 followed by sputtered SiOx, and with channel of
sputtered amorphous InGaZnO. These devices have shown
impressively steep sub-threshold swing (SS) values of
96mV/decade and on- to off-state current ratios of 1.5E10,
which make them very promising for low voltage operation
and low power dissipation ICs.
The fourth paper, which is also an invited talk, reviews
the use of Ge and III-Vs grown on Si for the next
generation of CMOS. The paper also describes challenges
and directions in the choice of gate dielectrics for both Ge
(SiGe) pFET and InGaAs nFET for sub-1nm EOT
MOSFETs.
SESSION 7b: PACKAGING
Chair:
Shiban Tiku, Skyworks Solutions, Inc.
This section includes papers on current and emerging
issues in III-V packaging. The first invited paper from
M/A-COM Technology Solutions, covers all aspects of
millimeter wave surface mount packages for high
frequency and high power applications. Viability of custom
surface mount packaging as it compares to traditional
packaging will be discussed. The hot topic of cost
reduction by replacing bonded wire assemblies without
compromising performance and reliability is discussed in
detail.
Second, GCS will present a paper discussing wafer
fabrication issues not typically discussed in conferences,
but of importance to every foundry fabricating circuits with
gold based bond pads. They will give detail on repeatable
way to remove TiOx residue.
The final paper from WIN Semi on copper bump
technology is another timely paper on practical issues very
relevant to III-V products. Manufacturability, yield and
cost issues in implementing copper bumps in large volume
production will be discussed.
SESSION 8a: PROCESSING – GATES
Chair:
Russ Westerman, Plasma-Therm, LLC
Papers in this section focus on gate formation and
optimization in compound semiconductor device
manufacturing. The first paper of the session by the Naval
Research Laboratory discusses techniques to increase the
yields of sub-quarter micron devices using a bi-layer resist
approach to gate formation. The paper discusses the
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2012 Compound Semiconductor MANTECH
optimization of the resist process flow to facilitate gate
formation and shows fabricated gate lengths near 40nm.
The second paper in the session from TriQuint
Semiconductor
describes
the
development
and
implementation of an optical lithography process to replace
an existing 0.15um e-beam process. The paper will discuss
the characterization of the optical lithography steps as well
as comparing the performance of the optical and e-beam
fabricated devices.
The third paper in the session is a collaboration between
the
University
of
Washington
and
TriQuint
Semiconductor. This paper discusses the migration of an
existing plasma process for gate recess etching to a high
density inductively coupled plasma (ICP) etcher. Results
from designed experiments used to screen and then map
the new process space will be presented.
The fourth paper of the session from WIN
Semiconductors Corp examines issues related to stringer
formation during gate metallization. Alternate cleaning
methods using a combination of spray & soak techniques
are explored in order to eliminate stringers without
compromising the gate integrity.
The fifth paper in the session will also be presented by
WIN Semiconductors Corp. This paper looks at
productivity improvements to a 0.15 µm e-beam based Tgate process. This work looks at the optimization of the
resist develop step. Through automation of the develop
step, this group was able to increase the overall process
yield while simultaneously reducing the overall process
variability.
The last paper of the session, by the Shibaura Institute of
Technology, examines the effect of adding field plates to
GaAs MESFET devices in an effort to reduce gate lag and
current slump. Using device modeling, the effects of
different field plate configurations are explored in order to
minimize the effect of surface states and bulk traps on
device performance.
SESSION 8b: GaN/SiC PROCESSING
Chairs:
Michelle Bourke, Oxford Instruments Plasma
Technology
Scott Sheppard, Cree, Inc.
For the majority of years that CS MANTECH has been
in existence, the sessions were dominated with GaAs
technology and related processing techniques. This session
continues that tradition of a strong process content but in
different material systems - GaN and SiC. This session will
take you through several of the techniques relating to the
manufacturing process and is sure to be thoroughly
engaging.
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2012 Compound Semiconductor MANTECH
The first paper is from the University of Alberta and will
discuss the deposition of high-quality ZrO2 on GaN via
atomic-layer-epitaxy. The technique produces highcapacitance MOS capacitors and high-mobility inversion
layers. This will then be followed by a student paper within
this session and is from the Georgia Institute of
Technology. The paper will discuss the threshold voltage
control of recessed-gate III-N HFETs, using an electrodeless wet etching technique. The third paper comes from
Northrop Grumman and will discuss low-loss metal-onBCB technology for next generation GaN MMICS. This
takes us to the half way point of our session.
The second half begins with the evaluation of throughwafer via holes in SiC substrates for GaN HEMT
technology from United Monolithic Semiconductors. Paper
5 is from TriQuint Semiconductor. This year they will
discuss the backside via process on GaN devices and
demonstrate an improved integration method. The session
will conclude with a paper from Samco, Inc. which will
discuss the patterning of the sapphire substrate using a
Chlorine-Based ICP etch process to improve the luminance
efficiency in nitride LEDs.
SESSION 9a: POWER DEVICES
Chairs:
Ruediger Schreiner, Aixtron SE
Robert Sadler, HexaTech, Inc.
The steadily growing interest in GaN for power
switching has necessitated two full sessions devoted to the
topic this year. The first of these two sessions opens with
an invited paper by Michael Briere of ACOO Enterprises,
reviewing the status of GaN-on-Si high-voltage devices for
power conversion from 20 to 600 V. He describes the
challenges and solutions in improving the robustness of
these devices, as well as the cost advantage realized from
manufacturing GaN HEMT power devices in a highvolume silicon CMOS factory. High breakdown voltage is
key to overall robustness of these AlGaN/GaN HEMT
devices, and the National University in Seoul next
describes their design of a NiOx-based floating metal ring
between gate and drain to improve electric field uniformity
near the gate. Their measurement of 930-V breakdown
voltage demonstrates a 50% increase in comparison to
more conventional designs. The subsequent paper, from
IMEC in Belgium, reports a gold-free fabrication process
for high-voltage GaN Metal-Insulator-Semiconductor
HEMT (MISHEMT) devices on 150-mm silicon
substrates. They describe how optimization of the gatemetal stack, dielectric passivation, and ohmic contact
formation has led to high yield and robustness, with
breakdown voltages of over 600 V. Next, even higher
breakdown voltages are reported by another group at
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2012 Compound Semiconductor MANTECH
IMEC, for GaN-on-Si AlGaN/GaN double-heterostructure
(DH) FETs. By removing the silicon substrate after device
fabrication, they observe breakdown voltage independent
of the original buffer layer thickness. They report BV of
over 2000 V for devices with gate-drain spacing of 20
microns and buffer layers as thin as 600 nm. The session
will conclude with a second paper by Seoul National
University, reporting their work with AlGaN/GaN HEMTs
employing multilayer gate insulator stacks of aluminium
and gallium oxides. Devices employing 10 nm-thick gate
stacks of these oxides exhibit breakdown voltage of 1100
V and drain leakage current of only 33 nA/mm, compared
to 380 V and 654 μA/mm, respectively, for conventional
Al2O3-only devices.
SESSION 9b: GaAs PROCESSING
Chairs:
Kamal Alavi, Raytheon
Chang Hwang Hua, WIN Semiconductor
The GaAs processing session this year has five regular
papers, all having practical and relevant information for
process engineers. The first paper from TriQuint
Semiconductor discusses adhesion characterization of
photo definable epoxies used in the back end of the line on
structures with high aspect ratios. The second paper, also
from TriQuint Semiconductor, details the best coating
method for achieving a uniform, 80-µm thick film in such
photo definable epoxies. The third paper from Skyworks
shows that having a metal layer on the back of the GaAs
wafer during front side processing, and especially during
the dry etch steps, can actually improve yield and
uniformity of fabricated devices. The fourth paper from
Plasma-Therm addresses solutions for high throughput and
low cost of ownership for widely used PECVD SiN films
through optimized automated cleaning processes. The fifth
paper from University of Hyderabad in India provides
interesting insight to the behavior of Ni in the wellestablished AuGe/Ni/Au ohmic contact to GaAs and the
suitability of this alloy system to high sensitivity Hall
magnetic field sensors with integrated FET circuits that use
GaAs/AlGaAs 2DEG structures.
SESSION 10a: Power Devices II
Chairs:
Sharon Woodruff, Northrop Grumman
George Henry, Northrop Grumman
Presentations in this session describe a variety of power
devices, ranging from SiC diodes with high breakdown
voltages to GaN HEMTs fabricated using nano-rods. In the
first paper, Megan Snook and co-workers from Northrop
Grumman present a method for addressing a key problem
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2012 Compound Semiconductor MANTECH
with fabrication of high voltage SiC diodes: the large
density of defects across the wafer. Small diodes were
fabricated across a wafer and tested, followed by an
interconnection of the working devices to yield a single
large device with an active area of 11.72 cm2. This diode
produced a peak current of 96 kA, along with a diode
action of 1.7 MA2-sec. The second paper from Yen et al. of
ITRI compares two different designs of 4H-SiC Schottky
rectifiers: dual-metal trench Schottky barrier diodes (DMTSBD) and trench MOS barrier Schottky diodes (TMBS).
Numerical simulations are used to determine how each
design can be optimized to obtain low forward voltage and
low reverse leakage current, ultimately showing the
advantages of the TMBS design. In the third paper, Su et
al. of Ford Motor Company provide guidance on how CS
devices may penetrate the lucrative automotive industry.
They examine the requirements for GaN power transistors
to compete with the silicon IGBT currently incumbent for
automotive components. The substrate requirements are
discussed, comparing GaN with GaN-on-Si. Also, the type
of transistor structure is evaluated along with the
requirement for normally-off operation, suppression of
current collapse, and short-circuit withstand capability. The
fourth paper from Lee et al. of Hongik University
discusses the performance of an AlGaN/GaN-on-Si HFET
with a dual field plate. Simulation results show that the
potential at the drain side is spread out using this device
geometry, and experimental results illustrate that the
breakdown voltage increased by 11.3%. In the final paper,
Lee et al. from ITRI describe a unique GaN HEMT that is
fabricated using nano-rods. The use of nano-rods in this
device enables both normally-off operation and low onresistance. The process for fabricating HEMTs using nanorods is described in detail.
SESSION 10b: EPI CHARACTERIZATION AND
OPTIMIZATION
Chairs:
Andy Souzis, II-VI Inc.
Barbara Landini, Sumika Electronic
Materials
The session on Epi Characterization and Optimization is
comprised of five papers which utilize a variety of in-situ
and ex-situ characterization techniques to optimize
epitaxial growth processes and materials characteristics,
focused on improvements in device performance and/or
manufacturing efficiencies. The first paper by Tyhach et al.
from Raytheon compares the performance of GaN HEMTs
and MMICs grown on diamond and SiC substrates. The
influence of the two substrates on the DC, RF and thermal
device performance is discussed in light of predictive
models. The paper by Tanaka et al. at Hitachi introduces a
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2012 Compound Semiconductor MANTECH
rapid ex-situ materials test that measures the light response
of buffer leakage current in GaN-based HEMT materials.
The light response is related to trapping states which can
ultimately affect current collapse in these device structures.
The third paper by Shelton et al. at RFMD examines the
optimization of rotation speed during MBE epitaxial
growth to improve the resultant PHEMT materials
characteristics. The within-run wafer-to-wafer variation in
sheet resistance was improved by optimizing the rotation
speed during the growth of specific device layers. The
subsequent paper by Zhou et al. of Skyworks examines the
pre-growth oxide desorption process during MBE growth
of pHEMT materials as a means to reduce the device
growth time. Optimizing the desorption process permitted
a reduction in the total buffer layer thickness needed to
achieve the required device performance, increasing the
overall epitaxial growth throughput. The final paper by
Youngers et al. from Kopin describes the implementation
of in-situ reflectance data system to optimize MOVPE
growth in a high volume manufacturing environment. The
use of the reflectance data permitted more rapid detection
and response to changes in the epitaxial growth
environment, ultimately improving Cpk values for specific
materials characteristics.
SESSION 11a: GaN DEVICES
Chairs:
Shyh-Chiang Shen, Georgia Tech
Yohei Otoki, Hitachi Cable, Ltd.
This session will focus on several device fabrication
developments for III-N field effect transistors. We will first
discuss the effect of oxidant sources on the threshold
voltage shift in AlGaN/GaN MIS-HEMTs presented by
Fujitsu researchers. The second presentation will reveal a
way to improve gate leakage and microwave performance
of III-N HEMTs by inserting a thin Erbium oxide as the
gate dielectric. Using the atomic layer deposition (ALD)
approach, the third presentation will showcase the
effectiveness of an ultrathin AlN film for AlGaN/GaN
HEMT passivation. In nitrogen-polar GaN HEMTs
development, the impact of step edges on the trapping
behavior will be presented. The session will be concluded
with a heat distribution study on AlGaN/GaN HEMTs with
nano-crystalline diamond heat spreaders.
SESSION 11b: BACKSIDE PROCESSING / YIELD
IMPROVEMENT
Chair:
Travis Abshere, TriQuint Semiconductor
Backside processing is also commonly referred to as
“Finish” in some companies. That seems appropriate for
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2012 Compound Semiconductor MANTECH
one of the last 2 sessions finishing up 2012 CS
MANTECH (but don’t forget the Interactive Forum!)
There was a great deal of interest in this topic this year,
and we have five outstanding papers to present, each from
a different company.
The session will begin with a Skyworks Solutions
discussion on a strategy for reducing GaAs wafer breakage
that has worked well for them. Using a data driven
approach and a cross functional team, they made a >90%
reduction in breakage at grind – a traditionally high
stress/high breakage rate processing step for GaAs. The
second paper discusses Freescale’s test vehicle for
monitoring low occurrence die fractures in order to provide
a monitor and method for improving manufacturing
processes. The potential reliability risk from propagation of
low occurrence die cracks missed at final test can be a
thorn in the side of both manufacturers and customers.
Paper three is a M/A-COM Technical Solutions topic
concerning aspect ratios of GaAs backside vias. It builds
on previous M/A-COM work for creating pillar free vias
on low aspect ratio designs. This work explores the higher
aspect ratio arena for a variety of critical parameters. The
fourth paper is a TriQuint Semiconductor submission for
reducing rework rates for wafers mounted to Si substrates
for backgrind. Like the breakage reduction effort
mentioned above, this was a collaborative effort among
different groups to improve a process through multiple
changes rather than a single large impact change. We
“finish” out the session with a WIN Semiconductors
presentation on improving yields for 50 µm GaAs
products. Unlike the yield improvements above that were
focused on breakage or cracking, this work takes a harder
look at particle contamination and air bridge collapse,
especially at the die plate step.
SESSION 12: INTERACTIVE FORUM
Chairs:
Celica Della-Morrow, TriQuint
Semiconductor
Sharon Woodruff, Northrop Grumman
Hidetoshi Kawasaki, Sony
Following the tradition initiated in 1994, the Interactive
Forum is a session devoted to promoting the open
exchange of ideas and information. This session allows for
discussions and face-to-face meetings between the authors
and conference attendees. During the Interactive Forum, all
authors of presented papers will be available to answer
questions and further discuss their technical results. All
your questions you did not dare or manage to ask during
the oral sessions can now be discussed with the authors in
an informal setting.
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2012 Compound Semiconductor MANTECH
In addition, this Forum will be the only time at the
conference where papers that have been selected for the
Interactive Forum only will be displayed. These papers
demonstrate in a beautiful way the true nature of CS
MANTECH as the integrative conference in compound
semiconductors: participants from industry and academia;
from Asia, Europe and North America; presenting their
valuable results generated from a broad range of compound
semiconductor materials like InP, GaN, GaAs, SiGe, SiC
and Diamond. Topics as diverse as optics, microelectronics
and equipment-engineering are covered from an
experimental as well as simulation viewpoint. In short: CS
MANTECH at its best!
Attendees of the Interactive Forum will vote for the best
poster, and the winning author will receive the Best Poster
Award in form of an iPod Touch.
The 2012 International Conference on Compound
Semiconductor MANufacturing TECHnology cordially
invites all attendees to visit this session, enjoy the
refreshments, and meet your colleagues!
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2012 Compound Semiconductor MANTECH
GENERAL INFORMATION
2012 International Conference on Compound
Semiconductor Manufacturing Technology
April 23rd - 26th, 2012
The Boston Park Plaza Hotel
50 Park Plaza, Boston, MA 02116
REGISTRATION INFORMATION (US$)
For Advanced Conference Registration, register online at
our Web Site by April 3rd.
www.csmantech.org
On or before Apr. 3
Full Conference Registration
$550
Student Conference Registration
$125
Government Conference Registration
$550
One-Day Conference Registration
$300
** New Low Price **
Workshop Registration
$175
Government Workshop Registration
$175
After Apr. 3
$650
$125
$550
$300
$275
$175
Payment of the full, student, or government conference
registration fee includes one copy of the printed
Conference Digest (if desired), one copy of the Conference
Digest on a USB memory stick, and admission to all
sessions and the exhibits. It also includes the International
Reception, Exhibits Reception, Exhibits Luncheon, Rump
Session Reception, Interactive Forum Reception,
continental breakfasts, and refreshment breaks. Additional
copies of the Conference Digest may be purchased at $140
each. Additional copies of the Conference Digest on a USB
memory stick may be purchased for $50 each.
The one-day registration includes admission to all
sessions for that day, admission to the Exhibits Hall, buffet
breakfast, break refreshments, and lunch. The Rump
Session Reception or Interactive Forum Reception is
included on Wednesday and Thursday, respectively. It also
includes a printed Conference Digest and a Conference
Digest on a USB memory stick. The one-day registration
does not include admission to the International Reception.
The one-day option can be taken only once during the
conference.
Payment of workshop registration includes one copy of
the Workshop Digest, continental breakfast, Workshop
Luncheon and break refreshments. Additional copies of the
Workshop Notes may be purchased at $100.
Registrants may pay by check, money order, bank draft
or credit card. Make checks payable in U.S. dollars drawn
on a U.S bank to: “GaAs MANTECH, Inc.” Your name
and address must appear on checks, money order or bank
drafts. The only acceptable credit cards are Master Card,
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2012 Compound Semiconductor MANTECH
VISA, and American Express. REGISTRATION FORMS
SENT WITHOUT PAYMENT WILL NOT BE
ACCEPTED. All refund requests must be received by
Chris Santana at the CS MANTECH office shown below
by March 20th for a full refund less a $25 processing fee.
NO REFUNDS AFTER APRIL 3, 2012.
CS MANTECH
14525 SW Millikan Way #26585
Beaverton, Oregon 97005-2343
For Advanced Conference Registration, register online at
our Web Site by April 3rd.
www.csmantech.org
HOTEL RESERVATIONS
A block of rooms at the Boston Park Plaza Hotel and
Towers, Boston, Massachusetts has been reserved for CS
MANTECH participants and their guests. The special CS
MANTECH room rate is $185.00 for single or double
occupancy. Occupancy taxes (currently 14.45%) will be
added to these rates. Price includes free in room internet.
To make a hotel reservation, please register online
through our website at:
www.csmantech.org
Or Reservations can be made by calling: 1-800-225-2008
within North America. Please be sure to mention you are a
CS MANTECH attendee.
We ask you to please support CS MANTECH and to
enjoy all of the conference activities by staying at our
official 2012 location, the Boston Park Plaza Hotel and
Towers. Price includes free in room internet.
Hotel reservations must be received BEFORE
Tuesday, April 3, 2012 to qualify for a discounted rate
room in the CS MANTECH room block. The discounted
rate is subject to availability, so please MAKE YOUR
RESERVATION EARLY! An advance deposit or credit
card is required to hold your room.
Reservations received after Tuesday, April 3, 2012 will
be accepted on a space- and rate-availability basis.
If the room block fills prior to the cut-off date,
reservations will be accepted based on space and rate
availability, so RESERVE EARLY!
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2012 Compound Semiconductor MANTECH
CONFERENCE REGISTRATION & INFO
CENTER
Conference
registration
will
open
in
the
Dartmouth/Exeter Foyer of the Boston Park Plaza Hotel
and Towers on Sunday night and will be open Monday
through Thursday during the following hours:
Sunday
April 22nd
5:00PM – 8:00PM
Monday
April 23rd
7:00AM – 7:00PM
Tuesday
April 24th
7:00AM – 5:00PM
Wednesday
April 25th
7:00AM – 5:00PM
Thursday
April 26th
7:00AM – 9:30AM
A Conference Attendee list will be available at the
Information Center on Thursday, April 26th.
MESSAGE BOARD
A Conference Message Board will be maintained at the
Registration & Information Center during registration
hours. Please advise callers who wish to reach you during
the day to ask the hotel operator to deliver a message to the
CS MANTECH Conference Registration Desk. Please
check the message board periodically.
THE CONFERENCE HOTEL
The Boston Park Plaza Hotel and Towers
50 Park Plaza at Arlington Street
Boston, Massachusetts 02116
Room Reservations: 1-800-225-2008 North America
Room Reservations Website for group rate:
https://bostonparkplaza.reztrip.com/index.html#property=1
00&mode=b&pm=true&sr=8889 or click on the hotel link
at www.csmantech.org.
General Information: 617-457-2482
General Fax: 617-654-1916
The 2012 CS MANTECH Conference will be held at
The Boston Park Plaza Hotel & Towers in Boston,
Massachusetts. Rich in history, the Boston Park Plaza
Hotel & Towers has distinguished itself with classic
elegance and personal service that continues to attract
travelers from all over the world who visit Boston for
business, leisure or special events. The Hotel is the
unsurpassed Boston address, the Hotel is located only 3
miles from Logan International Airport and only 200
yards from the nation's first public parks, Boston
Common & the Public Garden. The Hotel is easily
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2012 Compound Semiconductor MANTECH
accessible to shopping along world renowned Newbury
Street, Faneuil Hall Marketplace, the Theatre & Financial
Districts and most historic landmarks. From the day the
Boston Hotel opened on March 10, 1927, it has been
recognized as a member of Historic Hotels of America.
The Boston Park Plaza Hotel is located in the heart of
Boston's historic Back Bay which was designated one of
the 10 Great Neighborhoods for 2010 by the American
Planning Association for its architecture, retail areas and
public spaces. The Boston Park Plaza Hotel is just 2 blocks
from Newbury Street, known for its many Designer
Boutiques and 5 blocks from the upscale Prudential Center
and Copley Place Mall, offering Boston Shopping at more
than 200 Boston Shops. There are many Boston
Restaurants in the area with 8 Boston Restaurants on
property at Boston Park Plaza Hotel. A popular winter "hot
spot" in Boston is the famous Boston Common where
you'll find Frog Pond, which offers outdoor Ice-Skating
during the winter season. During the warmer months, join
up with the many joggers and spectators who fill the paths
alongside Boston's Charles River. For the historian in you,
Boston's Freedom Trail will lead you through Boston's
Historical Sites, stopping at Paul Revere's House, Old
North Church, Old South Meeting House and many more.
The Boston Aquarium, Boston Museum of Fine Arts and
the Boston Museum of Science are also nearby and some
of New England's most scenic Beaches are only a short
drive away.
For more detailed information on The Boston Park Plaza
Hotel & Towers, visit
http://www.bostonparkplaza.com
For more information on Boston activities, visit
http://www.cityofboston.gov/visitors/
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2012 Compound Semiconductor MANTECH
TRANSPORTATION TO THE HOTEL
From the West:
Take the Massachusetts Turnpike (Rte. 90 East) into
the city. Exit at Copley Square (22) and follow straight
onto Stuart St. Follow to the 5th set of lights and turn
left for the Boston Park Plaza Hotel.
From the North:
Take Route I-93 South into Boston. Take the Storrow
Drive - Exit 26 off of I-93. Follow Storrow Drive and
exit left at the Back Bay/Copley Exit. At lights, take
left onto Beacon St, and then take an immediate right
onto Arlington St. The Boston Park Plaza Hotel is the
2nd building on the left after the park.
From the South:
Follow I-93 North towards Boston. Take the Storrow
Drive - Exit 26 off of I-93. Follow Storrow Drive and
exit left at the Back Bay/Copley Exit. At lights, take
left onto Beacon St., and then take an immediate right
onto Arlington St. The Boston Park Plaza Hotel is the
2nd building on the left after the park.
From Logan Airport:
Follow signs to Sumner Tunnel/Boston. Take the ramp
onto RT-1A S/William F McClellan Hwy. Merge
north onto Interstate 93 and take the Storrow Drive Exit 26. Follow Storrow Drive and exit left at Back
Bay/Copley Exit. At lights, take left onto Beacon St,
and then take an immediate right onto Arlington St.
The Boston Park Plaza Hotel is the 2nd building on
the left after the park.
From Logan Airport - You have 3 options when arriving
at Logan International Airport (if not driving):



Airport Cab Service (meter rate)
Boston 's Subway: The "T"- The Boston Park
Plaza Hotel is located on Arlington Stop (Green
Line) and Back Bay Stop (Orange Line)
Ultimate Shuttle
FINANCIAL ASSISTANCE
CS MANTECH strongly encourages and supports
participation from academic delegates. Students and
University Professors seeking financial assistance should
contact Patrick Fay, the 2012 University Liaison, by email
at student.aid@csmantech.org.
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2012 Compound Semiconductor MANTECH
BOSTON PARK PLAZA
MEETING ROOM LAYOUT
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2012 Compound Semiconductor MANTECH