Supplementary Information
Polymer-sorted (6,5) single-walled carbon nanotubes for solution-processed
low-voltage flexible microelectronics
By Francesca Bottacchi 1, Luisa Petti 1,2, Florian Späth 3, Imge Namal 3, Gerhard Tröster 2,
Tobias Hertel 3, and Thomas D. Anthopoulos 1*
[1]
Department of Physics and Centre for Plastic Electronics,
Blackett Laboratory, Imperial College London, London SW7 2BW, United Kingdom
E-mail: thomas.anthopoulos@imperial.ac.uk
[2]
Electronics Laboratory, Swiss Federal Institute of Technology Zurich, Gloriastrasse 35,
8092 Zurich, Switzerland
[3]
Institute of Physical and Theoretical Chemistry, Faculty of Chemistry and Pharmacy
Julius-Maximilian University Würzburg, Am Hubland, 97074 Würzburg, Germany
S1. (6,5) SWNT Network Morphological Characterization with AFM
A detailed morphological characterization of the (6,5) SWNT network has been performed on
an atomically-flat SiO2 substrate with AFM in tapping-mode. Figure S1 shows the
topography image of the (6,5) SWNTs, where carbon nanotubes are clearly visible on SiO2
surface. From the AFM topography image in Figure S1 we can estimate the surface density
(ρ) of (6,5) SWNTs to be >100 SWNT/µm2, with an average tube length (LS) of ~400 nm.
From percolation theory of a two-dimensional (2D) random network of sticks, the percolation
threshold can be defined as: ρth = 4.2362/πLS2.[1] By using an LS = 400 nm, we obtain a
percolation threshold density (ρth) of 36 SWNT/µm2, a value well below the experimentally
determined ρ >100 SWNT/µm2. Therefore, it can be safely concluded that the CNT density in
our transistors is well above the percolation limit and the charge carrier mobility can be
extracted using the parallel plate capacitor model within the gradual channel approximation.
SI-1
Figure S1: AFM topography image of the (6,5) SWNTs deposited on SiO2 surface.
Through careful analysis of the AFM image in Figure S1, one can also estimate the relative
surface coverage of SiO2 by the (6,5) SWNTs. Based on this approach we have obtained the
following percentages: SiO2 covers ~61 % of the total surface area scanned while (6,5)
SWNTs cover the ~39 %. Figure S2(a) shows the height distributions of bare SiO2 (red line)
and of (6,5) SWNTs onto SiO2 (blue line). Because of the simultaneous presence of both SiO2
and (6,5) SWNTs, the total distribution (blue line) corresponds to the convolution of the two
independent distributions i.e. one corresponding to SiO2 (red line) and the other to (6,5)
SWNTs. Based on this assumption, and due to the fact that the area of all these distributions is
normalized, we used the convolution theory and the cumulative distribution shown in Figure
S2(b) to obtain the (6,5) SWNTs surface coverage of ~39 %. However, this value should not
be considered a precise measurement but instead more as an indicative value of the relative
coverage. This is primarily due to the fact that one should take into account the facts that: (1)
the AFM tip has a finite atomic-scale vertical resolution, (2) the polymer PFO-BPy has a nonnegligible thickness around the nanotube axis.
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(b) 100
SiO2
1.6
Cum. Distr. (%)
Counts (nm-1)
(a)
1.2
0.8
SiO2 + (6,5) SWNTs
0.4
0.0
39%
(6,5) SWNTs
80
60
40
61%
SiO2
20
0
1
2
3
Height (nm)
4
5
0
0
1
2
3
4
5
Height (nm)
Figure S2: (a) Height distributions of bare SiO2 (red line) and of (6,5) SWNTs onto SiO2
(blue line) and (b) correspondent cumulative distribution of (6,5) SWNTs onto SiO2.
S2. The Effect of (6,5) SWNT Network Surface Coverage on Charge Carrier Mobility
We previously calculated the surface coverage of (6,5) SWNTs to be around 39 % of the
entire scanned surface. As a consequence, the effective FET channel width is much smaller
than the geometrical width used to extract the charge carrier mobility. As such the mobility
values calculated and reported here are underestimated. Moreover, it is possible that, due to a
much reduced channel width (W) in the devices made on flexible substrates (L/W = 35/280
µm) with respect to the devices on rigid substrates (L/W = 10/500 µm), the effect of SWNTs
surface coverage has smaller impact on carrier mobility for devices made on flexible
substrates (µsat,flex ≈ 8 cm2 V-1s-1). To conclude, we believe that the improved carrier mobility
observed for transistors fabricated on polyimide foil is most likely attributed to a higher (6,5)
SWNTs surface coverage and the positive effect this has on various device aspects.
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S3. Surface Roughness of Polyimide (Kapton) Evaluated by AFM
We have also characterized the surface topography of polyimide (Kapton) by AFM in
tapping-mode. Figures S3 (a) and (b) show the AFM topography image of polyimide
(Kapton) and the correspondent height distribution (surface roughness RMS = 2.34 nm),
respectively. Worth noting is that, for devices fabricated on both the rigid and flexible
substrates, the Al2O3 layer is deposited always on top and its surface defines the channel
interface in the bottom-gate transistor configuration used. Thus, the surface onto which
SWNTs are deposited is always Al2O3, regardless the polyimide or SiO2 substrate below. As a
consequence, the only relevant surface roughness is the one of Al2O3.
Counts (nm-1)
0.2
0.1
0.0
(a)
(b)
RMS = 2.34 nm
0
6
12
18
Height (nm)
Figure S3: (a) AFM topography image of polyimide (Kapton). (b) Correspondent height
distribution and RMS surface roughness of the polyimide (Kapton) substrate used.
1. References for SI section
[1]
C. Kocabas, N. Pimparkar, O. Yesilyurt, S. J. Kang, M. A. Alam, J. A. Rogers, Nano
Lett. 2007, 7, 1195.
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